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TDA4VE-Q1: How to profile the DDR access throughput/latency to verify memory starvation event during runtime

Part Number: TDA4VE-Q1

Tool/software:

Is there a way to profile external DDR memory access using CP Tracer tool, so that I can single out the domain/Core that is causing stalling during the application runtime?

we are using the Soc to capture Lidar images through the CSIrx, and have 20 fps output. I can't find the route Id tables in the TRM to try and narrow down the profiling.