TDA4VM: How to configure the pinmux function

Hi,

Can you tell us what TI SDK you will use for your project?

The information on how to do this depends on the SDK and the TDA4VM core you plan to use for the GPIO.

Suggest looking into the TI SDK provided here --> https://www.ti.com/tool/PROCESSOR-SDK-J721E

He Minzheng said:

Why does the total number of PADCONFIG registers  amount to 173 ?

Note that the pins are multiplexed and not all can be configured as GPIOs. Please have a detailed look at all the pin configurations in the device datasheet TDA4VM Processors datasheet (Rev. K) Chapter 5.4.

Thanks.

Hi, Praveen.

I use TI linux SDK:  ti-processor-sdk-linux-j7-evm-08_00_00_08

and I modified the device tree file in the following way:

&main_pmx0 {
    // ...
    deser0_ctrl_gpio_pins_default: deser0-gpio-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x120, PIN_OUTPUT, 7)         /* (AA28) GPIO0_71 */
			J721E_IOPAD(0x230, PIN_OUTPUT, 1)         /* (U2) GPIO1_11 */
			J721E_IOPAD(0x188, PIN_INPUT | ST_EN, 7)  /* (Y28) GPIO0_97 */
		>;
	};
	// ...
	
};

// ...
&main_i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;
	
	// ...
	
    c3lync-deser@71 {
		compatible = "meritech,m65q6x";
		// ...
		
		pinctrl-names = "default";
		pinctrl-0 = <&deser0_ctrl_gpio_pins_default>;
		
		powerdown-gpios = <&main_gpio0 71 GPIO_ACTIVE_HIGH>;
		
		// ...
		};
	};
	
	// ...
};

On the other hand, In the driver code:

static int m65q6x_probe(struct i2c_client *client)
{
    // ...
    
    /* get power-down pin from DT */
    priv->pd_gpio = devm_gpiod_get_optional(dev, "powerdown", GPIOD_OUT_HIGH);
	if (IS_ERR(priv->pd_gpio)) {
		ret = PTR_ERR(priv->pd_gpio);
		if (ret != -EPROBE_DEFER)
			dev_err(dev, "Cannot get powerdown GPIO (%d)", ret);
		return ret;
	}
	
	if (priv->pd_gpio) {
		gpiod_set_value_cansleep(priv->pd_gpio, 1);
		/* Wait at least 20ms before the I2C lines latch to the address */
		usleep_range(20000, 25000);
	}
	
	// ....
}

But I found that the level output of GPIO0_71 (AA28) pin has been kept at a low level.

So, I didn't find the cause of the problem.  Please give me some suggestions. Thank you very much.

Okay, thanks for letting us know that this is on Linux. We will have the Linux SDK expert look at the above query and provide feedback.

Thanks.

Thanks,

For further elaboration, I found that the PADCONFIG72 register corresponds to the GPIO0_71 (in the device datasheet TDA4VM Processors datasheet (Rev. K) Chapter 5.4)

Then I read the PADCONFIG72 by:   devmem2 0x0011c120

       And the return value is 0x00010007,  It indicates that the pin function configuration is correct.

However, I read the GPIO_DIR45 register by:  devmem2 0x00600060

       the return value is 0xFFFFFFFF, It indicates that the GPIO0_71 was configured as input function.

Up to now,  I didn't find the cause of the problem.