J721EXSOMXEVM: Using OCMC_RAM in MCU Domain

Hi Arun,

Arun Belamge said:

What areas of the OCMC (41C00000 - 41D00000) ~1MB should be left untouched and what can be used?

I will look into this more and get back to you.

Regards,

Karthik

Sure, thanks!

Hi Arun,

The OCMC can be reclaimed once the execution is jumped to MCU1_0 app. Could you please give me the details of how the mcu1_0 baremetal app is loaded?

Regards,

Karthik 

Hi Karthik.

I am using SBL to boot the R5F in lockstep mode. 

The app is being loaded via UART Mode.

Application works fine till the point where I have to access the location 0x41C00000.

In the linker file, I have defined 0x41C000000 - 0x41C80000 (512KB) as OCMC_RAM and my app section is pointing to this region.

Thank you!

BR

Hi Arun,

Thanks for the reply. Could you please answer the following queries?

1. Is the SBL booted successfully and could you also confirm that the SBL is not in a while loop.

2. When you say the app hangs, is it crashing or is it waiting for some other events to be happened? What is the exact error that occurs when the memory is accessed.

3. Is the OCMC_RAM section is provided with an attribute (RWIX) as below? I believe your app's BSS section is mapped to the OCMC_RAM, is that right?

OCMC_RAM (RWIX) : origin=0x41C00000 length=0x80000 

Regards

Karthik

Hi Karthik.

1. SBL boots successfully via UART Boot mode, no issues there.

2. App starts prints information, and when function is called, there is no output on the console. The aforementioned function is an asm code that does nothing but a "nop" at a random location in OCMC_RAM. I have run this app for BTCM memory as well as MSMC SRAM and it worked fine.

3. Yes. I have added the exact same section, OCMC_RAM (RWIX) : origin=0x41C00000 length=0x80000, with (RWIX). And no, I have placed the .bss in DDR.

Thank you!

BR

Hi Arun,

Could you please share your linker command file and the generated memory map file of the MCU application.

Regards

Karthik

Hi Karthik.

Please have a look.

.BENCHTEXT is my added section.

ocmc_ram_linker_map.zip

The above .zip has linker and map file.

Thank you!

Hi Arun,

From the linker file, I could see the .BENCHTEXT is directed to OCMC_RAM_SCISERVER which is ( origin=0x41C82000 length=0x60000). Are you saying that the mcu application hangs when it is executed in the OCMC_RAM_SCISERVER memory section? Earlier you have mentioned you are unable to access the locations in OCMC_RAM Region - 0x41C00000 - 0x41C80000. Could you please clarify it?

Hi Karthik.

Im sorry, this was the wrong file. But I have tried all sections of OCMC_RAM i.e., 0x41C00000-0x41D00000. (1MB)

I ve tried placing my section .BENCHTEXT in all possible unused memory regions of OCMC_RAM. Nothing has worked so far.

OCMC_RAM Region - 0x41C00000 - 0x41C80000, this was the first try and then i ve tried other unused sections as well.

Here is the 512KB of OCMC_RAM I used (L3_RAM region in the file):
OCMC_512KB.zip

Any memory address within the range 0x41C00000-0x41D00000 (1MB), I am unable to access.

Thanks 

BR

Hello Karthik.

Thanks for the response.

Say I wanted to use the ATCM for placing the above said baremetal app. Is it the same case for ATCM? 
Or I can use the whole 32KB of ATCM without any issue?

Thanks.

BR

Hi Arun,

As the ATCM is enabled by the R5 SBL, you can use the whole 32KB of ATCM without any issue.

Regards,

Karthik

Hi. Karthik.
I did try to place my .benchtext section in the ATCM memory region i.e., origin: 0x00 length: 0x8000. (R5F regional view)

But again my app hangs after it tries to access any location inside 0x00000100 - 0x8000.

Since first 100 bytes are reserved for SBL. 

Here are my linker and .map files.
atcm.zip

Again, the same app trying to access the BTCM (0x41010000), works completely fine.

Thank you!

Hi Arun,

From the J721e SBL linker command file I don't see that the ATCM memory is used for SBL. Please confirm that you have enabled the TCM memories locally from R5F core.  If not then please refer to API _sblTcmEn in the file packages/ti/boot/sbl/soc/k3/sbl_misc.asm file. This needs to be called in R5F to enable TCM memories.

Regards

Karthik

Hi Karthik. Thanks for the swift response.

One last question, can I change the ATCM attributes to RWIX from the default X, after enabling the ATCM using _sblTcmEn API?

Thank you!

BR

Hi Karthik.

Can you please elaborate this,

Karthikeyan S said:

The SBL loads the MCU1_0_sciserver_app. During the load process the aforementioned memory should not be loaded/altered

this is only for the region 0x41C00000 - 0x41C80000 (first 512KB). But the other region, 0x41C80000-0x41CC0000 (256KB) can be used for my application, as shown in the figure below?

Please confirm.

Thank you! 

BR

Hi Arun,

Arun Belamge said:

this is only for the region 0x41C00000 - 0x41C80000 (first 512KB). But the other region, 0x41C80000-0x41CC0000 (256KB) can be used for my application, as shown in the figure below?

You can use the memory region 0x41C80000-0x41CC0000 (256KB)  for your application.

Regards,

Karthik