TDA4VEN-Q1: MIPI Lane / pos-neg swapping

Hi,

Do you mean on CSIRX or CSITX?

I think CSIRX allows changing lane position, but does not allow polarity change, whereas CSITX allows changing polarity. 

Regards,

Brijesh

Thankyou for your reply.

I asked about both CSIRX and DSITX.

Is the following understanding correct?

• CSIRX     Lane swap: possible,  Polarity swap: not possible
• DSITX     Lane swap: possible,  Polarity swap: possible

If DSITX can change polarity, it seems that CSIRX can also do so.

Hi,

No unfortunately, lane swapping is not possible in CSITX. It supports number of output lanes and polarity change for each lane, but lane position cannot be changed. 

Regards,

Brijesh

Is the following understanding correct?

• RX(CSI)            Lane swap: possible,        Polarity swap: not possible
• TX(CSI/DSI)     Lane swap: Not possible,  Polarity swap: possible

If correct, what are the possible variations of Lane swap for RX(CSI)?

hi,

Yes, that's correct. I would suggest to refer to TRM for more information about possible variations. 

Regards,

Brijesh

I checked "SPRUJB3A.pdf" and found the following statement.

Isn't the following specification correct?

• RX(CSI)            Lane swap: Not possible,  Polarity swap: Possible
• TX(CSI/DSI)     Lane swap: Not possible,  Polarity swap: Not possible

Hi Furuna-san,

I am really doubtful that CSIRX supports polarity change. and i think this is supported on CSITX, but let me confirm the same. 

Regards,

Brijesh

Jadav-san,

Please confirm whether polarity change is possible or not, as it greatly affects circuit design and pattern design.

We look forward to answer from you.

Best regards,

Hi Furuna-san,

Sure, i am checking with the HW team. 

Regards,

Brijesh

Hi Jadav-san,

What is the status of the confirmation?

We are currently working on the schematic and would appreciate your response by the end of today (6/5 JST).

Best regards,

Hi Jadav-san,

Thank you for the confirmation!

I think that polarity change and lane change would be possible through register settings. Could you please provide me with a document that describes the specifications for these settings?

Regards,