Tool/software:
Hi,
The plan needs to be implemented.
camera(v4l2-/dev/video2, 1920x1080p @ uyvy) --> tiovx -> csiTX -->max96717f;
Please provide relevant documents and code examples.
Regards,
Cesar
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Tool/software:
Hi,
The plan needs to be implemented.
camera(v4l2-/dev/video2, 1920x1080p @ uyvy) --> tiovx -> csiTX -->max96717f;
Please provide relevant documents and code examples.
Regards,
Cesar
Hi Cesar,
I believe this should be possible. As OpenVX uses dma-buf framework for buffer management, this framework is also used by V4L2 for getting buffer. The buffers can be allocated in TIOVX and the dma buf id of this buffer can be passed to V4L2, once frame is captured, this can be submitted to CSITX for the transmit.
But there isn't any existing example available in the SDK.
Regards,
Brijesh
Hi Cesar,
I believe this should be possible. As OpenVX uses dma-buf framework for buffer management, this framework is also used by V4L2 for getting buffer. The buffers can be allocated in TIOVX and the dma buf id of this buffer can be passed to V4L2, once frame is captured, this can be submitted to CSITX for the transmit.
But there isn't any existing example available in the SDK.
Regards,
Brijesh
Hi Brijesh,
the csitx node: tivxCsitxNode;
but I don't know how to use;
please give the corresponding example according to the edgeai-tiovx-apps framework.
Regards,
Cesar
Hi Cesar,
Can you please refer to below FAQ and add CSITX to this example?
Regards,
Brijesh
Hi Brijesh,
This way is different. Please submit it to the developers according to my requirements.
Regards,
Cesar
Hi Cesar,
We dont have such example. So recommendation is to refer to existing example and make changes in the example.
Regards,
Brijesh
Hi Brijesh,
1.I plan to output the blue screen data to CSITX for testing, the corresponding code is as follows;
2. But An error occurred when executing this ' vxVerifyGraph ' function
3. Please help confirm whether there are any problems with the code writing.
#include <stdio.h> #include <stdlib.h> #include <signal.h> #include <tiovx_modules.h> #include <tiovx_utils.h> #include <v4l2_capture_module.h> #include <TI/video_io_csitx.h> #define NUM_CHANNELS (4U) #define CSITX_INST_ID (0U) #define CSITX_LANE_BAND_SPEED (TIVX_CSITX_LANE_BAND_SPEED_770_TO_870_MBPS) #define CSITX_LANE_SPEED_MBPS (800U) static void signal_handler(int signum, vx_bool* running_flag) { if (signum == SIGINT || signum == SIGTERM) { printf("\nReceived termination signal, stopping...\n"); *running_flag = vx_false_e; } } void setup_signal_handler(void) { signal(SIGINT, (void(*)(int))signal_handler); signal(SIGTERM, (void(*)(int))signal_handler); } static void add_graph_parameter_by_node_index(vx_graph graph, vx_node node, vx_uint32 node_parameter_index) { vx_parameter parameter = vxGetParameterByIndex(node, node_parameter_index); vxAddParameterToGraph(graph, parameter); vxReleaseParameter(¶meter); } vx_image create_uyvy_blue_screen_exemplar(vx_context context) { vx_image exemplar = NULL; vx_status status = VX_SUCCESS; exemplar = vxCreateImage(context, 1920, 1080, VX_DF_IMAGE_UYVY); if (!exemplar) { printf("Failed to create image exemplar\n"); return NULL; } vx_map_id map_id; void* ptr; vx_imagepatch_addressing_t addr; vx_rectangle_t rect; rect.start_x = 0; rect.start_y = 0; rect.end_x = 1920; rect.end_y = 1080; status = vxMapImagePatch(exemplar, &rect, 0, &map_id, &addr, &ptr, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST, 0); if (status != VX_SUCCESS) { printf("Failed to map image patch: %d\n", status); vxReleaseImage(&exemplar); return NULL; } uint8_t* pixel_data = (uint8_t*)ptr; uint32_t width = 1920; uint32_t height = 1080; for (uint32_t y = 0; y < height; y++) { for (uint32_t x = 0; x < width; x += 2) { uint32_t offset = y * addr.stride_y + x * 2; pixel_data[offset + 0] = 128; /* U */ pixel_data[offset + 1] = 16; /* Y */ pixel_data[offset + 2] = 128; /* V */ pixel_data[offset + 3] = 16; /* Y */ } } status = vxUnmapImagePatch(exemplar, map_id); if (status != VX_SUCCESS) { printf("Failed to unmap image patch: %d\n", status); vxReleaseImage(&exemplar); return NULL; } return exemplar; } vx_status app_modules_v4l2_capture_test(vx_int32 argc, vx_char* argv[]) { vx_status status = VX_FAILURE; GraphObj graph; vx_node csitx_node = 0; vx_object_array tx_frame = 0; vx_image csitx_image_exemplar; vx_user_data_object csitx_config; tivx_csitx_params_t local_csitx_config; uint32_t loop_id; vx_graph_parameter_queue_params_t csitx_graph_parameters_queue_params_list[1]; vx_bool keep_running = vx_true_e; status = tiovx_modules_initialize_graph(&graph); if (status != VX_SUCCESS) { printf("Failed to initialize graph: %d\n", status); goto exit; } vx_graph csitx_graph = graph.tiovx_graph; csitx_image_exemplar = create_uyvy_blue_screen_exemplar(graph.tiovx_context); if (!csitx_image_exemplar) { status = VX_ERROR_INVALID_PARAMETERS; printf("Failed to create image exemplar\n"); goto exit; } tx_frame = vxCreateObjectArray(graph.tiovx_context, (vx_reference)csitx_image_exemplar, 1); if (tx_frame == NULL) { status = VX_ERROR_INVALID_PARAMETERS; printf("Failed to create object array: %d\n", status); goto exit; } /* CSITX Config initialization */ tivx_csitx_params_init(&local_csitx_config); local_csitx_config.numInst = 1U; local_csitx_config.numCh = 1; local_csitx_config.instId[0U] = CSITX_INST_ID; local_csitx_config.instCfg[0U].rxCompEnable = (uint32_t)vx_true_e; local_csitx_config.instCfg[0U].rxv1p3MapEnable = (uint32_t)vx_true_e; local_csitx_config.instCfg[0U].laneBandSpeed = CSITX_LANE_BAND_SPEED; local_csitx_config.instCfg[0U].laneSpeedMbps = CSITX_LANE_SPEED_MBPS; local_csitx_config.instCfg[0U].numDataLanes = 4U; for (loop_id = 0U ; loop_id < local_csitx_config.instCfg[0U].numDataLanes ; loop_id++) { local_csitx_config.instCfg[0U].lanePolarityCtrl[loop_id] = 0u; } for (loop_id = 0U; loop_id < NUM_CHANNELS; loop_id++) { local_csitx_config.chVcNum[loop_id] = loop_id; local_csitx_config.chInstMap[loop_id] = CSITX_INST_ID; } csitx_config = vxCreateUserDataObject(graph.tiovx_context, "tivx_csitx_params_t", sizeof(tivx_csitx_params_t), &local_csitx_config); if (csitx_config == NULL) { status = VX_ERROR_INVALID_PARAMETERS; printf("Failed to create user data object: %d\n", status); goto exit; } csitx_node = tivxCsitxNode(csitx_graph, csitx_config, tx_frame); if (csitx_node == NULL) { status = VX_ERROR_INVALID_PARAMETERS; printf("Failed to create CSITX node: %d\n", status); goto exit; } status = vxSetNodeTarget(csitx_node, VX_TARGET_STRING, TIVX_TARGET_CSITX); if (status != VX_SUCCESS) { printf("Failed to set node target: %d\n", status); goto exit; } /* input @ node index 0, becomes csitx_graph parameter 1 */ add_graph_parameter_by_node_index(csitx_graph, csitx_node, 1); /* set csitx_graph schedule config such that csitx_graph parameter @ index 0 and 1 are enqueuable */ csitx_graph_parameters_queue_params_list[0].graph_parameter_index = 0; csitx_graph_parameters_queue_params_list[0].refs_list_size = 1; csitx_graph_parameters_queue_params_list[0].refs_list = (vx_reference*)&tx_frame; /* Schedule mode auto is used, here we dont need to call vxScheduleGraph * Graph gets scheduled automatically as refs are enqueued to it */ status = vxSetGraphScheduleConfig(csitx_graph, VX_GRAPH_SCHEDULE_MODE_QUEUE_AUTO, 1, csitx_graph_parameters_queue_params_list ); if (status != VX_SUCCESS) { printf("Failed to set graph schedule config: %d\n", status); goto exit; } printf("start_______________vxVerifyGraph_______________________\n"); status = vxVerifyGraph(csitx_graph); if (status != VX_SUCCESS) { printf("Failed to verify graph: %d\n", status); goto exit; } printf("end_______________vxVerifyGraph_______________________\n"); /* Now enqueue a buffer to trigger csitx_graph scheduling */ status = vxGraphParameterEnqueueReadyRef(csitx_graph, 0, (vx_reference*)&tx_frame, 1); if (status != VX_SUCCESS) { printf("Failed to enqueue ready reference: %d\n", status); goto exit; } printf("CSITX node started, press Ctrl+C to stop...\n"); setup_signal_handler(); loop_id = 0; while (keep_running) { uint32_t num_refs; vx_object_array transmitted_frames = NULL; /* Get transmitted frame reference, waits until a reference is available */ vxGraphParameterDequeueDoneRef(csitx_graph, 0, (vx_reference*)&transmitted_frames, 1, &num_refs); /* if (loop_id % 100 == 0) { printf("Processed %u frames...\n", loop_id); } loop_id++; */ vxGraphParameterEnqueueReadyRef(csitx_graph, 0, (vx_reference*)&transmitted_frames, 1); } printf("Stopping CSITX node...\n"); vxWaitGraph(csitx_graph); exit: if (csitx_node != 0) { vxReleaseNode(&csitx_node); } if (tx_frame != 0) { vxReleaseObjectArray(&tx_frame); } if (csitx_config != 0) { vxReleaseUserDataObject(&csitx_config); } tiovx_modules_clean_graph(&graph); return status; }
Regards,
Cesar
Hi Cesar,
i am sorry, but i dont see error in the above screen shot, so not sure what's the error..
Regards,
Brijesh
Hi Brijesh,
the error log:
[MCU2_0] 57.265720 s: VX_ZONE_ERROR:[ownTargetCmdDescHandler:1145] object descriptor type is invalid
Regards,
Cesar
Hi Brijesh,
update libtivision_apps.so & vx_app_rtos_linux_mcu2_0.out
the error log:
root@j721e-evm:/opt/edgeai-tiovx-apps/build/tests# ../../bin/Release/edgeai-tiovx-apps-test APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 97.679472 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 97.685556 s: VX_ZONE_INIT:Enabled 97.685603 s: VX_ZONE_ERROR:Enabled 97.685610 s: VX_ZONE_WARNING:Enabled 97.689006 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 97.693460 s: VX_ZONE_INIT:[tivxHostInitLocal:96] Initialization Done for HOST !!! Running v4l2 capture module test start_______________vxVerifyGraph_______________________ 97.730597 s: VX_ZONE_ERROR:[ownContextSendCmd:822] Command ack message returned failure cmd_status: -7 97.730609 s: VX_ZONE_ERROR:[ownContextSendCmd:862] tivxEventWait() failed. 97.730616 s: VX_ZONE_ERROR:[ownNodeKernelInit:527] Target kernel, TIVX_CMD_NODE_CREATE failed for node node_91 97.730622 s: VX_ZONE_ERROR:[ownNodeKernelInit:528] Please be sure the target callbacks have been registered for this core 97.730628 s: VX_ZONE_ERROR:[ownNodeKernelInit:529] If the target callbacks have been registered, please ensure no errors are occurring within the create callback of this kernel 97.730636 s: VX_ZONE_ERROR:[ownGraphNodeKernelInit:583] kernel init for node 0, kernel com.ti.csitx ... failed !!! 97.730646 s: VX_ZONE_ERROR:[vxVerifyGraph:2055] Node kernel init failed 97.730652 s: VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed Failed to verify graph: -1 97.731669 s: VX_ZONE_WARNING:[vxReleaseContext:1088] Found a reference 0xffffa3e744d0 of type 0000080f at external count 1, internal count 0, releasing it 97.731680 s: VX_ZONE_WARNING:[vxReleaseContext:1090] Releasing reference (name=image_87) now as a part of garbage collection All tests complete! 97.732394 s: VX_ZONE_INIT:[tivxHostDeInitLocal:110] De-Initialization Done for HOST !!! 97.736759 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! APP: Deinit ... !!! REMOTE_SERVICE: Deinit ... !!! REMOTE_SERVICE: Deinit ... Done !!! IPC: Deinit ... !!! IPC: DeInit ... Done !!! MEM: Deinit ... !!! DDR_SHARED_MEM: Alloc's: 3 alloc's of 8294496 bytes DDR_SHARED_MEM: Free's : 3 free's of 8294496 bytes DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! APP: Deinit ... Done !!! root@j721e-evm:/opt/edgeai-tiovx-apps/build/tests#
Regards,
Cesar
Hi cesar,
If you are using this board:
https://www.ti.com/tool/J721EXSOMXEVM
You should not be able to use linux driver to access cameras.
You should use the RTOS SDK https://www.ti.com/tool/PROCESSOR-SDK-J721E#downloads and refer to this guide for camera applications:
Regards,
Adam
Hi Adam,
We use our own products, didn't use the EVM board.
The current issue is that we want to directly test the csitx node without including any other nodes.
Please provide the answers based on my example code questions.
Regards,
Cesar
Hi Cesar,
I am not sure about edge ai applications, but CSITX standalone example is available in video_io\kernels\video_io\test\test_csitx_csirx.c, based on OpenVX. Can you try using this to check CSITX output first?
Regards,
BRijesh
Hi BRijesh,
Edge AI applications have nothing to do with this. I don't have the relevant knowledge points for this application.
My example is the "test_csitx_csirx.c" file copied from this document, specifically the part related to csitx.
Could you test my example ?
Regards,
Cesar
Hi BRijesh,
Switching to another target node( tivxDisplayM2MNode ) still results in the same error.
The following is pseudo code.
obj->graph = vxCreateGraph(obj->context); capt_yuv_image = vxCreateImage(1920, 1080, VX_DF_IMAGE_UYVY); /* DSS M2M initialization */ tivx_display_m2m_params_init(&obj->display_m2m_params); obj->display_m2m_params.instId = 0; obj->display_m2m_params.numPipe = 1; obj->display_m2m_params.pipeId[0U] = 3; obj->display_m2m_params.overlayId = 3; printf ("Enabling DSS_M2M \n"); obj->display_m2m_output_image = vxCreateImage(obj->context, 1920, 1080, VX_DF_IMAGE_UYVY); obj->display_m2m_param_obj = vxCreateUserDataObject(obj->context, "tivx_display_m2m_params_t", sizeof(tivx_display_m2m_params_t), &obj->display_m2m_params); obj->displaym2mNode = tivxDisplayM2MNode(obj->graph, obj->display_m2m_param_obj, obj->capt_yuv_image, obj->display_m2m_output_image); if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->displaym2mNode, VX_TARGET_STRING, TIVX_TARGET_DISPLAY_M2M1); } if(status == VX_SUCCESS) { status = tivxSetNodeParameterNumBufByIndex(obj->displaym2mNode, 2u, obj->num_cap_buf); } obj->csitx_image_arr = vxCreateObjectArray(obj->context, (vx_reference)obj->display_m2m_output_image, num_capture_frames); printf ("tivxCsitxNode!!!! \n"); APP_PRINTF("________1_______vxVerifyGraph______________\n"); if(status == VX_SUCCESS) { status = vxVerifyGraph(obj->graph); } APP_PRINTF("________2_______vxVerifyGraph______________\n");
error log:
tivxImagingLoadKernels done app_init done Creating graph _______________vxCreateImage______________ Enabling DSS_M2M tivxCsitxNode!!!! ________1_______vxVerifyGraph______________ NETWORK: Opened at IP Addr = 192.168.0.71, socket port=5000!!! 4841.775455 s: VX_ZONE_ERROR:[ownContextSendCmd:822] Command ack message returned failure cmd_status: -7 4841.775474 s: VX_ZONE_ERROR:[ownContextSendCmd:862] tivxEventWait() failed. 4841.775482 s: VX_ZONE_ERROR:[ownNodeKernelInit:527] Target kernel, TIVX_CMD_NODE_CREATE failed for node node_97 4841.775488 s: VX_ZONE_ERROR:[ownNodeKernelInit:528] Please be sure the target callbacks have been registered for this core 4841.775494 s: VX_ZONE_ERROR:[ownNodeKernelInit:529] If the target callbacks have been registered, please ensure no errors are occurring within the create callback of this kernel 4841.775502 s: VX_ZONE_ERROR:[ownGraphNodeKernelInit:583] kernel init for node 0, kernel com.ti.displaym2m ... failed !!! 4841.775516 s: VX_ZONE_ERROR:[vxVerifyGraph:2055] Node kernel init failed 4841.775522 s: VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed ________2_______vxVerifyGraph______________
Regards,
Cesar
Hi Adam & BRijesh,
modify code: app_single_cam_main.c
/* * * Copyright (c) 2018 Texas Instruments Incorporated * * All rights reserved not granted herein. * * Limited License. * * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive * license under copyrights and patents it now or hereafter owns or controls to make, * have made, use, import, offer to sell and sell ("Utilize") this software subject to the * terms herein. With respect to the foregoing patent license, such license is granted * solely to the extent that any such patent is necessary to Utilize the software alone. * The patent license shall not apply to any combinations which include this software, * other than combinations with devices manufactured by or for TI ("TI Devices"). * No hardware patent is licensed hereunder. * * Redistributions must preserve existing copyright notices and reproduce this license * (including the above copyright notice and the disclaimer and (if applicable) source * code license limitations below) in the documentation and/or other materials provided * with the distribution * * Redistribution and use in binary form, without modification, are permitted provided * that the following conditions are met: * * * No reverse engineering, decompilation, or disassembly of this software is * permitted with respect to any software provided in binary form. * * * any redistribution and use are licensed by TI for use only with TI Devices. * * * Nothing shall obligate TI to provide you with source code for the software * licensed and provided to you in object code. * * If software source code is provided to you, modification and redistribution of the * source code are permitted provided that the following conditions are met: * * * any redistribution and use of the source code, including any resulting derivative * works, are licensed by TI for use only with TI Devices. * * * any redistribution and use of any object code compiled from the source code * and any resulting derivative works, are licensed by TI for use only with TI Devices. * * Neither the name of Texas Instruments Incorporated nor the names of its suppliers * * may be used to endorse or promote products derived from this software without * specific prior written permission. * * DISCLAIMER. * * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include "app_single_cam_main.h" #include <utils/iss/include/app_iss.h> #ifndef USE_CSITX #include "app_test.h" #endif #include <TI/hwa_vpac_msc.h> #include <TI/video_io_kernels.h> #include <TI/video_io_capture.h> #if defined(A72) || defined(A53) #if defined(LINUX) /*ITT server is supported only in target mode and only on Linux*/ #include <itt_server.h> #endif #endif //static char availableSensorNames[ISS_SENSORS_MAX_SUPPORTED_SENSOR][ISS_SENSORS_MAX_NAME]; //static vx_uint8 num_sensors_found; static IssSensor_CreateParams sensorParams; #define NUM_CAPT_CHANNELS (4u) #ifdef _APP_DEBUG_ static char *app_get_test_file_path() { char *tivxPlatformGetEnv(char *env_var); #if defined(SYSBIOS) return tivxPlatformGetEnv("VX_TEST_DATA_PATH"); #else return getenv("VX_TEST_DATA_PATH"); #endif } #endif //_APP_DEBUG_ /* * Utility API used to add a graph parameter from a node, node parameter index */ void add_graph_parameter_by_node_index(vx_graph graph, vx_node node, vx_uint32 node_parameter_index) { vx_parameter parameter = vxGetParameterByIndex(node, node_parameter_index); vxAddParameterToGraph(graph, parameter); vxReleaseParameter(¶meter); } vx_status app_init(AppObj *obj) { vx_status status = VX_SUCCESS; // char* sensor_list[ISS_SENSORS_MAX_SUPPORTED_SENSOR]; // vx_uint8 count = 0; // char ch = 0xFF; // vx_uint8 selectedSensor = 0xFF; // vx_uint8 detectedSensors[ISS_SENSORS_MAX_CHANNEL]; #if defined(A72) || defined(A53) #if defined(LINUX) /*ITT server is supported only in target mode and only on Linux*/ status = itt_server_init((void*)obj, (void*)save_debug_images, (void*)appSingleCamUpdateVpacDcc); if(status != 0) { printf("Warning : Failed to initialize ITT server. Live tuning will not work \n"); } #endif #endif #if 0 for(count=0;count<ISS_SENSORS_MAX_CHANNEL;count++) { detectedSensors[count] = 0xFF; } for(count=0;count<ISS_SENSORS_MAX_SUPPORTED_SENSOR;count++) { sensor_list[count] = NULL; } obj->stop_task = 0; obj->stop_task_done = 0; obj->selectedCam = 0xFF; #endif if(status == VX_SUCCESS) { obj->context = vxCreateContext(); status = vxGetStatus((vx_reference) obj->context); } if(status == VX_SUCCESS) { tivxHwaLoadKernels(obj->context); tivxVideoIOLoadKernels(obj->context); tivxImagingLoadKernels(obj->context); APP_PRINTF("tivxImagingLoadKernels done\n"); } #if 0 /*memset(availableSensorNames, 0, ISS_SENSORS_MAX_SUPPORTED_SENSOR*ISS_SENSORS_MAX_NAME);*/ for(count=0;count<ISS_SENSORS_MAX_SUPPORTED_SENSOR;count++) { availableSensorNames[count][0] = '\0'; sensor_list[count] = availableSensorNames[count]; } if(status == VX_SUCCESS) { status = appEnumerateImageSensor(sensor_list, &num_sensors_found); } if(obj->is_interactive) { selectedSensor = 0xFF; obj->selectedCam = 0xFF; while(obj->selectedCam == 0xFF) { printf("Select camera port index 0-%d : ", ISS_SENSORS_MAX_CHANNEL-1); ch = getchar(); obj->selectedCam = ch - '0'; if(obj->selectedCam >= ISS_SENSORS_MAX_CHANNEL) { printf("Invalid entry %c. Please choose between 0 and %d \n", ch, ISS_SENSORS_MAX_CHANNEL-1); obj->selectedCam = 0xFF; } while ((obj->selectedCam != 0xFF) && (selectedSensor > (num_sensors_found-1))) { printf("%d registered sensor drivers\n", num_sensors_found); for(count=0;count<num_sensors_found;count++) { printf("%c : %s \n", count+'a', sensor_list[count]); } printf("Select a sensor above or press '0' to autodetect the sensor : "); ch = getchar(); if(ch == '0') { uint8_t num_sensors_detected = 0; uint8_t channel_mask = (1<<obj->selectedCam); status = appDetectImageSensor(detectedSensors, &num_sensors_detected, channel_mask); if(0 == status) { selectedSensor = detectedSensors[obj->selectedCam]; if(selectedSensor > ISS_SENSORS_MAX_SUPPORTED_SENSOR) { printf("No sensor detected at port %d. Please select another port \n", obj->selectedCam); obj->selectedCam = 0xFF; selectedSensor = 0xFF; } } else { printf("sensor detection at port %d returned error . Please try again \n", obj->selectedCam); obj->selectedCam = 0xFF; selectedSensor = 0xFF; } } else { selectedSensor = ch - 'a'; if(selectedSensor > (num_sensors_found-1)) { printf("Invalid selection %c. Try again \n", ch); } } } } obj->sensor_name = sensor_list[selectedSensor]; printf("Sensor selected : %s\n", obj->sensor_name); ch = 0xFF; fflush (stdin); while ((ch != '0') && (ch != '1')) { fflush (stdin); printf ("LDC Selection Yes(1)/No(0) : "); ch = getchar(); } obj->ldc_enable = ch - '0'; #ifdef VPAC3 /* Selection for MV enable */ ch = 0xFF; fflush (stdin); while ((ch != '0') && (ch != '1')) { fflush (stdin); printf ("Dual FCP enable for MV Selection Yes(1)/No(0) : "); ch = getchar(); } obj->vpac3_dual_fcp_enable = ch - '0'; #endif } else { selectedSensor = obj->sensor_sel; if(selectedSensor > (num_sensors_found-1)) { printf("Invalid sensor selection %d \n", selectedSensor); return VX_FAILURE; } } #endif obj->sensor_wdr_mode = 0; obj->table_width = LDC_TABLE_WIDTH; obj->table_height = LDC_TABLE_HEIGHT; obj->ds_factor = LDC_DS_FACTOR; #ifndef USE_CSITX /* Display initialization HV*/ memset(&obj->display_params, 0, sizeof(tivx_display_params_t)); obj->display_params.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE; obj->display_params.pipeId = 2; obj->display_params.outHeight = 1080; obj->display_params.outWidth = 1920; obj->display_params.posX = 0; obj->display_params.posY = 0; #else /* CSI-TX initialization */ tivx_csitx_params_t local_csitx_config; uint32_t loopCnt; /* CSITX Config initialization */ tivx_csitx_params_init(&local_csitx_config); local_csitx_config.numInst = 1U; local_csitx_config.numCh = 1; local_csitx_config.instId[0U] = 0; local_csitx_config.instCfg[0U].rxCompEnable = (uint32_t)vx_true_e; local_csitx_config.instCfg[0U].rxv1p3MapEnable = (uint32_t)vx_true_e; local_csitx_config.instCfg[0U].laneBandSpeed = TIVX_CSITX_LANE_BAND_SPEED_1400_TO_1600_MBPS; local_csitx_config.instCfg[0U].laneSpeedMbps = TIVX_CSITX_LANE_SPEED_MBPS_RESERVED; local_csitx_config.instCfg[0U].numDataLanes = 4U; for (loopCnt = 0U ; loopCnt < local_csitx_config.instCfg[0U].numDataLanes ; loopCnt++) { local_csitx_config.instCfg[0U].lanePolarityCtrl[loopCnt] = 0u; } for (loopCnt = 0U; loopCnt < 1; loopCnt++) { local_csitx_config.chVcNum[loopCnt] = loopCnt; local_csitx_config.chInstMap[loopCnt] = 0; } obj->csitx_config = vxCreateUserDataObject(obj->context, "tivx_csitx_params_t", sizeof(tivx_csitx_params_t), &local_csitx_config); /* DSS M2M initialization */ tivx_display_m2m_params_init(&obj->display_m2m_params); obj->display_m2m_params.instId = 0; obj->display_m2m_params.numPipe = 1; obj->display_m2m_params.pipeId[0U] = 3; obj->display_m2m_params.overlayId = 3; #endif #ifdef VPAC3 /* YUV8 output from dual CC for HV and MV */ if (obj->vpac3_dual_fcp_enable == 1U) { /* Display Modification for HV*/ obj->display_params.outWidth = 960; /* Display initialization MV*/ memset(&obj->display_params_MV, 0, sizeof(tivx_display_params_t)); obj->display_params_MV.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE; obj->display_params_MV.pipeId = 0; obj->display_params_MV.outHeight = 1080; obj->display_params_MV.outWidth = 960; obj->display_params_MV.posX = 960; obj->display_params_MV.posY = 0; } #endif obj->scaler_enable = vx_false_e; appPerfPointSetName(&obj->total_perf , "TOTAL"); return status; } vx_status app_deinit(AppObj *obj) { vx_status status = VX_FAILURE; tivxHwaUnLoadKernels(obj->context); APP_PRINTF("tivxHwaUnLoadKernels done\n"); tivxVideoIOUnLoadKernels(obj->context); APP_PRINTF("tivxVideoIOUnLoadKernels done\n"); tivxImagingUnLoadKernels(obj->context); APP_PRINTF("tivxImagingUnLoadKernels done\n"); status = vxReleaseContext(&obj->context); if(VX_SUCCESS == status) { APP_PRINTF("vxReleaseContext done\n"); } else { printf("Error: vxReleaseContext returned 0x%x \n", status); } return status; } /* * Graph, * viss_config * | * v * input_img -> VISS -----> LDC -----> output_img * */ vx_status app_create_graph(AppObj *obj) { vx_status status = VX_SUCCESS; // int32_t sensor_init_status = -1; obj->configuration = NULL; obj->raw = NULL; obj->y12 = NULL; obj->uv12_c1 = NULL; obj->y8_r8_c2 = NULL; obj->uv8_g8_c3 = NULL; obj->s8_b8_c4 = NULL; obj->histogram = NULL; obj->h3a_aew_af = NULL; #ifdef VPAC3 obj->display_image = NULL; obj->display_image_MV = NULL; #endif // unsigned int image_width = obj->width_in; // unsigned int image_height = obj->height_in; tivx_raw_image raw_image = 0; // vx_user_data_object capture_config; vx_uint8 num_capture_frames = 1; // tivx_capture_params_t local_capture_config; uint32_t buf_id; // const vx_char capture_user_data_object_name[] = "tivx_capture_params_t"; // uint32_t sensor_features_enabled = 0; // uint32_t sensor_features_supported = 0; // uint32_t sensor_wdr_enabled = 0; // uint32_t sensor_exp_control_enabled = 0; // uint32_t sensor_gain_control_enabled = 0; vx_bool yuv_cam_input = vx_true_e; // vx_image viss_out_image = NULL; #ifdef VPAC3 vx_image viss_out_image_MV = NULL; #endif // vx_image ldc_in_image = NULL; vx_image capt_yuv_image = NULL; #if 0 uint8_t channel_mask = (1<<obj->selectedCam); vx_uint32 params_list_depth = 1; if(obj->test_mode == 1) { params_list_depth = 2; } vx_graph_parameter_queue_params_t graph_parameters_queue_params_list[params_list_depth]; printf("Querying %s \n", obj->sensor_name); memset(&sensorParams, 0, sizeof(sensorParams)); status = appQueryImageSensor(obj->sensor_name, &sensorParams); if(VX_SUCCESS != status) { printf("appQueryImageSensor returned %d\n", status); return status; } if(sensorParams.sensorInfo.raw_params.format[0].pixel_container == VX_DF_IMAGE_UYVY) { yuv_cam_input = vx_true_e; printf("YUV Input selected. VISS and AEWB nodes will be bypassed. \n"); } /* Check for supported sensor features. It is upto the application to decide which features should be enabled. This demo app enables WDR, DCC and 2A if the sensor supports it. */ sensor_features_supported = sensorParams.sensorInfo.features; if(vx_false_e == yuv_cam_input) { if(ISS_SENSOR_FEATURE_COMB_COMP_WDR_MODE == (sensor_features_supported & ISS_SENSOR_FEATURE_COMB_COMP_WDR_MODE)) { APP_PRINTF("WDR mode is supported \n"); sensor_features_enabled |= ISS_SENSOR_FEATURE_COMB_COMP_WDR_MODE; sensor_wdr_enabled = 1; obj->sensor_wdr_mode = 1; }else { APP_PRINTF("WDR mode is not supported. Defaulting to linear \n"); sensor_features_enabled |= ISS_SENSOR_FEATURE_LINEAR_MODE; sensor_wdr_enabled = 0; obj->sensor_wdr_mode = 0; } if(ISS_SENSOR_FEATURE_MANUAL_EXPOSURE == (sensor_features_supported & ISS_SENSOR_FEATURE_MANUAL_EXPOSURE)) { APP_PRINTF("Expsoure control is supported \n"); sensor_features_enabled |= ISS_SENSOR_FEATURE_MANUAL_EXPOSURE; sensor_exp_control_enabled = 1; } if(ISS_SENSOR_FEATURE_MANUAL_GAIN == (sensor_features_supported & ISS_SENSOR_FEATURE_MANUAL_GAIN)) { APP_PRINTF("Gain control is supported \n"); sensor_features_enabled |= ISS_SENSOR_FEATURE_MANUAL_GAIN; sensor_gain_control_enabled = 1; } if(ISS_SENSOR_FEATURE_CFG_UC1 == (sensor_features_supported & ISS_SENSOR_FEATURE_CFG_UC1)) { APP_PRINTF("CMS Usecase is supported \n"); sensor_features_enabled |= ISS_SENSOR_FEATURE_CFG_UC1; } switch(sensorParams.sensorInfo.aewbMode) { case ALGORITHMS_ISS_AEWB_MODE_NONE: obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_DISABLED; obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_DISABLED; break; case ALGORITHMS_ISS_AEWB_MODE_AWB: obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_DISABLED; obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_AUTO; break; case ALGORITHMS_ISS_AEWB_MODE_AE: obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_AUTO; obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_DISABLED; break; case ALGORITHMS_ISS_AEWB_MODE_AEWB: obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_AUTO; obj->aewb_cfg.awb_mode = ALGORITHMS_ISS_AWB_AUTO; break; } if(obj->aewb_cfg.ae_mode == ALGORITHMS_ISS_AE_DISABLED) { if(sensor_exp_control_enabled || sensor_gain_control_enabled ) { obj->aewb_cfg.ae_mode = ALGORITHMS_ISS_AE_MANUAL; } } APP_PRINTF("obj->aewb_cfg.ae_mode = %d\n", obj->aewb_cfg.ae_mode); APP_PRINTF("obj->aewb_cfg.awb_mode = %d\n", obj->aewb_cfg.awb_mode); } if(ISS_SENSOR_FEATURE_DCC_SUPPORTED == (sensor_features_supported & ISS_SENSOR_FEATURE_DCC_SUPPORTED)) { sensor_features_enabled |= ISS_SENSOR_FEATURE_DCC_SUPPORTED; APP_PRINTF("Sensor DCC is enabled \n"); }else { APP_PRINTF("Sensor DCC is NOT enabled \n"); } APP_PRINTF("Sensor width = %d\n", sensorParams.sensorInfo.raw_params.width); APP_PRINTF("Sensor height = %d\n", sensorParams.sensorInfo.raw_params.height); APP_PRINTF("Sensor DCC ID = %d\n", sensorParams.dccId); APP_PRINTF("Sensor Supported Features = 0x%x\n", sensor_features_supported); APP_PRINTF("Sensor Enabled Features = 0x%x\n", sensor_features_enabled); sensor_init_status = appInitImageSensor(obj->sensor_name, sensor_features_enabled, channel_mask);/*Mask = 1 for camera # 0*/ if(0 != sensor_init_status) { /* Not returning failure because application may be waiting for error/test frame */ printf("Error initializing sensor %s \n", obj->sensor_name); } image_width = sensorParams.sensorInfo.raw_params.width; image_height = sensorParams.sensorInfo.raw_params.height; obj->cam_dcc_id = sensorParams.dccId; obj->width_in = image_width; obj->height_in = image_height; /* Assuming same dataformat for all exposures. This may not be true for staggered HDR. WIll be handled later for(count = 0;count<raw_params.num_exposures;count++) { memcpy(&(raw_params.format[count]), &(sensorProperties.sensorInfo.dataFormat), sizeof(tivx_raw_image_format_t)); } */ #endif /* Sensor driver does not support metadata yet. */ APP_PRINTF("Creating graph \n"); obj->graph = vxCreateGraph(obj->context); if(status == VX_SUCCESS) { status = vxGetStatus((vx_reference) obj->graph); } #if 0 APP_ASSERT(vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_VPAC_VISS1)); APP_PRINTF("Initializing params for capture node \n"); #endif /* Setting to num buf of capture node */ obj->num_cap_buf = NUM_BUFS; if(vx_false_e == yuv_cam_input) { raw_image = tivxCreateRawImage(obj->context, &sensorParams.sensorInfo.raw_params); /* allocate Input and Output refs, multiple refs created to allow pipelining of graph */ for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++) { if(status == VX_SUCCESS) { obj->cap_frames[buf_id] = vxCreateObjectArray(obj->context, (vx_reference)raw_image, num_capture_frames); status = vxGetStatus((vx_reference) obj->cap_frames[buf_id]); } } } else { // sensorParams.sensorInfo.raw_params.width = 1920; // sensorParams.sensorInfo.raw_params.height = 1080; capt_yuv_image = vxCreateImage( obj->context, 1920, 1080, VX_DF_IMAGE_UYVY ); /* allocate Input and Output refs, multiple refs created to allow pipelining of graph */ for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++) { if(status == VX_SUCCESS) { obj->cap_frames[buf_id] = vxCreateObjectArray(obj->context, (vx_reference)capt_yuv_image, num_capture_frames); status = vxGetStatus((vx_reference) obj->cap_frames[buf_id]); } } APP_PRINTF("_______________vxCreateImage______________\n"); } #if 0 /* Config initialization */ tivx_capture_params_init(&local_capture_config); local_capture_config.timeout = 33; local_capture_config.timeoutInitial = 500; local_capture_config.numInst = 2U;/* Configure both instances */ local_capture_config.numCh = 1U;/* Single cam. Only 1 channel enabled */ { vx_uint8 ch, id, lane, q; for(id = 0; id < local_capture_config.numInst; id++) { local_capture_config.instId[id] = id; local_capture_config.instCfg[id].enableCsiv2p0Support = (uint32_t)vx_true_e; local_capture_config.instCfg[id].numDataLanes = sensorParams.sensorInfo.numDataLanes; local_capture_config.instCfg[id].laneBandSpeed = sensorParams.sensorInfo.csi_laneBandSpeed; for (lane = 0; lane < local_capture_config.instCfg[id].numDataLanes; lane++) { local_capture_config.instCfg[id].dataLanesMap[lane] = lane + 1; } for (q = 0; q < NUM_CAPT_CHANNELS; q++) { ch = (NUM_CAPT_CHANNELS-1)* id + q; local_capture_config.chVcNum[ch] = q; local_capture_config.chInstMap[ch] = id; } } } local_capture_config.chInstMap[0] = obj->selectedCam/NUM_CAPT_CHANNELS; local_capture_config.chVcNum[0] = obj->selectedCam%NUM_CAPT_CHANNELS; capture_config = vxCreateUserDataObject(obj->context, capture_user_data_object_name, sizeof(tivx_capture_params_t), &local_capture_config); APP_PRINTF("capture_config = 0x%p \n", capture_config); APP_PRINTF("Creating capture node \n"); obj->capture_node = tivxCaptureNode(obj->graph, capture_config, obj->cap_frames[0]); APP_PRINTF("obj->capture_node = 0x%p \n", obj->capture_node); if(status == VX_SUCCESS) { status = vxReleaseUserDataObject(&capture_config); } if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->capture_node, VX_TARGET_STRING, TIVX_TARGET_CAPTURE2); } if(vx_false_e == yuv_cam_input) { obj->raw = (tivx_raw_image)vxGetObjectArrayItem(obj->cap_frames[0], 0); if(status == VX_SUCCESS) { status = tivxReleaseRawImage(&raw_image); } #ifdef _APP_DEBUG_ obj->fs_test_raw_image = tivxCreateRawImage(obj->context, &(sensorParams.sensorInfo.raw_params)); if (NULL != obj->fs_test_raw_image) { if(status == VX_SUCCESS) { status = read_test_image_raw(NULL, obj->fs_test_raw_image, obj->test_mode); } else { status = tivxReleaseRawImage(&obj->fs_test_raw_image); obj->fs_test_raw_image = NULL; } } #endif //_APP_DEBUG_ status = app_create_viss(obj, sensor_wdr_enabled); if(VX_SUCCESS == status) { vxSetNodeTarget(obj->node_viss, VX_TARGET_STRING, TIVX_TARGET_VPAC_VISS1); tivxSetNodeParameterNumBufByIndex(obj->node_viss, 6u, obj->num_cap_buf); } else { printf("app_create_viss failed \n"); return -1; } status = app_create_aewb(obj, sensor_wdr_enabled); if(VX_SUCCESS != status) { printf("app_create_aewb failed \n"); return -1; } viss_out_image = obj->y8_r8_c2; #ifdef VPAC3 /* Populate viss_out_image with image created */ if (obj->vpac3_dual_fcp_enable == 1U) { viss_out_image_MV = obj->y12; } #endif ldc_in_image = viss_out_image; } else { obj->capt_yuv_image = (vx_image)vxGetObjectArrayItem(obj->cap_frames[0], 0); ldc_in_image = obj->capt_yuv_image; vxReleaseImage(&capt_yuv_image); } if (obj->ldc_enable) { printf ("Enabling LDC \n"); status = app_create_ldc(obj, ldc_in_image); if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->node_ldc, VX_TARGET_STRING, TIVX_TARGET_VPAC_LDC1); } else { printf("app_create_ldc returned error \n"); return status; } if(status == VX_SUCCESS) { status = tivxSetNodeParameterNumBufByIndex(obj->node_ldc, 7u, obj->num_cap_buf); } /*Check if resizing is needed for display*/ if((obj->table_width >= obj->display_params.outWidth) && (obj->table_height >= obj->display_params.outHeight)) { vx_uint16 scaler_out_w, scaler_out_h; obj->scaler_enable = vx_true_e; appIssGetResizeParams(obj->table_width, obj->table_height, obj->display_params.outWidth, obj->display_params.outHeight, &scaler_out_w, &scaler_out_h); obj->scaler_out_img = vxCreateImage(obj->context, scaler_out_w, scaler_out_h, VX_DF_IMAGE_NV12); obj->scalerNode = tivxVpacMscScaleNode(obj->graph, obj->ldc_out, obj->scaler_out_img, NULL, NULL, NULL, NULL); if(status == VX_SUCCESS) { status = tivxSetNodeParameterNumBufByIndex(obj->scalerNode, 1u, obj->num_cap_buf); } obj->display_params.outHeight = scaler_out_h; #ifdef VPAC3 /* HV display scaler height modification */ if (obj->vpac3_dual_fcp_enable == 1U) { obj->display_params.outHeight = (scaler_out_h)*2; } #endif obj->display_params.outWidth = scaler_out_w; obj->display_image = obj->scaler_out_img; }else /*No resize needed*/ { obj->scaler_enable = vx_false_e; obj->display_image = obj->ldc_out; /* MSC can only downsize. If ldc resolution is lower, display resolution must be set accordingly */ obj->display_params.outWidth = obj->table_width; obj->display_params.outHeight = obj->table_height; } } else /*ldc_enable*/ { if(NULL != obj->capt_yuv_image) { /*MSC does not support YUV422 input*/ obj->scaler_enable = vx_false_e; } else { if ((image_width >= obj->display_params.outWidth) && (image_height >= obj->display_params.outHeight)) { obj->scaler_enable = vx_true_e; } else { obj->scaler_enable = vx_false_e; /* MSC can only downsize. If viss resolution is lower, display resolution must be set accordingly */ obj->display_params.outWidth = image_width; obj->display_params.outHeight = image_height; } } if(vx_true_e == obj->scaler_enable) { vx_uint16 scaler_out_w, scaler_out_h; appIssGetResizeParams(image_width, image_height, obj->display_params.outWidth, obj->display_params.outHeight, &scaler_out_w, &scaler_out_h); obj->scaler_out_img = vxCreateImage(obj->context, scaler_out_w, scaler_out_h, VX_DF_IMAGE_NV12); obj->scalerNode = tivxVpacMscScaleNode(obj->graph, ldc_in_image, obj->scaler_out_img, NULL, NULL, NULL, NULL); if(status == VX_SUCCESS) { status = tivxSetNodeParameterNumBufByIndex(obj->scalerNode, 1u, obj->num_cap_buf); } if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->scalerNode, VX_TARGET_STRING, TIVX_TARGET_VPAC_MSC1); } obj->display_params.outHeight = scaler_out_h; #ifdef VPAC3 /* HV display scaler height modification */ if (obj->vpac3_dual_fcp_enable == 1U) { obj->display_params.outHeight = (scaler_out_h)*2; } #endif obj->display_params.outWidth = scaler_out_w; obj->display_image = obj->scaler_out_img; } else { obj->display_image = ldc_in_image; } } #ifdef VPAC3 /* Populate Display image MV with viss_out_image_MV */ if (obj->vpac3_dual_fcp_enable == 1U) { obj->display_image_MV = viss_out_image_MV; } #endif #endif printf ("Enabling DSS_M2M \n"); obj->display_m2m_output_image = vxCreateImage(obj->context, 1920, 1080, VX_DF_IMAGE_UYVY); obj->display_m2m_param_obj = vxCreateUserDataObject(obj->context, "tivx_display_m2m_params_t", sizeof(tivx_display_m2m_params_t), &obj->display_m2m_params); obj->displaym2mNode = tivxDisplayM2MNode(obj->graph, obj->display_m2m_param_obj, capt_yuv_image, obj->display_m2m_output_image); if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->displaym2mNode, VX_TARGET_STRING, TIVX_TARGET_DISPLAY_M2M1); } if(status == VX_SUCCESS) { status = tivxSetNodeParameterNumBufByIndex(obj->displaym2mNode, 2u, obj->num_cap_buf); } obj->csitx_image_arr = vxCreateObjectArray(obj->context, (vx_reference)obj->display_m2m_output_image, num_capture_frames); #if 0 printf ("tivxCsitxNode!!!! \n"); obj->csitx_node = tivxCsitxNode(obj->graph, obj->csitx_config, obj->csitx_image_arr); vxSetNodeTarget(obj->csitx_node, VX_TARGET_STRING, TIVX_TARGET_CSITX); #endif #if 0 if(NULL == obj->display_image) { printf("Error : Display input is uninitialized \n"); return VX_FAILURE; } else { obj->display_params.posX = (1920U - obj->display_params.outWidth)/2; obj->display_params.posY = (1080U - obj->display_params.outHeight)/2; #ifdef VPAC3 /* HV position modification for MV display */ if (obj->vpac3_dual_fcp_enable == 1U) { obj->display_params.posX = 0U; obj->display_params.posY = 0U; } #endif obj->display_param_obj = vxCreateUserDataObject(obj->context, "tivx_display_params_t", sizeof(tivx_display_params_t), &obj->display_params); obj->displayNode = tivxDisplayNode(obj->graph, obj->display_param_obj, obj->display_image); } #ifdef VPAC3 /* Check if display_image_MV is not NULL and create display node */ if (obj->vpac3_dual_fcp_enable == 1U) { if(NULL == obj->display_image_MV) { printf("Error : Display MV input is uninitialized \n"); return VX_FAILURE; } else { obj->display_params_MV.posX = 960U; obj->display_params_MV.posY = 0U; obj->display_param_MV_obj = vxCreateUserDataObject(obj->context, "tivx_display_params_t", sizeof(tivx_display_params_t), &obj->display_params_MV); obj->displayNode_MV = tivxDisplayNode(obj->graph, obj->display_param_MV_obj, obj->display_image_MV); } } #endif if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->displayNode, VX_TARGET_STRING, TIVX_TARGET_DISPLAY1); APP_PRINTF("Display Set Target done\n"); } #ifdef VPAC3 /* Check status of MV node creation */ if (obj->vpac3_dual_fcp_enable == 1U) { if(status == VX_SUCCESS) { status = vxSetNodeTarget(obj->displayNode_MV, VX_TARGET_STRING, TIVX_TARGET_DISPLAY1); APP_PRINTF("Display MV Set Target done\n"); } } #endif #endif #if 0 int graph_parameter_num = 0; /* input @ node index 1, becomes graph parameter 0 */ add_graph_parameter_by_node_index(obj->graph, obj->capture_node, 1); /* set graph schedule config such that graph parameter @ index 0 is enqueuable */ graph_parameters_queue_params_list[graph_parameter_num].graph_parameter_index = graph_parameter_num; graph_parameters_queue_params_list[graph_parameter_num].refs_list_size = obj->num_cap_buf; graph_parameters_queue_params_list[graph_parameter_num].refs_list = (vx_reference*)&(obj->cap_frames[0]); graph_parameter_num++; if(obj->test_mode == 1) { add_graph_parameter_by_node_index(obj->graph, obj->displayNode, 1); /* set graph schedule config such that graph parameter @ index 0 is enqueuable */ graph_parameters_queue_params_list[graph_parameter_num].graph_parameter_index = graph_parameter_num; graph_parameters_queue_params_list[graph_parameter_num].refs_list_size = 1; graph_parameters_queue_params_list[graph_parameter_num].refs_list = (vx_reference*)&(obj->display_image); graph_parameter_num++; } if(status == VX_SUCCESS) { status = tivxSetGraphPipelineDepth(obj->graph, obj->num_cap_buf); } /* Schedule mode auto is used, here we dont need to call vxScheduleGraph * Graph gets scheduled automatically as refs are enqueued to it */ if(status == VX_SUCCESS) { status = vxSetGraphScheduleConfig(obj->graph, VX_GRAPH_SCHEDULE_MODE_QUEUE_AUTO, params_list_depth, graph_parameters_queue_params_list ); } APP_PRINTF("vxSetGraphScheduleConfig done\n"); #endif APP_PRINTF("________1_______vxVerifyGraph______________\n"); if(status == VX_SUCCESS) { status = vxVerifyGraph(obj->graph); } APP_PRINTF("________2_______vxVerifyGraph______________\n"); if(vx_true_e == obj->scaler_enable) { tivx_vpac_msc_coefficients_t sc_coeffs; vx_reference refs[1]; printf("Scaler is enabled\n"); tivx_vpac_msc_coefficients_params_init(&sc_coeffs, VX_INTERPOLATION_BILINEAR); obj->sc_coeff_obj = vxCreateUserDataObject(obj->context, "tivx_vpac_msc_coefficients_t", sizeof(tivx_vpac_msc_coefficients_t), NULL); if(status == VX_SUCCESS) { status = vxCopyUserDataObject(obj->sc_coeff_obj, 0, sizeof(tivx_vpac_msc_coefficients_t), &sc_coeffs, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST); } refs[0] = (vx_reference)obj->sc_coeff_obj; if(status == VX_SUCCESS) { status = tivxNodeSendCommand(obj->scalerNode, 0u, TIVX_VPAC_MSC_CMD_SET_COEFF, refs, 1u); } } else { printf("Scaler is disabled\n"); } if(status == VX_SUCCESS) { status = tivxExportGraphToDot(obj->graph, ".", "single_cam_graph"); } #ifdef _APP_DEBUG_ if(vx_false_e == yuv_cam_input) { if( (NULL != obj->fs_test_raw_image) && (NULL != obj->capture_node) && (status == VX_SUCCESS)) { status = app_send_test_frame(obj->capture_node, obj->fs_test_raw_image); } } #endif //_APP_DEBUG_ APP_PRINTF("app_create_graph exiting\n"); return status; } vx_status app_delete_graph(AppObj *obj) { uint32_t buf_id; vx_status status = VX_SUCCESS; if(NULL != obj->capture_node) { APP_PRINTF("releasing capture node\n"); status |= vxReleaseNode(&obj->capture_node); } if(NULL != obj->node_viss) { APP_PRINTF("releasing node_viss\n"); status |= vxReleaseNode(&obj->node_viss); } if(NULL != obj->node_aewb) { APP_PRINTF("releasing node_aewb\n"); status |= vxReleaseNode(&obj->node_aewb); } if(NULL != obj->displayNode) { APP_PRINTF("releasing displayNode\n"); status |= vxReleaseNode(&obj->displayNode); } #ifdef VPAC3 /* Releasing MV display node */ if (obj->vpac3_dual_fcp_enable == 1U) { if(NULL != obj->displayNode_MV) { APP_PRINTF("releasing MV displayNode\n"); status |= vxReleaseNode(&obj->displayNode_MV); } } #endif status |= tivxReleaseRawImage(&obj->raw); APP_PRINTF("releasing raw image done\n"); for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++) { if(NULL != obj->cap_frames[buf_id]) { APP_PRINTF("releasing cap_frame # %d\n", buf_id); status |= vxReleaseObjectArray(&(obj->cap_frames[buf_id])); } } for(buf_id=0; buf_id<obj->num_viss_out_buf; buf_id++) { if(NULL != obj->viss_out_luma[buf_id]) { APP_PRINTF("releasing y8 buffer # %d\n", buf_id); status |= vxReleaseImage(&(obj->viss_out_luma[buf_id])); } } if(NULL != obj->capt_yuv_image) { APP_PRINTF("releasing capt_yuv_image\n"); status |= vxReleaseImage(&obj->capt_yuv_image); } if(NULL != obj->y12) { APP_PRINTF("releasing y12\n"); status |= vxReleaseImage(&obj->y12); } if(NULL != obj->uv12_c1) { APP_PRINTF("releasing uv12_c1\n"); status |= vxReleaseImage(&obj->uv12_c1); } if(NULL != obj->s8_b8_c4) { APP_PRINTF("releasing s8_b8_c4\n"); status |= vxReleaseImage(&obj->s8_b8_c4); } if(NULL != obj->y8_r8_c2) { APP_PRINTF("releasing y8_r8_c2\n"); status |= vxReleaseImage(&obj->y8_r8_c2); } if(NULL != obj->uv8_g8_c3) { APP_PRINTF("releasing uv8_g8_c3\n"); status |= vxReleaseImage(&obj->uv8_g8_c3); } if(NULL != obj->histogram) { APP_PRINTF("releasing histogram\n"); status |= vxReleaseDistribution(&obj->histogram); } if(NULL != obj->configuration) { APP_PRINTF("releasing configuration\n"); status |= vxReleaseUserDataObject(&obj->configuration); } if (NULL != obj->ae_awb_result) { status |= vxReleaseUserDataObject(&obj->ae_awb_result); APP_PRINTF("releasing ae_awb_result done\n"); } if(NULL != obj->h3a_aew_af) { APP_PRINTF("releasing h3a_aew_af\n"); status |= vxReleaseUserDataObject(&obj->h3a_aew_af); } if(NULL != obj->aewb_config) { APP_PRINTF("releasing aewb_config\n"); status |= vxReleaseUserDataObject(&obj->aewb_config); } if(NULL != obj->dcc_param_viss) { APP_PRINTF("releasing VISS DCC Data Object\n"); status |= vxReleaseUserDataObject(&obj->dcc_param_viss); } #ifndef USE_CSITX if(NULL != obj->display_param_obj) { APP_PRINTF("releasing Display Param Data Object\n"); status |= vxReleaseUserDataObject(&obj->display_param_obj); } #else if(NULL != obj->csitx_config) { APP_PRINTF("releasing csi-tx Data Object\n"); status |= vxReleaseUserDataObject(&obj->csitx_config); } if(NULL != obj->csitx_image_arr) { APP_PRINTF("releasing csitx Image \n"); status |= vxReleaseObjectArray(&obj->csitx_image_arr); } if(NULL != obj->display_m2m_param_obj) { APP_PRINTF("releasing Display Param Data Object\n"); status |= vxReleaseUserDataObject(&obj->display_m2m_param_obj); } if(NULL != obj->display_m2m_output_image) { APP_PRINTF("releasing Display Param Data Object\n"); status |= vxReleaseImage(&obj->display_m2m_output_image); } #endif #ifdef VPAC3 /* Releasing MV params object */ if (obj->vpac3_dual_fcp_enable == 1U) { if(NULL != obj->display_param_MV_obj) { APP_PRINTF("releasing MV Display Param Data Object\n"); status |= vxReleaseUserDataObject(&obj->display_param_MV_obj); } } #endif if(NULL != obj->dcc_param_2a) { APP_PRINTF("releasing 2A DCC Data Object\n"); status |= vxReleaseUserDataObject(&obj->dcc_param_2a); } if(NULL != obj->dcc_param_ldc) { APP_PRINTF("releasing LDC DCC Data Object\n"); status |= vxReleaseUserDataObject(&obj->dcc_param_ldc); } if (obj->ldc_enable) { if (NULL != obj->mesh_img) { APP_PRINTF("releasing LDC Mesh Image \n"); status |= vxReleaseImage(&obj->mesh_img); } if (NULL != obj->ldc_out) { APP_PRINTF("releasing LDC Output Image \n"); status |= vxReleaseImage(&obj->ldc_out); } if (NULL != obj->mesh_params_obj) { APP_PRINTF("releasing LDC Mesh Parameters Object\n"); status |= vxReleaseUserDataObject(&obj->mesh_params_obj); } if (NULL != obj->ldc_param_obj) { APP_PRINTF("releasing LDC Parameters Object\n"); status |= vxReleaseUserDataObject(&obj->ldc_param_obj); } if (NULL != obj->region_params_obj) { APP_PRINTF("releasing LDC Region Parameters Object\n"); status |= vxReleaseUserDataObject(&obj->region_params_obj); } if(NULL != obj->node_ldc) { APP_PRINTF("releasing LDC Node \n"); status |= vxReleaseNode(&obj->node_ldc); } } #ifndef USE_CSITX if(vx_true_e == obj->scaler_enable) { if (NULL != obj->scaler_out_img) { APP_PRINTF("releasing Scaler Output Image \n"); status |= vxReleaseImage(&obj->scaler_out_img); } if(NULL != obj->scalerNode) { APP_PRINTF("releasing Scaler Node \n"); status |= vxReleaseNode(&obj->scalerNode); } if (NULL != obj->sc_coeff_obj) { APP_PRINTF("release Scalar coefficient data object \n"); status |= vxReleaseUserDataObject(&obj->sc_coeff_obj); } } #endif #ifdef _APP_DEBUG_ if(NULL != obj->fs_test_raw_image) { APP_PRINTF("releasing test raw image buffer # %d\n", buf_id); status |= tivxReleaseRawImage(&obj->fs_test_raw_image); } #endif APP_PRINTF("releasing graph\n"); status |= vxReleaseGraph(&obj->graph); APP_PRINTF("releasing graph done\n"); return status; } vx_status app_run_graph(AppObj *obj) { vx_status status = VX_SUCCESS; vx_uint32 i; vx_uint32 frm_loop_cnt; uint32_t buf_id; uint32_t num_refs_capture; vx_object_array out_capture_frames; int graph_parameter_num = 0; uint8_t channel_mask = (1<<obj->selectedCam); if(NULL == obj->sensor_name) { printf("sensor name is NULL \n"); return VX_FAILURE; } status = appStartImageSensor(obj->sensor_name, channel_mask); if(status < 0) { printf("Failed to start sensor %s \n", obj->sensor_name); if (NULL != obj->fs_test_raw_image) { printf("Defaulting to file test mode \n"); status = 0; } } graph_parameter_num = 0; for(buf_id=0; buf_id<obj->num_cap_buf; buf_id++) { if(status == VX_SUCCESS) { status = vxGraphParameterEnqueueReadyRef(obj->graph, 0, (vx_reference*)&(obj->cap_frames[buf_id]), 1); } #ifndef USE_CSITX /* in order for the graph to finish execution, the display still needs to be enqueued 4 times for testing */ if((status == VX_SUCCESS) && (obj->test_mode == 1)) { status = vxGraphParameterEnqueueReadyRef(obj->graph, 1, (vx_reference*)&(obj->display_image), 1); } #endif } /* The application reads and processes the same image "frm_loop_cnt" times The output may change because on VISS, parameters are updated every frame based on AEWB results AEWB result is avaialble after 1 frame and is applied after 2 frames Therefore, first 2 output images will have wrong colors */ frm_loop_cnt = obj->num_frames_to_run; frm_loop_cnt += obj->num_cap_buf; if(obj->is_interactive) { /* in interactive mode loop for ever */ frm_loop_cnt = 0xFFFFFFFF; } #if defined(A72) || defined(A53) #if defined(LINUX) appDccUpdatefromFS(obj->sensor_name, obj->sensor_wdr_mode, obj->node_viss, 0, obj->node_aewb, 0, obj->node_ldc, 0, obj->context); #endif #endif for(i=0; i<frm_loop_cnt; i++) { #ifndef USE_CSITX vx_image test_image; #endif appPerfPointBegin(&obj->total_perf); graph_parameter_num = 0; if(status == VX_SUCCESS) { status = vxGraphParameterDequeueDoneRef(obj->graph, graph_parameter_num, (vx_reference*)&out_capture_frames, 1, &num_refs_capture); } #ifndef USE_CSITX graph_parameter_num++; if((status == VX_SUCCESS) && (obj->test_mode == 1)) { status = vxGraphParameterDequeueDoneRef(obj->graph, 1, (vx_reference*)&test_image, 1, &num_refs_capture); } if((obj->test_mode == 1) && (i > TEST_BUFFER) && (status == VX_SUCCESS)) { vx_uint32 actual_checksum = 0; if(app_test_check_image(test_image, checksums_expected[obj->sensor_sel][0], &actual_checksum) == vx_false_e) { test_result = vx_false_e; } populate_gatherer(obj->sensor_sel, 0, actual_checksum); } APP_PRINTF(" i %d...\n", i); graph_parameter_num = 0; if((status == VX_SUCCESS) && (obj->test_mode == 1)) { status = vxGraphParameterEnqueueReadyRef(obj->graph, 1, (vx_reference*)&test_image, 1); } #endif if(status == VX_SUCCESS) { status = vxGraphParameterEnqueueReadyRef(obj->graph, graph_parameter_num, (vx_reference*)&out_capture_frames, 1); } graph_parameter_num++; appPerfPointEnd(&obj->total_perf); if((obj->stop_task) || (status != VX_SUCCESS)) { break; } } if(status == VX_SUCCESS) { status = vxWaitGraph(obj->graph); } /* Dequeue buf for pipe down */ #if 0 for(buf_id=0; buf_id<obj->num_cap_buf-2; buf_id++) { APP_PRINTF(" Dequeuing capture # %d...\n", buf_id); graph_parameter_num = 0; vxGraphParameterDequeueDoneRef(obj->graph, graph_parameter_num, (vx_reference*)&out_capture_frames, 1, &num_refs_capture); graph_parameter_num++; } #endif if(status == VX_SUCCESS) { status = appStopImageSensor(obj->sensor_name, channel_mask); } return status; } static void app_run_task(void *app_var) { AppObj *obj = (AppObj *)app_var; appPerfStatsCpuLoadResetAll(); app_run_graph(obj); obj->stop_task_done = 1; } static int32_t app_run_task_create(AppObj *obj) { tivx_task_create_params_t params; int32_t status; tivxTaskSetDefaultCreateParams(¶ms); params.task_main = app_run_task; params.app_var = obj; obj->stop_task_done = 0; obj->stop_task = 0; status = tivxTaskCreate(&obj->task, ¶ms); return status; } static void app_run_task_delete(AppObj *obj) { while(obj->stop_task_done==0) { tivxTaskWaitMsecs(100); } tivxTaskDelete(&obj->task); } static char menu[] = { "\n" "\n ==========================" "\n Demo : Single Camera w/ 2A" "\n ==========================" "\n" "\n p: Print performance statistics" "\n" #ifdef _APP_DEBUG_ "\n s: Save Sensor RAW, VISS Output and H3A output images to File System" "\n" #endif "\n e: Export performance statistics" #if defined(A72) || defined(A53) #if defined(LINUX) "\n" "\n u: Update DCC from File System" "\n" "\n" #endif #endif "\n x: Exit" "\n" "\n Enter Choice: " }; static vx_status app_run_graph_interactive(AppObj *obj) { vx_status status; uint32_t done = 0; char ch; FILE *fp; app_perf_point_t *perf_arr[1]; uint8_t channel_mask = (1<<obj->selectedCam); status = app_run_task_create(obj); if(status!=0) { printf("ERROR: Unable to create task\n"); } else { appPerfStatsResetAll(); while(!done && (status == VX_SUCCESS)) { printf(menu); ch = getchar(); printf("\n"); switch(ch) { case 'p': appPerfStatsPrintAll(); status = tivx_utils_graph_perf_print(obj->graph); appPerfPointPrint(&obj->total_perf); printf("\n"); appPerfPointPrintFPS(&obj->total_perf); appPerfPointReset(&obj->total_perf); printf("\n"); break; #ifdef _APP_DEBUG_ case 's': save_debug_images(obj); break; #endif case 'e': perf_arr[0] = &obj->total_perf; fp = appPerfStatsExportOpenFile(".", "basic_demos_app_single_cam"); if (NULL != fp) { appPerfStatsExportAll(fp, perf_arr, 1); status = tivx_utils_graph_perf_export(fp, obj->graph); appPerfStatsExportCloseFile(fp); appPerfStatsResetAll(); } else { printf("fp is null\n"); } break; #if defined(A72) || defined(A53) #if defined(LINUX) case 'u': appDccUpdatefromFS(obj->sensor_name, obj->sensor_wdr_mode, obj->node_viss, 0, obj->node_aewb, 0, obj->node_ldc, 0, obj->context); break; #endif #endif case 'x': obj->stop_task = 1; done = 1; break; default: printf("Unsupported command %c\n", ch); break; } } app_run_task_delete(obj); } if(status == VX_SUCCESS) { status = appStopImageSensor(obj->sensor_name, channel_mask); } return status; } static void app_show_usage(int argc, char* argv[]) { printf("\n"); printf(" Single Camera Demo - (c) Texas Instruments 2019\n"); printf(" ========================================================\n"); printf("\n"); printf(" Usage,\n"); printf(" %s --cfg <config file>\n", argv[0]); printf("\n"); } #if defined(A72) || defined(A53) #if defined(LINUX) int appSingleCamUpdateVpacDcc(AppObj *obj, uint8_t* dcc_buf, uint32_t dcc_buf_size) { int32_t status = 0; status = appUpdateVpacDcc(dcc_buf, dcc_buf_size, obj->context, obj->node_viss, 0, obj->node_aewb, 0, obj->node_ldc, 0 ); return status; } #endif #endif #ifdef _APP_DEBUG_ int save_debug_images(AppObj *obj) { int num_bytes_io = 0; static int file_index = 0; char raw_image_fname[MAX_FNAME]; char yuv_image_fname[MAX_FNAME]; char h3a_image_fname[MAX_FNAME]; char failsafe_test_data_path[3] = "./"; char * test_data_path = app_get_test_file_path(); struct stat s; if(NULL == test_data_path) { printf("Test data path is NULL. Defaulting to current folder \n"); test_data_path = failsafe_test_data_path; } if (stat(test_data_path, &s)) { printf("Test data path %s does not exist. Defaulting to current folder \n", test_data_path); test_data_path = failsafe_test_data_path; } if(NULL == obj->capt_yuv_image) { snprintf(raw_image_fname, MAX_FNAME, "%s/%s_%04d.raw", test_data_path, "img", file_index); printf("RAW file name %s \n", raw_image_fname); num_bytes_io = write_output_image_raw(raw_image_fname, obj->raw); if(num_bytes_io < 0) { printf("Error writing to RAW file \n"); return VX_FAILURE; } snprintf(yuv_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "img_viss", file_index); printf("YUV file name %s \n", yuv_image_fname); num_bytes_io = write_output_image_nv12_8bit(yuv_image_fname, obj->y8_r8_c2); if(num_bytes_io < 0) { printf("Error writing to VISS NV12 file \n"); return VX_FAILURE; } snprintf(h3a_image_fname, MAX_FNAME, "%s/%s_%04d.bin", test_data_path, "h3a", file_index); printf("H3A file name %s \n", h3a_image_fname); num_bytes_io = write_h3a_image(h3a_image_fname, obj->h3a_aew_af); if(num_bytes_io < 0) { printf("Error writing to H3A file \n"); return VX_FAILURE; } } else { vx_image cap_yuv; snprintf(raw_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "cap", file_index); printf("YUV file name %s \n", raw_image_fname); cap_yuv = (vx_image)vxGetObjectArrayItem(obj->cap_frames[0], 0); num_bytes_io = write_output_image_yuv422_8bit(raw_image_fname, cap_yuv); if(num_bytes_io < 0) { printf("Error writing to YUV file \n"); return VX_FAILURE; } } if(obj->scaler_enable) { snprintf(yuv_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "img_msc", file_index); printf("YUV file name %s \n", yuv_image_fname); num_bytes_io = write_output_image_nv12_8bit(yuv_image_fname, obj->scaler_out_img); if(num_bytes_io < 0) { printf("Error writing to MSC NV12 file \n"); return VX_FAILURE; } } if(obj->ldc_enable) { snprintf(yuv_image_fname, MAX_FNAME, "%s/%s_%04d.yuv", test_data_path, "img_ldc", file_index); printf("YUV file name %s \n", yuv_image_fname); num_bytes_io = write_output_image_nv12_8bit(yuv_image_fname, obj->ldc_out); if(num_bytes_io < 0) { printf("Error writing to LDC NV12 file \n"); return VX_FAILURE; } } file_index++; return (file_index-1); } #endif //_APP_DEBUG_ static void app_parse_cfg_file(AppObj *obj, char *cfg_file_name) { FILE *fp = fopen(cfg_file_name, "r"); char line_str[1024]; char *token; if(fp==NULL) { printf("# ERROR: Unable to open config file [%s]. Switching to interactive mode\n", cfg_file_name); obj->is_interactive = 1; } else { while(fgets(line_str, sizeof(line_str), fp)!=NULL) { char s[]=" \t"; if (strchr(line_str, '#')) { continue; } /* get the first token */ token = strtok(line_str, s); if (NULL != token) { if(strcmp(token, "sensor_index")==0) { token = strtok(NULL, s); if (NULL != token) { obj->sensor_sel = atoi(token); printf("sensor_selection = [%d]\n", obj->sensor_sel); } } else if(strcmp(token, "ldc_enable")==0) { token = strtok(NULL, s); if (NULL != token) { obj->ldc_enable = atoi(token); printf("ldc_enable = [%d]\n", obj->ldc_enable); } } else if(strcmp(token, "num_frames_to_run")==0) { token = strtok(NULL, s); if (NULL != token) { obj->num_frames_to_run = atoi(token); printf("num_frames_to_run = [%d]\n", obj->num_frames_to_run); } } else if(strcmp(token, "is_interactive")==0) { token = strtok(NULL, s); if (NULL != token) { obj->is_interactive = atoi(token); printf("is_interactive = [%d]\n", obj->is_interactive); } } else { APP_PRINTF("Invalid token [%s]\n", token); } } } fclose(fp); } if(obj->width_in<128) obj->width_in = 128; if(obj->height_in<128) obj->height_in = 128; if(obj->width_out<128) obj->width_out = 128; if(obj->height_out<128) obj->height_out = 128; } vx_status app_parse_cmd_line_args(AppObj *obj, int argc, char *argv[]) { vx_bool set_test_mode = vx_false_e; vx_int8 sensor_override = 0xFF; app_set_cfg_default(obj); int i; if(argc==1) { app_show_usage(argc, argv); printf("Defaulting to interactive mode \n"); obj->is_interactive = 1; return VX_SUCCESS; } for(i=0; i<argc; i++) { if(strcmp(argv[i], "--cfg")==0) { i++; if(i>=argc) { app_show_usage(argc, argv); } app_parse_cfg_file(obj, argv[i]); } else if(strcmp(argv[i], "--help")==0) { app_show_usage(argc, argv); return VX_FAILURE; } #ifndef USE_CSITX else if(strcmp(argv[i], "--test")==0) { set_test_mode = vx_true_e; } #endif else if(strcmp(argv[i], "--sensor")==0) { // check to see if there is another argument following --sensor if (argc > i+1) { sensor_override = atoi(argv[i+1]); // increment i again to avoid this arg i++; } } } if(set_test_mode == vx_true_e) { obj->test_mode = 1; obj->is_interactive = 0; // obj->num_frames_to_run = NUM_FRAMES; if (sensor_override != 0xFF) { obj->sensor_sel = sensor_override; } } return VX_SUCCESS; } #ifdef _APP_DEBUG_ vx_int32 write_output_image_nv12(char * file_name, vx_image out_nv12) { FILE * fp = fopen(file_name, "wb"); if(!fp) { APP_PRINTF("Unable to open file %s\n", file_name); return -1; } vx_uint32 len1 = write_output_image_fp(fp, out_nv12); fclose(fp); APP_PRINTF("%d bytes written to %s\n", len1, file_name); return len1; } #endif AppObj gAppObj; int app_single_cam_main(int argc, char* argv[]) { AppObj *obj = &gAppObj; vx_status status = VX_SUCCESS; // status = app_parse_cmd_line_args(obj, argc, argv); if(VX_SUCCESS == status) { status = app_init(obj); if(VX_SUCCESS == status) { APP_PRINTF("app_init done\n"); /* Not checking status because application may be waiting for error/test frame */ app_create_graph(obj); if(VX_SUCCESS == status) { APP_PRINTF("app_create_graph done\n"); if(obj->is_interactive) { status = app_run_graph_interactive(obj); } else { status = app_run_graph(obj); } if(VX_SUCCESS == status) { APP_PRINTF("app_run_graph done\n"); status = app_delete_graph(obj); if(VX_SUCCESS == status) { APP_PRINTF("app_delete_graph done\n"); } else { printf("Error : app_delete_graph returned 0x%x \n", status); } } else { printf("Error : app_run_graph_xx returned 0x%x \n", status); } } else { printf("Error : app_create_graph returned 0x%x is_interactive =%d \n", status, obj->is_interactive); } } else { printf("Error : app_init returned 0x%x \n", status); } status = app_deinit(obj); if(VX_SUCCESS == status) { APP_PRINTF("app_deinit done\n"); } else { printf("Error : app_deinit returned 0x%x \n", status); } appDeInitImageSensor(obj->sensor_name); } else { printf("Error: app_parse_cmd_line_args returned 0x%x \n", status); } #ifndef USE_CSITX if(obj->test_mode == 1) { if((test_result == vx_false_e) || (status == VX_FAILURE)) { printf("\n\nTEST FAILED\n\n"); print_new_checksum_structs(); status = (status == VX_SUCCESS) ? VX_FAILURE : status; } else { printf("\n\nTEST PASSED\n\n"); } } #endif return status; } vx_status app_send_test_frame(vx_node cap_node, tivx_raw_image raw_img) { vx_status status = VX_SUCCESS; status = tivxCaptureRegisterErrorFrame(cap_node, (vx_reference)raw_img); return status; }
Regards,
Cesar
Hi Cesar,
But here create itself is failing for the display m2m node, can you please check if you are calling below API in your code?
tivxVideoIOLoadKernels(context);
Regards,
Brijesh
Hi cesar,
Please check the conformance test that uses test_csitx_csirx.c:
root@j721e-evm:/opt/vision_apps# ./vx_app_conformance_video_io.out --filter=tivxVideoIOCsitxCsirx* APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 114.154845 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 114.154917 s: VX_ZONE_INIT:Enabled 114.154924 s: VX_ZONE_ERROR:Enabled 114.154930 s: VX_ZONE_WARNING:Enabled 114.155690 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 114.156135 s: VX_ZONE_INIT:[tivxHostInitLocal:101] Initialization Done for HOST !!! VxTests version: unknown VCS version: unknown Build config: Release [ ======== ] Total 28 tests from 5 test cases Use test filter: tivxVideoIOCsitxCsirx* Use global OpenVX context: FALSE [ -------- ] tests from tivxVideoIOCsitxCsirx [ RUN 0001 ] tivxVideoIOCsitxCsirx.CsitxCsirxloopback/0/CsitxCsirx/Width=1920/Height=1080/loopCount=1000/csitx_inst=0 ... Initializing Transmit Buffers... Initializing Transmit Buffers Done. [ DONE ] tivxVideoIOCsitxCsirx.CsitxCsirxloopback/0/CsitxCsirx/Width=1920/Height=1080/loopCount=1000/csitx_inst=0 [ RUN 0002 ] tivxVideoIOCsitxCsirx.CsitxCsirxloopback/1/CsitxCsirx/Width=1920/Height=1080/loopCount=1000/csitx_inst=0 ... [MCU2_0] 167.084387 s: ========================================================== [MCU2_0] 167.084486 s: Csitx Status: Instance|0 [MCU2_0] 167.084520 s: ========================================================== [MCU2_0] 167.084562 s: FIFO Overflow Count: 0 [MCU2_0] 167.084712 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Repeat Count | [MCU2_0] 167.084789 s: 0| 1002| 1002| 0| [MCU2_0] 167.084826 s: 1| 1002| 1002| 0| [MCU2_0] 167.084856 s: 2| 1002| 1002| 0| [MCU2_0] 167.084885 s: 3| 1002| 1002| 0| Initializing Transmit Buffers... Initializing Transmit Buffers Done. [MCU2_0] 220.013097 s: ========================================================== [MCU2_0] 220.013196 s: Csitx Status: Instance|0 [MCU2_0] 220.013232 s: ========================================================== [MCU2_0] 220.013275 s: FIFO Overflow Count: 0 [MCU2_0] 220.013302 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Repeat Count | [MCU2_0] 220.013350 s: 0| 2004| 2004| 0| [MCU2_0] 220.013380 s: 1| 2004| 2004| 0| [MCU2_0] 220.013409 s: 2| 2004| 2004| 0| [MCU2_0] 220.013437 s: 3| 2004| 2004| 0| [ DONE ] tivxVideoIOCsitxCsirx.CsitxCsirxloopback/1/CsitxCsirx/Width=1920/Height=1080/loopCount=1000/csitx_inst=0 [ -------- ] 2 tests from test case tivxVideoIOCsitxCsirx [ ======== ] [ ALL DONE ] 2 test(s) from 1 test case(s) ran [ PASSED ] 2 test(s) [ FAILED ] 0 test(s) [ DISABLED ] 0 test(s) ================================= OpenVX Conformance report summary ================================= To be conformant to the OpenVX baseline, 2 required test(s) must pass. 2 tests passed, 0 tests failed. PASSED. To be conformant to the User Data Object extension, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. Note: The 0 disabled tests are optional and are not considered for conformance. #REPORT: YYYYMMDDHHMMSS FILTERED 28 0 2 2 2 0 (version unknown) 220.018167 s: VX_ZONE_INIT:[tivxHostDeInitLocal:115] De-Initialization Done for HOST !!! 220.022578 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! APP: Deinit ... !!! REMOTE_SERVICE: Deinit ... !!! REMOTE_SERVICE: Deinit ... Done !!! IPC: Deinit ... !!! IPC: DeInit ... Done !!! MEM: Deinit ... !!! DDR_SHARED_MEM: Alloc's: 16 alloc's of 33179328 bytes DDR_SHARED_MEM: Free's : 16 free's of 33179328 bytes DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! APP: Deinit ... Done !!!
You can refer to this code to enable csitx.
Regards,
Adam
Hi Adam,
My test results are as follows:
root@j721e-evm:/opt/vision_apps# ./vx_app_conformance_video_io.out --filter=tivxVideoIOCsitxCsirx* APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 18562.682024 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 18562.682103 s: VX_ZONE_INIT:Enabled 18562.682111 s: VX_ZONE_ERROR:Enabled 18562.682116 s: VX_ZONE_WARNING:Enabled 18562.682852 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 18562.683942 s: VX_ZONE_INIT:[tivxHostInitLocal:96] Initialization Done for HOST !!! VxTests version: unknown VCS version: unknown Build config: Release [ ======== ] Total 26 tests from 4 test cases Use test filter: tivxVideoIOCsitxCsirx* Use global OpenVX context: FALSE [ ======== ] [ ALL DONE ] 0 test(s) from 0 test case(s) ran [ PASSED ] 0 test(s) [ FAILED ] 0 test(s) [ DISABLED ] 0 test(s) ================================= OpenVX Conformance report summary ================================= To be conformant to the OpenVX baseline, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. To be conformant to the User Data Object extension, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. Note: The 0 disabled tests are optional and are not considered for conformance. #REPORT: YYYYMMDDHHMMSS FILTERED 26 0 0 0 0 0 (version unknown) 18562.684178 s: VX_ZONE_INIT:[tivxHostDeInitLocal:110] De-Initialization Done for HOST !!! 18562.688754 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! APP: Deinit ... !!! REMOTE_SERVICE: Deinit ... !!! REMOTE_SERVICE: Deinit ... Done !!! IPC: Deinit ... !!! IPC: DeInit ... Done !!! MEM: Deinit ... !!! DDR_SHARED_MEM: Alloc's: 0 alloc's of 0 bytes DDR_SHARED_MEM: Free's : 0 free's of 0 bytes DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! APP: Deinit ... Done !!!
Regards,
Cesar
Hi Adam,
I also tested displayM2M.
root@j721e-evm:/opt/vision_apps# ./vx_app_conformance_video_io.out --filter=tivxVideoIODisplayM2M* APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 19894.371286 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 19894.371368 s: VX_ZONE_INIT:Enabled 19894.371376 s: VX_ZONE_ERROR:Enabled 19894.371381 s: VX_ZONE_WARNING:Enabled 19894.372124 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 19894.373034 s: VX_ZONE_INIT:[tivxHostInitLocal:96] Initialization Done for HOST !!! VxTests version: unknown VCS version: unknown Build config: Release [ ======== ] Total 26 tests from 4 test cases Use test filter: tivxVideoIODisplayM2M* Use global OpenVX context: FALSE [ -------- ] tests from tivxVideoIODisplayM2M [ RUN 0001 ] tivxVideoIODisplayM2M.tivxVideoIODisplayM2Mtest/0/DisplayM2M/Width=1920/Height=1080/loopCount=1000 ... Starting Display M2M Conformance Test... 19894.374319 s: VX_ZONE_ERROR:[tivxVideoIOLoadKernels:116] __________________tivxVideoIOLoadKernels_____________________ Creating Task 0... Creating Task 1... Waiting for graphs to finish execution... Graph 1: created... Graph 1: input and output images created... Graph 0: created... Graph 0: input and output images created... Added 'DSS_M2M1' node in graph 0 Graph 0: verifying... 19894.391758 s: VX_ZONE_ERROR:[ownNodeKernelInit:495] _________2____status = 0_______ 19894.396385 s: VX_ZONE_ERROR:[ownContextSendCmd:822] Command ack message returned failure cmd_status: -7 19894.396424 s: VX_ZONE_ERROR:[ownContextSendCmd:862] tivxEventWait() failed. 19894.396434 s: VX_ZONE_ERROR:[ownNodeKernelInit:521] _________3____status = -1_______ 19894.396440 s: VX_ZONE_ERROR:[ownNodeKernelInit:530] Target kernel, TIVX_CMD_NODE_CREATE failed for node node_81 19894.396448 s: VX_ZONE_ERROR:[ownNodeKernelInit:531] Please be sure the target callbacks have been registered for this core 19894.396454 s: VX_ZONE_ERROR:[ownNodeKernelInit:532] If the target callbacks have been registered, please ensure no errors are occurring within the create callback of this kernel 19894.396463 s: VX_ZONE_ERROR:[ownGraphNodeKernelInit:583] kernel init for node 0, kernel com.ti.displaym2m ... failed !!! 19894.396477 s: VX_ZONE_ERROR:[vxVerifyGraph:2055] Node kernel init failed 19894.396484 s: VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed FAILED at /home/cesar/sdb/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/video_io/kernels/video_io/test/test_display_m2m.c:289 Expected: VX_SUCCESS == vxVerifyGraph(m2m_graph) Actual: VX_SUCCESS != VX_FAILURE Added 'DSS_M2M2' node in graph 1 Graph 1: verifying... 19894.398577 s: VX_ZONE_ERROR:[ownNodeKernelInit:495] _________2____status = 0_______ 19894.399269 s: VX_ZONE_ERROR:[ownContextSendCmd:822] Command ack message returned failure cmd_status: -7 19894.399304 s: VX_ZONE_ERROR:[ownContextSendCmd:862] tivxEventWait() failed. 19894.399312 s: VX_ZONE_ERROR:[ownNodeKernelInit:521] _________3____status = -1_______ 19894.399318 s: VX_ZONE_ERROR:[ownNodeKernelInit:530] Target kernel, TIVX_CMD_NODE_CREATE failed for node node_83 19894.399324 s: VX_ZONE_ERROR:[ownNodeKernelInit:531] Please be sure the target callbacks have been registered for this core 19894.399330 s: VX_ZONE_ERROR:[ownNodeKernelInit:532] If the target callbacks have been registered, please ensure no errors are occurring within the create callback of this kernel 19894.399338 s: VX_ZONE_ERROR:[ownGraphNodeKernelInit:583] kernel init for node 0, kernel com.ti.displaym2m ... failed !!! 19894.399348 s: VX_ZONE_ERROR:[vxVerifyGraph:2055] Node kernel init failed 19894.399354 s: VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed FAILED at /home/cesar/sdb/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/video_io/kernels/video_io/test/test_display_m2m.c:289 Expected: VX_SUCCESS == vxVerifyGraph(m2m_graph) Actual: VX_SUCCESS != VX_FAILURE
Regards,
Cesar
Hi Cesar,
Is display m2m path enabled while doing initialization? can you please share your log of vision_apps_init.sh script?
Regards,
Brijesh
Hi Brijesh,
root@j721e-evm:/opt/vision_apps# ./vision_apps_init.sh root@j721e-evm:/opt/vision_apps# [MCU2_0] 3.091539 s: CIO: Init ... Done !!! [MCU2_0] 3.091616 s: ### CPU Frequency = 1000000000 Hz [MCU2_0] 3.091659 s: CPU is running FreeRTOS [MCU2_0] 3.091686 s: APP: Init ... !!! [MCU2_0] 3.091707 s: SCICLIENT: Init ... !!! [MCU2_0] 3.091942 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [MCU2_0] 3.091994 s: SCICLIENT: DMSC FW revision 0x9 [MCU2_0] 3.092027 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_0] 3.092055 s: SCICLIENT: Init ... Done !!! [MCU2_0] 3.092080 s: UDMA: Init ... !!! [MCU2_0] 3.093379 s: UDMA: Init ... Done !!! [MCU2_0] 3.093449 s: MEM: Init ... !!! [MCU2_0] 3.093490 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!! [MCU2_0] 3.093558 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! [MCU2_0] 3.093607 s: MEM: Init ... Done !!! [MCU2_0] 3.093631 s: IPC: Init ... !!! [MCU2_0] 3.093693 s: IPC: 6 CPUs participating in IPC !!! [MCU2_0] 3.093743 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_0] 14.375014 s: IPC: HLOS is ready !!! [MCU2_0] 14.380195 s: IPC: Init ... Done !!! [MCU2_0] 14.380268 s: APP: Syncing with 5 CPUs ... !!! [MCU2_0] 14.624014 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_0] 14.624166 s: REMOTE_SERVICE: Init ... !!! [MCU2_0] 14.625498 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_0] 14.625632 s: FVID2: Init ... !!! [MCU2_0] 14.625712 s: FVID2: Init ... Done !!! [MCU2_0] 14.625750 s: VHWA: VPAC Init ... !!! [MCU2_0] 14.625776 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 [MCU2_0] 14.626062 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.626107 s: VHWA: LDC Init ... !!! [MCU2_0] 14.633115 s: VHWA: LDC Init ... Done !!! [MCU2_0] 14.633178 s: VHWA: MSC Init ... !!! [MCU2_0] 14.646608 s: VHWA: MSC Init ... Done !!! [MCU2_0] 14.646676 s: VHWA: NF Init ... !!! [MCU2_0] 14.648431 s: VHWA: NF Init ... Done !!! [MCU2_0] 14.648501 s: VHWA: VISS Init ... !!! [MCU2_0] 14.658522 s: VHWA: VISS Init ... Done !!! [MCU2_0] 14.658589 s: VHWA: VPAC Init ... Done !!! [MCU2_0] 14.658635 s: VX_ZONE_INIT:Enabled [MCU2_0] 14.658665 s: VX_ZONE_ERROR:Enabled [MCU2_0] 14.658690 s: VX_ZONE_WARNING:Enabled [MCU2_0] 14.660085 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 [MCU2_0] 14.660311 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF [MCU2_0] 14.660543 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 [MCU2_0] 14.660744 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 [MCU2_0] 14.660947 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 [MCU2_0] 14.661240 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 [MCU2_0] 14.661516 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 [MCU2_0] 14.661766 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 [MCU2_0] 14.662007 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 [MCU2_0] 14.662255 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 [MCU2_0] 14.662499 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX [MCU2_0] 14.662765 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 [MCU2_0] 14.663008 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 [MCU2_0] 14.663258 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 [MCU2_0] 14.663528 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 [MCU2_0] 14.663781 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 [MCU2_0] 14.664038 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 [MCU2_0] 14.664275 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 [MCU2_0] 14.664524 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 [MCU2_0] 14.664757 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 [MCU2_0] 14.664979 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 [MCU2_0] 14.665032 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [MCU2_0] 14.665068 s: APP: OpenVX Target kernel init ... !!! [MCU2_0] 14.680627 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_0] 14.680692 s: VISS REMOTE SERVICE: Init ... !!! [MCU2_0] 14.680778 s: VISS REMOTE SERVICE: Init ... Done !!! [MCU2_0] 14.680819 s: UDMA Copy: Init ... !!! [MCU2_0] 14.682629 s: UDMA Copy: Init ... Done !!! [MCU2_0] 14.682743 s: APP: Init ... Done !!! [MCU2_0] 14.682785 s: APP: Run ... !!! [MCU2_0] 14.682809 s: IPC: Starting echo test ... [MCU2_0] 14.684787 s: APP: Run ... Done !!! [MCU2_0] 14.686231 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 14.686341 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 14.686431 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 14.686515 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_0] 92.878798 s: VX_ZONE_ERROR:[ownTargetKernelInstanceAlloc:116] kernel com.ti.displaym2m has not been registered on this CPU [MCU2_0] 92.878870 s: VX_ZONE_ERROR:[ownTargetKernelInstanceAlloc:117] Please register this kernel on the appropriate target core [MCU2_0] 92.878929 s: VX_ZONE_ERROR:[ownTargetNodeDescNodeCreate:761] target_kernel_instance is NULL [MCU2_0] 92.970807 s: VX_ZONE_ERROR:[ownTargetKernelInstanceAlloc:116] kernel com.ti.displaym2m has not been registered on this CPU [MCU2_0] 92.970879 s: VX_ZONE_ERROR:[ownTargetKernelInstanceAlloc:117] Please register this kernel on the appropriate target core [MCU2_0] 92.970936 s: VX_ZONE_ERROR:[ownTargetNodeDescNodeCreate:761] target_kernel_instance is NULL [MCU2_1] 3.130712 s: CIO: Init ... Done !!! [MCU2_1] 3.130787 s: ### CPU Frequency = 1000000000 Hz [MCU2_1] 3.130823 s: CPU is running FreeRTOS [MCU2_1] 3.130845 s: APP: Init ... !!! [MCU2_1] 3.130864 s: SCICLIENT: Init ... !!! [MCU2_1] 3.131099 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [MCU2_1] 3.131143 s: SCICLIENT: DMSC FW revision 0x9 [MCU2_1] 3.131170 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_1] 3.131197 s: SCICLIENT: Init ... Done !!! [MCU2_1] 3.131220 s: UDMA: Init ... !!! [MCU2_1] 3.132564 s: UDMA: Init ... Done !!! [MCU2_1] 3.132624 s: MEM: Init ... !!! [MCU2_1] 3.132662 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!! [MCU2_1] 3.132723 s: MEM: Init ... Done !!! [MCU2_1] 3.132748 s: IPC: Init ... !!! [MCU2_1] 3.132802 s: IPC: 6 CPUs participating in IPC !!! [MCU2_1] 3.132845 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_1] 14.618692 s: IPC: HLOS is ready !!! [MCU2_1] 14.623900 s: IPC: Init ... Done !!! [MCU2_1] 14.623969 s: APP: Syncing with 5 CPUs ... !!! [MCU2_1] 14.624013 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_1] 14.624048 s: REMOTE_SERVICE: Init ... !!! [MCU2_1] 14.625516 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_1] 14.625648 s: FVID2: Init ... !!! [MCU2_1] 14.625713 s: FVID2: Init ... Done !!! [MCU2_1] 14.625743 s: VHWA: DMPAC: Init ... !!! [MCU2_1] 14.625767 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2 [MCU2_1] 14.625964 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 14.626001 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2 [MCU2_1] 14.626116 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 14.626147 s: VHWA: DOF Init ... !!! [MCU2_1] 14.637039 s: VHWA: DOF Init ... Done !!! [MCU2_1] 14.637104 s: VHWA: SDE Init ... !!! [MCU2_1] 14.640644 s: VHWA: SDE Init ... Done !!! [MCU2_1] 14.640707 s: VHWA: DMPAC: Init ... Done !!! [MCU2_1] 14.640754 s: VX_ZONE_INIT:Enabled [MCU2_1] 14.640784 s: VX_ZONE_ERROR:Enabled [MCU2_1] 14.640811 s: VX_ZONE_WARNING:Enabled [MCU2_1] 14.642214 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 [MCU2_1] 14.642434 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE [MCU2_1] 14.642650 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF [MCU2_1] 14.642705 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [MCU2_1] 14.642739 s: APP: OpenVX Target kernel init ... !!! [MCU2_1] 14.643010 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_1] 14.643051 s: UDMA Copy: Init ... !!! [MCU2_1] 14.645484 s: UDMA Copy: Init ... Done !!! [MCU2_1] 14.645562 s: APP: Init ... Done !!! [MCU2_1] 14.645590 s: APP: Run ... !!! [MCU2_1] 14.645611 s: IPC: Starting echo test ... [MCU2_1] 14.647537 s: APP: Run ... Done !!! [MCU2_1] 14.648688 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_1] 14.648792 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_1] 14.648872 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_1] 14.686050 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [C6x_1 ] 3.219583 s: CIO: Init ... Done !!! [C6x_1 ] 3.219608 s: ### CPU Frequency = 1350000000 Hz [C6x_1 ] 3.219619 s: CPU is running FreeRTOS [C6x_1 ] 3.219627 s: APP: Init ... !!! [C6x_1 ] 3.219634 s: SCICLIENT: Init ... !!! [C6x_1 ] 3.219821 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [C6x_1 ] 3.219834 s: SCICLIENT: DMSC FW revision 0x9 [C6x_1 ] 3.219843 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_1 ] 3.219853 s: SCICLIENT: Init ... Done !!! [C6x_1 ] 3.219862 s: UDMA: Init ... !!! [C6x_1 ] 3.221293 s: UDMA: Init ... Done !!! [C6x_1 ] 3.221313 s: MEM: Init ... !!! [C6x_1 ] 3.221325 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!! [C6x_1 ] 3.221342 s: MEM: Init ... Done !!! [C6x_1 ] 3.221351 s: IPC: Init ... !!! [C6x_1 ] 3.221371 s: IPC: 6 CPUs participating in IPC !!! [C6x_1 ] 3.221384 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_1 ] 13.854759 s: IPC: HLOS is ready !!! [C6x_1 ] 13.858440 s: IPC: Init ... Done !!! [C6x_1 ] 13.858473 s: APP: Syncing with 5 CPUs ... !!! [C6x_1 ] 14.624011 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_1 ] 14.624026 s: REMOTE_SERVICE: Init ... !!! [C6x_1 ] 14.624731 s: REMOTE_SERVICE: Init ... Done !!! [C6x_1 ] 14.624773 s: VX_ZONE_INIT:Enabled [C6x_1 ] 14.624784 s: VX_ZONE_ERROR:Enabled [C6x_1 ] 14.624794 s: VX_ZONE_WARNING:Enabled [C6x_1 ] 14.625665 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [C6x_1 ] 14.625682 s: APP: OpenVX Target kernel init ... !!! [C6x_1 ] 14.625992 s: APP: OpenVX Target kernel init ... Done !!! [C6x_1 ] 14.626009 s: UDMA Copy: Init ... !!! [C6x_1 ] 14.630615 s: UDMA Copy: Init ... Done !!! [C6x_1 ] 14.630637 s: APP: Init ... Done !!! [C6x_1 ] 14.630648 s: APP: Run ... !!! [C6x_1 ] 14.630657 s: IPC: Starting echo test ... [C6x_1 ] 14.631838 s: APP: Run ... Done !!! [C6x_1 ] 14.632168 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[.] [C6x_1 ] 14.632205 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 14.648418 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 14.685904 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_2 ] 3.316160 s: CIO: Init ... Done !!! [C6x_2 ] 3.316185 s: ### CPU Frequency = 1350000000 Hz [C6x_2 ] 3.316195 s: CPU is running FreeRTOS [C6x_2 ] 3.316203 s: APP: Init ... !!! [C6x_2 ] 3.316212 s: SCICLIENT: Init ... !!! [C6x_2 ] 3.316394 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [C6x_2 ] 3.316406 s: SCICLIENT: DMSC FW revision 0x9 [C6x_2 ] 3.316415 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_2 ] 3.316426 s: SCICLIENT: Init ... Done !!! [C6x_2 ] 3.316436 s: UDMA: Init ... !!! [C6x_2 ] 3.317917 s: UDMA: Init ... Done !!! [C6x_2 ] 3.317937 s: MEM: Init ... !!! [C6x_2 ] 3.317951 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ e0000000 of size 16777216 bytes !!! [C6x_2 ] 3.317968 s: MEM: Init ... Done !!! [C6x_2 ] 3.317976 s: IPC: Init ... !!! [C6x_2 ] 3.317997 s: IPC: 6 CPUs participating in IPC !!! [C6x_2 ] 3.318011 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_2 ] 13.968943 s: IPC: HLOS is ready !!! [C6x_2 ] 13.972549 s: IPC: Init ... Done !!! [C6x_2 ] 13.972575 s: APP: Syncing with 5 CPUs ... !!! [C6x_2 ] 14.624011 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_2 ] 14.624026 s: REMOTE_SERVICE: Init ... !!! [C6x_2 ] 14.624729 s: REMOTE_SERVICE: Init ... Done !!! [C6x_2 ] 14.624770 s: VX_ZONE_INIT:Enabled [C6x_2 ] 14.624781 s: VX_ZONE_ERROR:Enabled [C6x_2 ] 14.624791 s: VX_ZONE_WARNING:Enabled [C6x_2 ] 14.625653 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [C6x_2 ] 14.625670 s: APP: OpenVX Target kernel init ... !!! [C6x_2 ] 14.625981 s: APP: OpenVX Target kernel init ... Done !!! [C6x_2 ] 14.625997 s: UDMA Copy: Init ... !!! [C6x_2 ] 14.630136 s: UDMA Copy: Init ... Done !!! [C6x_2 ] 14.630156 s: APP: Init ... Done !!! [C6x_2 ] 14.630166 s: APP: Run ... !!! [C6x_2 ] 14.630175 s: IPC: Starting echo test ... [C6x_2 ] 14.631261 s: APP: Run ... Done !!! [C6x_2 ] 14.631575 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[x] C66X_2[s] C7X_1[P] [C6x_2 ] 14.632157 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 14.648448 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 14.685931 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C7x_1 ] 3.559278 s: CIO: Init ... Done !!! [C7x_1 ] 3.559293 s: ### CPU Frequency = 1000000000 Hz [C7x_1 ] 3.559304 s: CPU is running FreeRTOS [C7x_1 ] 3.559312 s: APP: Init ... !!! [C7x_1 ] 3.559320 s: SCICLIENT: Init ... !!! [C7x_1 ] 3.559516 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [C7x_1 ] 3.559530 s: SCICLIENT: DMSC FW revision 0x9 [C7x_1 ] 3.559541 s: SCICLIENT: DMSC FW ABI revision 3.1 [C7x_1 ] 3.559551 s: SCICLIENT: Init ... Done !!! [C7x_1 ] 3.559560 s: UDMA: Init ... !!! [C7x_1 ] 3.560662 s: UDMA: Init ... Done !!! [C7x_1 ] 3.560675 s: MEM: Init ... !!! [C7x_1 ] 3.560687 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!! [C7x_1 ] 3.560709 s: MEM: Init ... Done !!! [C7x_1 ] 3.560718 s: IPC: Init ... !!! [C7x_1 ] 3.560732 s: IPC: 6 CPUs participating in IPC !!! [C7x_1 ] 3.560746 s: IPC: Waiting for HLOS to be ready ... !!! [C7x_1 ] 14.079782 s: IPC: HLOS is ready !!! [C7x_1 ] 14.081894 s: IPC: Init ... Done !!! [C7x_1 ] 14.081908 s: APP: Syncing with 5 CPUs ... !!! [C7x_1 ] 14.624013 s: APP: Syncing with 5 CPUs ... Done !!! [C7x_1 ] 14.624029 s: REMOTE_SERVICE: Init ... !!! [C7x_1 ] 14.624195 s: REMOTE_SERVICE: Init ... Done !!! [C7x_1 ] 14.624216 s: VX_ZONE_INIT:Enabled [C7x_1 ] 14.624228 s: VX_ZONE_ERROR:Enabled [C7x_1 ] 14.624238 s: VX_ZONE_WARNING:Enabled [C7x_1 ] 14.624458 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 [C7x_1 ] 14.624537 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 [C7x_1 ] 14.624612 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 [C7x_1 ] 14.624686 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 [C7x_1 ] 14.624761 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 [C7x_1 ] 14.624853 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 [C7x_1 ] 14.624975 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 [C7x_1 ] 14.625050 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 [C7x_1 ] 14.625073 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [C7x_1 ] 14.625085 s: APP: OpenVX Target kernel init ... !!! [C7x_1 ] 14.625259 s: APP: OpenVX Target kernel init ... Done !!! [C7x_1 ] 14.625272 s: APP: Init ... Done !!! [C7x_1 ] 14.625282 s: APP: Run ... !!! [C7x_1 ] 14.625290 s: IPC: Starting echo test ... [C7x_1 ] 14.625446 s: APP: Run ... Done !!! [C7x_1 ] 14.631581 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[x] C66X_2[P] C7X_1[s] [C7x_1 ] 14.632177 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 14.648472 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 14.685980 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]
Regards,
Cesar
Hi Cesar,
But i dont see any DSS initialization on mcu2_0, are you sure that DSS is enabled on mcu2_0? and disabled from Linux?
Usually, if DSS is enabled, it should print that output is eDP and DSS M2M is enabled in mcu2_0 log, i dont see such prints..
Regards,
Brijesh
Hi Brijesh,
dss is enabled on the Linux;
However, CSITX is not used in linux; Why can't it be used on mcu2_0 either
root@j721e-evm:/opt/vision_apps# ./vx_app_conformance_video_io.out --filter=tivxVideoIOCsitxCsirx* APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 18562.682024 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 18562.682103 s: VX_ZONE_INIT:Enabled 18562.682111 s: VX_ZONE_ERROR:Enabled 18562.682116 s: VX_ZONE_WARNING:Enabled 18562.682852 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 18562.683942 s: VX_ZONE_INIT:[tivxHostInitLocal:96] Initialization Done for HOST !!! VxTests version: unknown VCS version: unknown Build config: Release [ ======== ] Total 26 tests from 4 test cases Use test filter: tivxVideoIOCsitxCsirx* Use global OpenVX context: FALSE [ ======== ] [ ALL DONE ] 0 test(s) from 0 test case(s) ran [ PASSED ] 0 test(s) [ FAILED ] 0 test(s) [ DISABLED ] 0 test(s) ================================= OpenVX Conformance report summary ================================= To be conformant to the OpenVX baseline, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. To be conformant to the User Data Object extension, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. Note: The 0 disabled tests are optional and are not considered for conformance. #REPORT: YYYYMMDDHHMMSS FILTERED 26 0 0 0 0 0 (version unknown) 18562.684178 s: VX_ZONE_INIT:[tivxHostDeInitLocal:110] De-Initialization Done for HOST !!! 18562.688754 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! APP: Deinit ... !!! REMOTE_SERVICE: Deinit ... !!! REMOTE_SERVICE: Deinit ... Done !!! IPC: Deinit ... !!! IPC: DeInit ... Done !!! MEM: Deinit ... !!! DDR_SHARED_MEM: Alloc's: 0 alloc's of 0 bytes DDR_SHARED_MEM: Free's : 0 free's of 0 bytes DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! APP: Deinit ... Done !!!
Regards,
Cesar
Hi Cesar,
If DSS is enabled on Linux, we cannot enable DSS M2M on RTOS. If you need DSS M2M node, then please disable DSS from Linux and enable it on RTOS.
Regards,
Brijesh
Hi Brijesh,
Please pay attention to the above CSITX-related issues, mainly to solve this problem
Regards,
Cesar
Hi Cesar,
But have you enabled CSITX on mcu2_0? I dont see it in the vision apps init scritp.
Regards,
Brijesh
Hi Cesar,
Please check my log of vision_apps_init.sh:
root@j721e-evm:/opt/vision_apps# [MCU2_0] 3.992787 s: CIO: Init ... Done !!! [MCU2_0] 3.992861 s: ### CPU Frequency = 1000000000 Hz [MCU2_0] 3.992898 s: CPU is running FreeRTOS [MCU2_0] 3.992917 s: APP: Init ... !!! [MCU2_0] 3.992936 s: SCICLIENT: Init ... !!! [MCU2_0] 3.993131 s: SCICLIENT: DMSC FW version [9.1.2--v09.01.02 (Kool Koala)] [MCU2_0] 3.993173 s: SCICLIENT: DMSC FW revision 0x9 [MCU2_0] 3.993200 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_0] 3.993226 s: SCICLIENT: Init ... Done !!! [MCU2_0] 3.993248 s: UDMA: Init ... !!! [MCU2_0] 3.994311 s: UDMA: Init ... Done !!! [MCU2_0] 3.994368 s: MEM: Init ... !!! [MCU2_0] 3.994406 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!! [MCU2_0] 3.994466 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! [MCU2_0] 3.994510 s: MEM: Init ... Done !!! [MCU2_0] 3.994530 s: IPC: Init ... !!! [MCU2_0] 3.994581 s: IPC: 6 CPUs participating in IPC !!! [MCU2_0] 3.994636 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_0] 13.416861 s: IPC: HLOS is ready !!! [MCU2_0] 13.421874 s: IPC: Init ... Done !!! [MCU2_0] 13.421939 s: APP: Syncing with 5 CPUs ... !!! [MCU2_0] 13.614973 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_0] 13.615112 s: REMOTE_SERVICE: Init ... !!! [MCU2_0] 13.616235 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_0] 13.616292 s: ETHFW: Init ... !!! [MCU2_0] 13.722162 s: ETHFW: Warning: Using 6 random MAC address(es) [MCU2_0] 13.722524 s: ETHFW: CPSW recovery is not enabled [MCU2_0] 13.722611 s: ETHFW: Shared multicasts: [MCU2_0] 13.722659 s: ETHFW: 01:00:5e:00:00:01 [MCU2_0] 13.722694 s: ETHFW: 01:00:5e:00:00:fb [MCU2_0] 13.722723 s: ETHFW: 01:00:5e:00:00:fc [MCU2_0] 13.722752 s: ETHFW: 33:33:00:00:00:01 [MCU2_0] 13.722781 s: ETHFW: 33:33:ff:1d:92:c2 [MCU2_0] 13.722808 s: ETHFW: 01:80:c2:00:00:00 [MCU2_0] 13.722835 s: ETHFW: 01:80:c2:00:00:03 [MCU2_0] 13.722860 s: ETHFW: Reserved multicasts: [MCU2_0] 13.722889 s: ETHFW: 01:80:c2:00:00:0e [MCU2_0] 13.722920 s: ETHFW: 01:1b:19:00:00:00 [MCU2_0] 13.723104 s: EnetMcm: CPSW_9G on MAIN NAVSS [MCU2_0] 13.730332 s: Mdio_open: MDIO manual mode enabled [MCU2_0] 13.730404 s: [MCU2_0] 13.739751 s: ETHFW: 0 VLAN entries added in ALE table [MCU2_0] 13.740073 s: [MCU2_0] ETHFW Version : 0.04.00 [MCU2_0] 13.740124 s: ETHFW Build Date: Dec 7, 2023 [MCU2_0] 13.740151 s: ETHFW Build Time: 09:42:18 [MCU2_0] 13.740172 s: ETHFW Commit SHA: [MCU2_0] 13.740235 s: ETHFW: Init ... DONE !!! [MCU2_0] 13.740419 s: unibase-1.1.4-jacinto [MCU2_0] 13.741092 s: Starting lwIP, local interface IP is dhcp-enabled [MCU2_0] 13.747711 s: ETHFW: Host MAC address: 70:4d:34:53:10:59 [MCU2_0] 13.750425 s: ETHFW: Enable gPTP on MAC port 2 (tilld2) [MCU2_0] 13.750480 s: ETHFW: Enable gPTP on MAC port 3 (tilld3) [MCU2_0] 13.750519 s: ETHFW: Enable gPTP on MAC port 5 (tilld5) [MCU2_0] 13.750549 s: ETHFW: Enable gPTP on MAC port 6 (tilld6) [MCU2_0] 13.750579 s: ETHFW: Enable gPTP on MAC port 7 (tilld7) [MCU2_0] 13.750625 s: ETHFW: Enable gPTP on MAC port 8 (tilld8) [MCU2_0] 13.750767 s: ETHFW: TimeSync PTP enabled [MCU2_0] 13.750805 s: ETHFW: Remove server Init ... !!! [MCU2_0] 13.750889 s: ETHFW: Virtual port configuration: [MCU2_0] 13.751581 s: ETHFW: CpswProxyServer: initialization completed (core: mcu2_0) [MCU2_0] 13.751654 s: ETHFW: Remove server Init ... DONE !!! [MCU2_0] 13.752837 s: [LWIPIF_LWIP] Enet LLD netif initialized successfully [MCU2_0] 13.759508 s: [LWIPIF_LWIP_IC] Interface started successfully [MCU2_0] 13.759578 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS [MCU2_0] 13.766145 s: [LWIPIF_LWIP_IC] Interface started successfully [MCU2_0] 13.766213 s: [LWIPIF_LWIP_IC] NETIF INIT SUCCESS [MCU2_0] 13.766306 s: Added interface 'br3', IP is 0.0.0.0 [MCU2_0] 13.779996 s: ETHFW: EthFw_gptpTask: gptpman_run() failed: -1 [MCU2_0] 13.801612 s: FVID2: Init ... !!! [MCU2_0] 13.801718 s: FVID2: Init ... Done !!! [MCU2_0] 13.801766 s: DSS: Init ... !!! [MCU2_0] 13.801790 s: DSS: Display type is eDP !!! [MCU2_0] 13.801813 s: DSS: M2M Path is enabled !!! [MCU2_0] 13.801836 s: DSS: SoC init ... !!! [MCU2_0] 13.801855 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 [MCU2_0] 13.802025 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.802057 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2 [MCU2_0] 13.802194 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.802220 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2 [MCU2_0] 13.802320 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.802348 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11 [MCU2_0] 13.802438 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 13.802466 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18 [MCU2_0] 13.802553 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 13.802580 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2 [MCU2_0] 13.802788 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 13.802828 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000 [MCU2_0] 13.803920 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success [MCU2_0] 13.803967 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0 [MCU2_0] 13.804091 s: SCICLIENT: Sciclient_pmModuleClkRequest success [MCU2_0] 13.804123 s: DSS: SoC init ... Done !!! [MCU2_0] 13.804147 s: DSS: Board init ... !!! [MCU2_0] 13.804167 s: DSS: Board init ... Done !!! [MCU2_0] 13.823279 s: DSS: Init ... Done !!! [MCU2_0] 13.823348 s: VHWA: VPAC Init ... !!! [MCU2_0] 13.823375 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 [MCU2_0] 13.823551 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.823728 s: VHWA: LDC Init ... !!! [MCU2_0] 13.826919 s: VHWA: LDC Init ... Done !!! [MCU2_0] 13.826985 s: VHWA: MSC Init ... !!! [MCU2_0] 13.837123 s: VHWA: MSC Init ... Done !!! [MCU2_0] 13.837188 s: VHWA: NF Init ... !!! [MCU2_0] 13.838865 s: VHWA: NF Init ... Done !!! [MCU2_0] 13.838928 s: VHWA: VISS Init ... !!! [MCU2_0] 13.848973 s: VHWA: VISS Init ... Done !!! [MCU2_0] 13.849040 s: VHWA: VPAC Init ... Done !!! [MCU2_0] 13.849086 s: VX_ZONE_INIT:Enabled [MCU2_0] 13.849114 s: VX_ZONE_ERROR:Enabled [MCU2_0] 13.849135 s: VX_ZONE_WARNING:Enabled [MCU2_0] 13.850809 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 [MCU2_0] 13.851059 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF [MCU2_0] 13.851274 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 [MCU2_0] 13.851480 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 [MCU2_0] 13.851879 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 [MCU2_0] 13.852172 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 [MCU2_0] 13.852424 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 [MCU2_0] 13.852807 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 [MCU2_0] 13.853082 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 [MCU2_0] 13.853327 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 [MCU2_0] 13.853545 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX [MCU2_0] 13.853957 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 [MCU2_0] 13.854213 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 [MCU2_0] 13.854453 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 [MCU2_0] 13.854840 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 [MCU2_0] 13.855129 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 [MCU2_0] 13.855379 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 [MCU2_0] 13.855756 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 [MCU2_0] 13.856021 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 [MCU2_0] 13.856255 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 [MCU2_0] 13.856520 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 [MCU2_0] 13.856790 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [MCU2_0] 13.856833 s: APP: OpenVX Target kernel init ... !!! [MCU2_0] 13.874256 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_0] 13.874323 s: CSI2RX: Init ... !!! [MCU2_0] 13.874349 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 13.874453 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.874486 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2 [MCU2_0] 13.874709 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.874757 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2 [MCU2_0] 13.874863 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.874893 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2 [MCU2_0] 13.874970 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.874996 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2 [MCU2_0] 13.875062 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.875262 s: CSI2RX: Init ... Done !!! [MCU2_0] 13.875300 s: CSI2TX: Init ... !!! [MCU2_0] 13.875323 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 13.875390 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.875418 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2 [MCU2_0] 13.875509 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.875534 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2 [MCU2_0] 13.875714 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 13.875828 s: CSI2TX: Init ... Done !!! [MCU2_0] 13.875865 s: ISS: Init ... !!! [MCU2_0] 13.875899 s: IssSensor_Init ... Done !!! [MCU2_0] 13.875975 s: IttRemoteServer_Init ... Done !!! [MCU2_0] 13.876005 s: ISS: Init ... Done !!! [MCU2_0] 13.876028 s: VISS REMOTE SERVICE: Init ... !!! [MCU2_0] 13.876085 s: VISS REMOTE SERVICE: Init ... Done !!! [MCU2_0] 13.876115 s: UDMA Copy: Init ... !!! [MCU2_0] 13.877887 s: UDMA Copy: Init ... Done !!! [MCU2_0] 13.877996 s: APP: Init ... Done !!! [MCU2_0] 13.878033 s: APP: Run ... !!! [MCU2_0] 13.878057 s: IPC: Starting echo test ... [MCU2_0] 13.880211 s: APP: Run ... Done !!! [MCU2_0] 13.881534 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 13.881744 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 13.881885 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_0] 13.882004 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_0] 14.739821 s: INF:cbase:cb_rawsock_open:dmaTxChId=-1 dmaRxChId=-1 nTxPkts=0 nRxPkts=0 pktSize=0 [MCU2_0] INF:gptp:gptpnet_init:Open lldtsync OK! [MCU2_0] fatal error:gptp_capable_receive_sm_init - malloc2 [MCU2_0] fatal error:announce_interval_setting_sm_init - malloc1 [MCU2_0] fatal error:one_step_tx_oper_setting_sm_init - malloc1 [MCU2_0] fatal error:md_announce_send_sm_init - malloc1 [MCU2_0] fatal error:md_announce_receive_sm_init - malloc1 [MCU2_0] fatal error:md_signaling_send_sm_init - malloc [MCU2_0] fatal error:md_signaling_receive_sm_init - malloc [MCU2_0] fatal error:port_state_setting_ext_sm_init - malloc1 [MCU2_0] 15.001256 s: ETHFW: VIRT_PORT_INFO | C2S | core=0 endpt=1026 [MCU2_0] 15.001321 s: ETHFW: VIRT_PORT_INFO | S2C | switchPortMask=1 macPortMask=10 [MCU2_0] 15.008078 s: ETHFW: ATTACH_EXT | C2S | core=0 endpt=1026 virtPort=0 [MCU2_0] 15.008316 s: ETHFW: ATTACH_EXT | S2C | token=0 rxMtu=1522 features=9 flow=172,0 rxPsil=0x4a00 txPsil=0xca00 macAddr=70:27:66 [MCU2_0] 15.035244 s: ETHFW: ATTACH_EXT | C2S | core=0 endpt=1026 virtPort=4 [MCU2_0] 15.035449 s: ETHFW: ATTACH_EXT | S2C | token=400 rxMtu=1522 features=1 flow=172,1 rxPsil=0x4a00 txPsil=0xca01 macAddr=70:692 [MCU2_0] 15.317051 s: ETHFW: REGISTER_MAC | C2S | core=0 endpt=1026 token=400 macAdd=70:69:5c:65:26:52 flowIdx=172,1 [MCU2_0] 15.318795 s: ETHFW: REGISTER_MAC | S2C | status=0 [MCU2_0] 15.394445 s: ETHFW: REGISTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=70:27:60:b1:0b:66 flowIdx=172,0 [MCU2_0] 15.397720 s: Cpsw_ioctlInternal: Registered MAC address (ALE entry=9, policer entry=2) [MCU2_0] 15.397780 s: [MCU2_0] 15.397815 s: ETHFW: REGISTER_MAC | S2C | status=0 [MCU2_0] 15.407993 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:00:00:01 vlanId=65535 flowIdx=172,0 [MCU2_0] 15.409705 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 15.409917 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:00:5e:00:00:01 vlanId=65535 flowIdx=172,0 [MCU2_0] 15.411543 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 15.411851 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:ff:b1:0b:66 vlanId=65535 flowIdx=172,0 [MCU2_0] 15.415077 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 15.415268 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:00 vlanId=65535 flowIdx=172,0 [MCU2_0] 15.416952 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 15.417115 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:03 vlanId=65535 flowIdx=172,0 [MCU2_0] 15.418823 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 15.419006 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=01:80:c2:00:00:0e vlanId=65535 flowIdx=172,0 [MCU2_0] 15.419072 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 16.857261 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:00:00:fb vlanId=65535 flowIdx=172,0 [MCU2_0] 16.860517 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_0] 16.860804 s: ETHFW: ADD_FILTER_MAC | C2S | core=0 endpt=1026 token=0 macAdd=33:33:00:01:00:03 vlanId=65535 flowIdx=172,0 [MCU2_0] 16.864032 s: ETHFW: ADD_FILTER_MAC | S2C | status=0 [MCU2_1] 3.967069 s: CIO: Init ... Done !!! [MCU2_1] 3.967142 s: ### CPU Frequency = 1000000000 Hz [MCU2_1] 3.967178 s: CPU is running FreeRTOS [MCU2_1]
That tiovx target does not mean csitx hardware is enabled. You should check if there is something like this:
CSI2TX: Init ... !!!
Regards,
Adam
Hi Adam & Brijesh,
I got a new PC, re-downloaded the sdk and recompiled it
xiamenvt@xiamenvt-RH2288-V3:~/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/sdk_builder$ make sdk_show_config
#
### Below make variables control how the SDK is built. Modify as required.
#
### Build flags in sdk_builder/vision_apps_build_flags.mak,
#
# PSDK_VERSION=9.0.0
#
# BUILD_CPU_MPU1=yes
# BUILD_CPU_MCU2_0=yes
# BUILD_CPU_MCU2_1=yes
# BUILD_CPU_C6x_1=yes
# BUILD_CPU_C6x_2=yes
# BUILD_CPU_C7x_1=yes
# BUILD_CPU_C7x_2=
# BUILD_CPU_C7x_3=
# BUILD_CPU_C7x_4=
# BUILD_CPU_MCU1_0=no
# BUILD_CPU_MCU1_1=no
# BUILD_CPU_MCU3_0=no
# BUILD_CPU_MCU3_1=no
# BUILD_CPU_MCU4_0=
# BUILD_CPU_MCU4_1=
#
# BUILD_EDGEAI=no
# BUILD_PTK=yes
# BUILD_ENABLE_ETHFW=no
# ETHFW_INTERCORE_ETH_SUPPORT=
#
# BUILD_APP_RTOS_FILEIO=no
# BUILD_APP_RTOS_LINUX=yes
# BUILD_APP_RTOS_QNX=no
#
# BUILD_MCU_PLUS_SDK_DEVICE=
#
# HS=0
#
# BUILD_MCU_BOARD_DEPENDENCIES=yes
# FIRMWARE_SUBFOLDER=vision_apps_evm
# UENV_NAME=uEnv_j721e_vision_apps.txt
#
# LINK_SHARED_OBJ=yes
#
# BUILD_ISA_R5F=yes
# BUILD_ISA_C6x=yes
# BUILD_ISA_C7x=yes
# BUILD_ISA_MPU=yes
#
### Build flags in sdk_builder/build_flags.mak,
#
# BUILD_IGNORE_LIB_ORDER=yes
#
# BUILD_TARGET_MODE=yes
# BUILD_EMULATION_MODE=no
# BUILD_EMULATION_ARCH=x86_64
#
# PROFILE=release
# BUILD_QNX_MPU=no
# BUILD_LINUX_MPU=yes
# RTOS=FREERTOS
# BUILD_PDK_BOARD=j721e_evm
# RTOS_SDK=pdk
#
# TARGET_SOC=J721E
# SOC_DEF=SOC_J721E
# VPAC_VERSION=VPAC1
# C7X_TARGET=C71
# C7X_VERSION=C7100
# MPU_CPU=A72
#
### Build flags in tiovx/build_flags.mak,
#
# BUILD_CONFORMANCE_TEST=yes
# BUILD_TUTORIAL=yes
# BUILD_BAM=no
#
# BUILD_CT_KHR=yes
# BUILD_CT_TIOVX=yes
# BUILD_CT_TIOVX_TEST_KERNELS=yes
# BUILD_CT_TIOVX_IVISION=yes
# BUILD_CT_TIOVX_TIDL=yes
# BUILD_VLAB=no
#
### Build flags in imaging/build_flags.mak,
#
# BUILD_HWA_KERNELS=yes
# BUILD_VPAC_VISS=yes
# BUILD_VPAC_MSC=yes
# BUILD_VPAC_LDC=yes
#
# BUILD_DMPAC_DOF=yes
# BUILD_DMPAC_SDE=yes
# BUILD_VPAC_NF=yes
#
# BUILD_CT_TIOVX_HWA=yes
# BUILD_CT_TIOVX_HWA_NEGATIVE_TESTS=yes
#
root@j721e-evm:~# /opt/vision_apps/vision_apps_init.sh root@j721e-evm:~# [MCU2_0] 3.074241 s: CIO: Init ... Done !!! [MCU2_0] 3.074318 s: ### CPU Frequency = 1000000000 Hz [MCU2_0] 3.074359 s: CPU is running FreeRTOS [MCU2_0] 3.074384 s: APP: Init ... !!! [MCU2_0] 3.074405 s: SCICLIENT: Init ... !!! [MCU2_0] 3.074638 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [MCU2_0] 3.074687 s: SCICLIENT: DMSC FW revision 0x9 [MCU2_0] 3.074714 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_0] 3.074744 s: SCICLIENT: Init ... Done !!! [MCU2_0] 3.074768 s: UDMA: Init ... !!! [MCU2_0] 3.076076 s: UDMA: Init ... Done !!! [MCU2_0] 3.076142 s: MEM: Init ... !!! [MCU2_0] 3.076187 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!! [MCU2_0] 3.076255 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! [MCU2_0] 3.076306 s: MEM: Init ... Done !!! [MCU2_0] 3.076331 s: IPC: Init ... !!! [MCU2_0] 3.076389 s: IPC: 6 CPUs participating in IPC !!! [MCU2_0] 3.076435 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_0] 15.047454 s: IPC: HLOS is ready !!! [MCU2_0] 15.052674 s: IPC: Init ... Done !!! [MCU2_0] 15.052746 s: APP: Syncing with 5 CPUs ... !!! [MCU2_0] 15.188068 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_0] 15.188203 s: REMOTE_SERVICE: Init ... !!! [MCU2_0] 15.189533 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_0] 15.189668 s: FVID2: Init ... !!! [MCU2_0] 15.189746 s: FVID2: Init ... Done !!! [MCU2_0] 15.189794 s: DSS: Init ... !!! [MCU2_0] 15.189820 s: DSS: Display type is eDP !!! [MCU2_0] 15.189844 s: DSS: M2M Path is enabled !!! [MCU2_0] 15.189865 s: DSS: SoC init ... !!! [MCU2_0] 15.189884 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 [MCU2_0] 15.190125 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 15.190171 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2 [MCU2_0] 15.190596 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 15.190632 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2 [MCU2_0] 15.191032 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 15.191073 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11 [MCU2_0] 15.191571 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 15.191606 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18 [MCU2_0] 15.192058 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 15.192099 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2 [MCU2_0] 15.192523 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 15.192559 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000 [MCU2_0] 15.193956 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success [MCU2_0] 15.193998 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0 [MCU2_0] 15.194545 s: SCICLIENT: Sciclient_pmModuleClkRequest success [MCU2_0] 15.194586 s: DSS: SoC init ... Done !!! [MCU2_0] 15.194612 s: DSS: Board init ... !!! [MCU2_0] 15.194636 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!! [MCU2_1] 3.105861 s: CIO: Init ... Done !!! [MCU2_1] 3.105935 s: ### CPU Frequency = 1000000000 Hz [MCU2_1] 3.105971 s: CPU is running FreeRTOS [MCU2_1] 3.105993 s: APP: Init ... !!! [MCU2_1] 3.106012 s: SCICLIENT: Init ... !!! [MCU2_1] 3.106243 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [MCU2_1] 3.106289 s: SCICLIENT: DMSC FW revision 0x9 [MCU2_1] 3.106315 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_1] 3.106340 s: SCICLIENT: Init ... Done !!! [MCU2_1] 3.106363 s: UDMA: Init ... !!! [MCU2_1] 3.107712 s: UDMA: Init ... Done !!! [MCU2_1] 3.107767 s: MEM: Init ... !!! [MCU2_1] 3.107805 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!! [MCU2_1] 3.107864 s: MEM: Init ... Done !!! [MCU2_1] 3.107886 s: IPC: Init ... !!! [MCU2_1] 3.107938 s: IPC: 6 CPUs participating in IPC !!! [MCU2_1] 3.107980 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_1] 15.182841 s: IPC: HLOS is ready !!! [MCU2_1] 15.187958 s: IPC: Init ... Done !!! [MCU2_1] 15.188024 s: APP: Syncing with 5 CPUs ... !!! [MCU2_1] 15.188066 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_1] 15.188095 s: REMOTE_SERVICE: Init ... !!! [MCU2_1] 15.189537 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_1] 15.189692 s: FVID2: Init ... !!! [MCU2_1] 15.189761 s: FVID2: Init ... Done !!! [MCU2_1] 15.189793 s: VHWA: DMPAC: Init ... !!! [MCU2_1] 15.189814 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2 [MCU2_1] 15.190012 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 15.190052 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2 [MCU2_1] 15.190558 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 15.190590 s: VHWA: DOF Init ... !!! [MCU2_1] 15.200163 s: VHWA: DOF Init ... Done !!! [MCU2_1] 15.200228 s: VHWA: SDE Init ... !!! [MCU2_1] 15.202688 s: VHWA: SDE Init ... Done !!! [MCU2_1] 15.202749 s: VHWA: DMPAC: Init ... Done !!! [MCU2_1] 15.202794 s: VX_ZONE_INIT:Enabled [MCU2_1] 15.202824 s: VX_ZONE_ERROR:Enabled [MCU2_1] 15.202848 s: VX_ZONE_WARNING:Enabled [MCU2_1] 15.204246 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 [MCU2_1] 15.204456 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE [MCU2_1] 15.204662 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF [MCU2_1] 15.204716 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [MCU2_1] 15.204749 s: APP: OpenVX Target kernel init ... !!! [MCU2_1] 15.205004 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_1] 15.205046 s: UDMA Copy: Init ... !!! [MCU2_1] 15.206758 s: UDMA Copy: Init ... Done !!! [MCU2_1] 15.206827 s: APP: Init ... Done !!! [MCU2_1] 15.206855 s: APP: Run ... !!! [MCU2_1] 15.206878 s: IPC: Starting echo test ... [MCU2_1] 15.208800 s: APP: Run ... Done !!! [MCU2_1] 15.209906 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_1] 15.210002 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_1] 15.210079 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [C6x_1 ] 3.196769 s: CIO: Init ... Done !!! [C6x_1 ] 3.196793 s: ### CPU Frequency = 1350000000 Hz [C6x_1 ] 3.196803 s: CPU is running FreeRTOS [C6x_1 ] 3.196811 s: APP: Init ... !!! [C6x_1 ] 3.196819 s: SCICLIENT: Init ... !!! [C6x_1 ] 3.197011 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [C6x_1 ] 3.197023 s: SCICLIENT: DMSC FW revision 0x9 [C6x_1 ] 3.197032 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_1 ] 3.197042 s: SCICLIENT: Init ... Done !!! [C6x_1 ] 3.197051 s: UDMA: Init ... !!! [C6x_1 ] 3.198469 s: UDMA: Init ... Done !!! [C6x_1 ] 3.198488 s: MEM: Init ... !!! [C6x_1 ] 3.198500 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!! [C6x_1 ] 3.198517 s: MEM: Init ... Done !!! [C6x_1 ] 3.198526 s: IPC: Init ... !!! [C6x_1 ] 3.198546 s: IPC: 6 CPUs participating in IPC !!! [C6x_1 ] 3.198559 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_1 ] 14.815016 s: IPC: HLOS is ready !!! [C6x_1 ] 14.818724 s: IPC: Init ... Done !!! [C6x_1 ] 14.818752 s: APP: Syncing with 5 CPUs ... !!! [C6x_1 ] 15.188064 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_1 ] 15.188078 s: REMOTE_SERVICE: Init ... !!! [C6x_1 ] 15.188738 s: REMOTE_SERVICE: Init ... Done !!! [C6x_1 ] 15.188774 s: VX_ZONE_INIT:Enabled [C6x_1 ] 15.188785 s: VX_ZONE_ERROR:Enabled [C6x_1 ] 15.188795 s: VX_ZONE_WARNING:Enabled [C6x_1 ] 15.189667 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [C6x_1 ] 15.189682 s: APP: OpenVX Target kernel init ... !!! [C6x_1 ] 15.189986 s: APP: OpenVX Target kernel init ... Done !!! [C6x_1 ] 15.190002 s: UDMA Copy: Init ... !!! [C6x_1 ] 15.194691 s: UDMA Copy: Init ... Done !!! [C6x_1 ] 15.194711 s: APP: Init ... Done !!! [C6x_1 ] 15.194720 s: APP: Run ... !!! [C6x_1 ] 15.194729 s: IPC: Starting echo test ... [C6x_1 ] 15.195782 s: APP: Run ... Done !!! [C6x_1 ] 15.196091 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P] [C6x_1 ] 15.196525 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 15.209649 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_2 ] 3.293611 s: CIO: Init ... Done !!! [C6x_2 ] 3.293636 s: ### CPU Frequency = 1350000000 Hz [C6x_2 ] 3.293647 s: CPU is running FreeRTOS [C6x_2 ] 3.293655 s: APP: Init ... !!! [C6x_2 ] 3.293663 s: SCICLIENT: Init ... !!! [C6x_2 ] 3.293863 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [C6x_2 ] 3.293876 s: SCICLIENT: DMSC FW revision 0x9 [C6x_2 ] 3.293885 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_2 ] 3.293895 s: SCICLIENT: Init ... Done !!! [C6x_2 ] 3.293904 s: UDMA: Init ... !!! [C6x_2 ] 3.295349 s: UDMA: Init ... Done !!! [C6x_2 ] 3.295368 s: MEM: Init ... !!! [C6x_2 ] 3.295380 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ e0000000 of size 16777216 bytes !!! [C6x_2 ] 3.295398 s: MEM: Init ... Done !!! [C6x_2 ] 3.295407 s: IPC: Init ... !!! [C6x_2 ] 3.295427 s: IPC: 6 CPUs participating in IPC !!! [C6x_2 ] 3.295440 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_2 ] 14.963028 s: IPC: HLOS is ready !!! [C6x_2 ] 14.966670 s: IPC: Init ... Done !!! [C6x_2 ] 14.966697 s: APP: Syncing with 5 CPUs ... !!! [C6x_2 ] 15.188064 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_2 ] 15.188079 s: REMOTE_SERVICE: Init ... !!! [C6x_2 ] 15.188748 s: REMOTE_SERVICE: Init ... Done !!! [C6x_2 ] 15.188787 s: VX_ZONE_INIT:Enabled [C6x_2 ] 15.188798 s: VX_ZONE_ERROR:Enabled [C6x_2 ] 15.188808 s: VX_ZONE_WARNING:Enabled [C6x_2 ] 15.189680 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [C6x_2 ] 15.189695 s: APP: OpenVX Target kernel init ... !!! [C6x_2 ] 15.190002 s: APP: OpenVX Target kernel init ... Done !!! [C6x_2 ] 15.190020 s: UDMA Copy: Init ... !!! [C6x_2 ] 15.195006 s: UDMA Copy: Init ... Done !!! [C6x_2 ] 15.195029 s: APP: Init ... Done !!! [C6x_2 ] 15.195038 s: APP: Run ... !!! [C6x_2 ] 15.195047 s: IPC: Starting echo test ... [C6x_2 ] 15.196198 s: APP: Run ... Done !!! [C6x_2 ] 15.196531 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.] [C6x_2 ] 15.196568 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 15.209690 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C7x_1 ] 3.867474 s: CIO: Init ... Done !!! [C7x_1 ] 3.867488 s: ### CPU Frequency = 1000000000 Hz [C7x_1 ] 3.867499 s: CPU is running FreeRTOS [C7x_1 ] 3.867507 s: APP: Init ... !!! [C7x_1 ] 3.867515 s: SCICLIENT: Init ... !!! [C7x_1 ] 3.867714 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [C7x_1 ] 3.867728 s: SCICLIENT: DMSC FW revision 0x9 [C7x_1 ] 3.867738 s: SCICLIENT: DMSC FW ABI revision 3.1 [C7x_1 ] 3.867749 s: SCICLIENT: Init ... Done !!! [C7x_1 ] 3.867758 s: UDMA: Init ... !!! [C7x_1 ] 3.868869 s: UDMA: Init ... Done !!! [C7x_1 ] 3.868882 s: MEM: Init ... !!! [C7x_1 ] 3.868893 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!! [C7x_1 ] 3.868914 s: MEM: Init ... Done !!! [C7x_1 ] 3.868922 s: IPC: Init ... !!! [C7x_1 ] 3.868936 s: IPC: 6 CPUs participating in IPC !!! [C7x_1 ] 3.868950 s: IPC: Waiting for HLOS to be ready ... !!! [C7x_1 ] 15.109536 s: IPC: HLOS is ready !!! [C7x_1 ] 15.111451 s: IPC: Init ... Done !!! [C7x_1 ] 15.111464 s: APP: Syncing with 5 CPUs ... !!! [C7x_1 ] 15.188066 s: APP: Syncing with 5 CPUs ... Done !!! [C7x_1 ] 15.188082 s: REMOTE_SERVICE: Init ... !!! [C7x_1 ] 15.188233 s: REMOTE_SERVICE: Init ... Done !!! [C7x_1 ] 15.188256 s: VX_ZONE_INIT:Enabled [C7x_1 ] 15.188267 s: VX_ZONE_ERROR:Enabled [C7x_1 ] 15.188277 s: VX_ZONE_WARNING:Enabled [C7x_1 ] 15.188504 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 [C7x_1 ] 15.188586 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 [C7x_1 ] 15.188662 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 [C7x_1 ] 15.188736 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 [C7x_1 ] 15.188808 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 [C7x_1 ] 15.188944 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 [C7x_1 ] 15.189023 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 [C7x_1 ] 15.189092 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 [C7x_1 ] 15.189114 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [C7x_1 ] 15.189129 s: APP: OpenVX Target kernel init ... !!! [C7x_1 ] 15.189289 s: APP: OpenVX Target kernel init ... Done !!! [C7x_1 ] 15.189303 s: APP: Init ... Done !!! [C7x_1 ] 15.189312 s: APP: Run ... !!! [C7x_1 ] 15.189320 s: IPC: Starting echo test ... [C7x_1 ] 15.189492 s: APP: Run ... Done !!! [C7x_1 ] 15.196097 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s] [C7x_1 ] 15.196535 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 15.209719 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s]
mcu2_0 has no relevant video io and csitx node information.
Regards,
Cesar
Hi Cesar,
Atleast DSS is enabled on mcu2_0 now.
[MCU2_0] 15.189794 s: DSS: Init ... !!!
[MCU2_0] 15.189820 s: DSS: Display type is eDP !!!
[MCU2_0] 15.189844 s: DSS: M2M Path is enabled !!!
[MCU2_0] 15.189865 s: DSS: SoC init ... !!!
Do you have mechanism to build mcu2_0 firmware? then can you now enable CSITX in mcu2_0 firmware and try it out?
Regards,
Brijesh
Hi Brijesh,
The configuration is enabled by default, but there is no relevant print information.
Regard,
Cesar
Hi Cesar,
Is there a crash on mcu2_0? I dont see any prints after below print. Do you use EVM? Do they have external io expander to configure DP pin? If not, can you please try removing this code and see if it helps?
[MCU2_0] 15.194636 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!!
Regards,
Brijesh
Hi Brijesh,
Not using evm boards, but using our own customized boards;
removing this code " DSS: Turning on DP_PWR pin for eDP adapters ... !!!"
Csitx was successfully initialized
root@j721e-evm:~# /opt/vision_apps/vision_apps_init.sh root@j721e-evm:~# [MCU2_0] 3.053991 s: CIO: Init ... Done !!! [MCU2_0] 3.054070 s: ### CPU Frequency = 1000000000 Hz [MCU2_0] 3.054111 s: CPU is running FreeRTOS [MCU2_0] 3.054133 s: APP: Init ... !!! [MCU2_0] 3.054153 s: SCICLIENT: Init ... !!! [MCU2_0] 3.054380 s: SCICLIENT: DMSC FW version [9.0.6--v09.00.06 (Kool Koala)] [MCU2_0] 3.054430 s: SCICLIENT: DMSC FW revision 0x9 [MCU2_0] 3.054456 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_0] 3.054482 s: SCICLIENT: Init ... Done !!! [MCU2_0] 3.054505 s: UDMA: Init ... !!! [MCU2_0] 3.055831 s: UDMA: Init ... Done !!! [MCU2_0] 3.055899 s: MEM: Init ... !!! [MCU2_0] 3.055941 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!! [MCU2_0] 3.056002 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! [MCU2_0] 3.056052 s: MEM: Init ... Done !!! [MCU2_0] 3.056075 s: IPC: Init ... !!! [MCU2_0] 3.056130 s: IPC: 6 CPUs participating in IPC !!! [MCU2_0] 3.056173 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_0] 14.426223 s: IPC: HLOS is ready !!! [MCU2_0] 14.431401 s: IPC: Init ... Done !!! [MCU2_0] 14.431472 s: APP: Syncing with 5 CPUs ... !!! [MCU2_0] 14.594233 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_0] 14.594391 s: REMOTE_SERVICE: Init ... !!! [MCU2_0] 14.595903 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_0] 14.595969 s: FVID2: Init ... !!! [MCU2_0] 14.596041 s: FVID2: Init ... Done !!! [MCU2_0] 14.596084 s: VHWA: VPAC Init ... !!! [MCU2_0] 14.596111 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 [MCU2_0] 14.596389 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.596429 s: VHWA: LDC Init ... !!! [MCU2_0] 14.603494 s: VHWA: LDC Init ... Done !!! [MCU2_0] 14.603560 s: VHWA: MSC Init ... !!! [MCU2_0] 14.616939 s: VHWA: MSC Init ... Done !!! [MCU2_0] 14.617007 s: VHWA: NF Init ... !!! [MCU2_0] 14.618799 s: VHWA: NF Init ... Done !!! [MCU2_0] 14.618866 s: VHWA: VISS Init ... !!! [MCU2_0] 14.628699 s: VHWA: VISS Init ... Done !!! [MCU2_0] 14.628776 s: VHWA: VPAC Init ... Done !!! [MCU2_0] 14.628822 s: VX_ZONE_INIT:Enabled [MCU2_0] 14.628848 s: VX_ZONE_ERROR:Enabled [MCU2_0] 14.628869 s: VX_ZONE_WARNING:Enabled [MCU2_0] 14.630235 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 [MCU2_0] 14.630448 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF [MCU2_0] 14.630637 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 [MCU2_0] 14.630857 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 [MCU2_0] 14.631079 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 [MCU2_0] 14.631363 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 [MCU2_0] 14.631599 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 [MCU2_0] 14.631838 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 [MCU2_0] 14.632072 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 [MCU2_0] 14.632297 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 [MCU2_0] 14.632506 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX [MCU2_0] 14.632737 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 [MCU2_0] 14.632982 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 [MCU2_0] 14.633219 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 [MCU2_0] 14.633459 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 [MCU2_0] 14.633691 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 [MCU2_0] 14.633938 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 [MCU2_0] 14.634140 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 [MCU2_0] 14.634331 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 [MCU2_0] 14.634511 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 [MCU2_0] 14.634697 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 [MCU2_0] 14.634743 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! [MCU2_0] 14.634793 s: APP: OpenVX Target kernel init ... !!! [MCU2_0] 14.649568 s: VX_ZONE_ERROR:[tivxAddTargetKernelCsitx:1241] _________________________tivxAddTargetKernelCsitx______________________________ [MCU2_0] 14.649694 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_0] 14.649730 s: CSI2RX: Init ... !!! [MCU2_0] 14.649763 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 14.649876 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.649918 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2 [MCU2_0] 14.650005 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.650039 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2 [MCU2_0] 14.650113 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.650143 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2 [MCU2_0] 14.650216 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.650248 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2 [MCU2_0] 14.650315 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.650518 s: CSI2RX: Init ... Done !!! [MCU2_0] 14.650558 s: appInit ...----------------------vt !!! [MCU2_0] 14.650587 s: CSI2TX: Init ........................cesar !!! [MCU2_0] 14.650612 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 14.650705 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.650740 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2 [MCU2_0] 14.650890 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.650925 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2 [MCU2_0] 14.651016 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 14.651093 s: CSI2TX: Init ... Done !!! [MCU2_0] 14.651126 s: ISS: Init ... !!! [MCU2_0] 14.651158 s: IssSensor_Init ... Done !!! [MCU2_0] 14.651231 s: IttRemoteServer_Init ... Done !!! [MCU2_0] 14.651258 s: ISS: Init ... Done !!! [MCU2_0] 14.651283 s: VISS REMOTE SERVICE: Init ... !!! [MCU2_0] 14.651342 s: VISS REMOTE SERVICE: Init ... Done !!! [MCU2_0] 14.651371 s: UDMA Copy: Init ... !!! [MCU2_0] 14.653121 s: UDMA Copy: Init ... Done !!! [MCU2_0] 14.653227 s: APP: Init ... Done !!! [MCU2_0] 14.653265 s: APP: Run ... !!! [MCU2_0] 14.653290 s: IPC: Starting echo test ... [MCU2_0] 14.655160 s: APP: Run ... Done !!! [MCU2_0] 14.656589 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 14.656689 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 14.656777 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 14.656852 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P]
root@j721e-evm:~# /opt/vision_apps/vx_app_conformance_video_io.out --filter=tivxVideoIOCsitxCsirx* APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 311.241608 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 311.241684 s: VX_ZONE_INIT:Enabled 311.241691 s: VX_ZONE_ERROR:Enabled 311.241696 s: VX_ZONE_WARNING:Enabled 311.242413 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 311.242967 s: VX_ZONE_INIT:[tivxHostInitLocal:96] Initialization Done for HOST !!! VxTests version: unknown VCS version: unknown Build config: Release [ ======== ] Total 26 tests from 4 test cases Use test filter: tivxVideoIOCsitxCsirx* Use global OpenVX context: FALSE [ ======== ] [ ALL DONE ] 0 test(s) from 0 test case(s) ran [ PASSED ] 0 test(s) [ FAILED ] 0 test(s) [ DISABLED ] 0 test(s) ================================= OpenVX Conformance report summary ================================= To be conformant to the OpenVX baseline, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. To be conformant to the User Data Object extension, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. Note: The 0 disabled tests are optional and are not considered for conformance. #REPORT: YYYYMMDDHHMMSS FILTERED 26 0 0 0 0 0 (version unknown) 311.263500 s: VX_ZONE_INIT:[tivxHostDeInitLocal:110] De-Initialization Done for HOST !!! 311.267902 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! APP: Deinit ... !!! REMOTE_SERVICE: Deinit ... !!! REMOTE_SERVICE: Deinit ... Done !!! IPC: Deinit ... !!! IPC: DeInit ... Done !!! MEM: Deinit ... !!! DDR_SHARED_MEM: Alloc's: 0 alloc's of 0 bytes DDR_SHARED_MEM: Free's : 0 free's of 0 bytes DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! APP: Deinit ... Done !!!
but csitx test failed.
Regard,
Cesar
hi Cesar,
ok, now CSITX node is included, now lets see why CSITX test is not getting included.
CSITX test is dependent on two flags,
- BUILD_CT_TIOVX_VIDEO_IO
- BUILD_CSITX
Can you please check if both of these build macros are included? both of them are in the build_flags.mak file.
Regards,
Brijesh
Hi Brijesh,
make video_io; make sdk; make vision_apps; make linux_fs_install_sd
root@j721e-evm:~# /opt/vision_apps/vx_app_conformance_video_io.out --filter=tivxVideoIOCsitxCsirx* APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=5) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! 258.827612 s: GTC Frequency = 200 MHz APP: Init ... Done !!! 258.827691 s: VX_ZONE_INIT:Enabled 258.827698 s: VX_ZONE_ERROR:Enabled 258.827704 s: VX_ZONE_WARNING:Enabled 258.828488 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! 258.828972 s: VX_ZONE_INIT:[tivxHostInitLocal:96] Initialization Done for HOST !!! VxTests version: unknown VCS version: unknown Build config: Release [ ======== ] Total 26 tests from 4 test cases Use test filter: tivxVideoIOCsitxCsirx* Use global OpenVX context: FALSE [ ======== ] [ ALL DONE ] 0 test(s) from 0 test case(s) ran [ PASSED ] 0 test(s) [ FAILED ] 0 test(s) [ DISABLED ] 0 test(s) ================================= OpenVX Conformance report summary ================================= To be conformant to the OpenVX baseline, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. To be conformant to the User Data Object extension, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED. Note: The 0 disabled tests are optional and are not considered for conformance. #REPORT: YYYYMMDDHHMMSS FILTERED 26 0 0 0 0 0 (version unknown) 258.829194 s: VX_ZONE_INIT:[tivxHostDeInitLocal:110] De-Initialization Done for HOST !!! 258.833833 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! APP: Deinit ... !!! REMOTE_SERVICE: Deinit ... !!! REMOTE_SERVICE: Deinit ... Done !!! IPC: Deinit ... !!! IPC: DeInit ... Done !!! MEM: Deinit ... !!! DDR_SHARED_MEM: Alloc's: 0 alloc's of 0 bytes DDR_SHARED_MEM: Free's : 0 free's of 0 bytes DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! APP: Deinit ... Done !!! root@j721e-evm:~#
The recompilation phenomenon is the same.
Regard,
Cesar
hi Cesar,
This is strange. In order to check if BUILD_CSITX is included, can you please introduce some error under this macro and see if build fails?
#if defined(BUILD_CSITX)
#error "BUILD_CSITX Defined"
TESTCASE(tivxVideoIOCsitxCsirx)
#endif
Regards,
Brijesh
Hi Cesar,
Can you please do similar check in the video_io\test\test_csitx_csirx.c file also? Somehow CSITX tests are not being included in the conformance tests, even if BUILD_CSITX is defined. So lets try to figure out why.
Regards,
Brijesh
Hi Brijesh,
The above tests are in the "test csitx csirx.c" file
Regard,
Cesar
Hi Cesar,
Are you sure that this is the same firmware you are using on the board? Because if CSITX is included, i see no reason why it cannot be executed..
Regards,
Brijesh
Hi Brijesh,
Find the root cause: disabled it on the linux;
why?
Regards,
Cesar
Hi Cesar,
Dont understand why SERDES needs to be disabled on Linux to enable CSITX on RTOS. There are independent.
Regards,
Brijesh