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Can M3 use any h/w peripherals?

Can the M3 processor access any of the h/w peripherals (assuming these peripherals are not being used by the ARM-A8 or DSP).  We are thinking specifically of one of the SPI ports and CPSW, CPTS, MDIO modules.

We obviously need to port the appropriate drivers to the M3 as well.

thanks

-steve

  • Further to my previous question, does the C674x have access to all the h/w peripherals?.  Specifically I need the PCIe i/f.  Its hard to tell from reading the TRM.

    My previous question also needs to be answered - i.e what h/w peripherals does the M3 have or not have access to?.

    thanks

    steve

  • Hi Steve,

    The connectivity between various masters/slaves is available in the datasheet (http://www.ti.com/lit/gpn/tms320dm8148), in table 5-1 (page 171). As per this table, you are able to access the PCIe interface from the DSP (both are have access to the L3 interconnect).

    Remember that you do not have access to an M3, beyond it's fixed function. While there are M3s on the device, they are black-boxed binaries for the purpose of the media controller. While the table above shows connectivity between the M3 various peripherals,  you will not be able to port the aforementioned drivers to the M3. These must be implemented on the A8. The A8 and the DSP are the only cores that are avaiable in the user space.

  • Hi Michael

    Thanks for replying, but I'm missing something.  TI is able to create binaries for the M3, but we can't?.  Are you saying TI does not release the necessary header files etc. in order to compile code?.  In other words exactly what prevents us from writing code for the M3?.

    regards

    Steve

  • Hi Steve,

    You are correct - TI does not provide the source code for the M3. The decision was made to black box these devices to enable customers to be able to perform the HDVPSS funcitonality without the complexity of the code that resides on the the M3 while also ensuring performance of the M3s. You will not have access to the header files, etc. and thus will not be able to add additionally functionality to the M3s.

  • Hi Michael,

    What about the use case where we completely blow away M3 HDVPSS functionality and run our own SYS BIOS application on the M3 ? According to the SYSLink examples that I have seen, TI distributes example code to set up SYSLink connections between the ARM and M3(s). Am I missing something ?

    Or, are you implying that SYSLink only runs on ARM running SYS BIOS ?

    - Andrew