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SCR Bus in PRUSS

Alistair Lowe
Prodigy 150 points

Hi there,

I'm looking at the possibility of placing PRU data into PRU RAM and then triggering EDMA to transfer this to DDR.

I'm unclear as to the capabilities of the SCR bus. I am interested in two things:

  • How many cycles does a simple 32-bit transfer from PRU register to PRU RAM take?
  • Will an EDMA affect SCR bus performance and increase the number of cycles for the above situation if both are going on at the same time?

Is there perhaps a faster/more direct way to transfer data to DDR that won't tie up the bus? If so how many cycles ~ would this take?

Many thanks

  • 0
    TI__Genius 15910 points

    Hi Alistair,

    1.  How many cycles does a simple 32-bit transfer from PRU register to PRU RAM take?

    Writing to PRU RAM takes ~ 1 PRU cycle and reading from PRU RAM takes ~2 PRU cycles.

    2.  Will an EDMA affect SCR bus performance and increase the number of cycles for the above situation if both are going on at the same time?

    An eDMA transfer will have no impact on the SCR bus performance, as long as the two transfers are not in conflict.  For example, the transactions do not access the same end point at the same time.

    3.  Is there perhaps a faster/more direct way to transfer data to DDR that won't tie up the bus?

    The best options are either the PRU or eDMA.

    Regards,

    Melissa