Hi, all.
On DM8167 We use the BCM5461S as the EMAC PHY which doesn't provide EMAC_TXCLK to the EMAC controller under gigabit mode, and I have read this post about the workaround used for phy which doesn't provide EMAC_TXCLK under gigabit mode, but I still have some questions about the workarounds provided in errata and the above mentioned post.
Our first question is about the workaround provided in DM8167 errata. There are two paragraps in the workaround section, and we are not sure about their relationship. Are they two different workarounds for EMAC gigabit mode or two steps in one workaround ?
Our second question is about the second paragraph of the workaround section provided in DM8167 errata. It seems that it's recommended to use the hardware pins to ensure the PHY doesn't auto-negotiate to gigabit mode by default. Is using software to ensure the condition feasible and how ?
Our third question is about the meaning of "enabling EMAC controller" in the above mentioned post. In the post, it said "before enabling EMAC controller, please disable auto-negotiation on the PHY and forcibly put it in MII mode. Once this is done, the EMAC controller can be enabled." Does "enabling EMAC controller" mean enabling EMAC clock domain by using PRCM module or software reset of the EMAC controller by writing some EMAC registers or something else ?
Our fourth and last question is about the impact of the isolate mode of the Ethernet phy. BCM5461S with phy address 0 is put into isolate mode after its software reset or hardware reset. We want to know whether or not the isolate mode will effect the workaround used for DM8167 EMAC?
Thanks very much,
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