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SK-AM62A-LP: Enquiry Related PBIST

Part Number: SK-AM62A-LP

Tool/software:

Hello Expert,

We are using the AM62A with SDK version 10.10, and the MCU+ SDK is also the same version.

I have a few doubts regarding PBIST:

  1. Is there any difference between PBIST and LBIST?

  2. As I understand, BIST should be run only once per power cycle. What is the recommended approach to run it — from the SBL or as a native application on R5?

  3. Could you please provide the procedure to enable PBIST in the SBL?

Thank you,
RajKumar

  • Hello Raj,

    Is there any difference between PBIST and LBIST?

    PBIST tests the internal memories for permanent faults such as stuck-up bits. The LBIST tests the internal logic circuits present in the SoC.

    As I understand, BIST should be run only once per power cycle. What is the recommended approach to run it — from the SBL or as a native application on R5?

    For what cores/memories are trying to run BIST?

    PBIST and LBIST tests are destructive by nature and hence it is recommended to run these tests at startup before the MCU R5 core is loaded by the SBL.

    Could you please provide the procedure to enable PBIST in the SBL?

    The AM62Ax SBL should already have BIST integrated. You can check the SBL example mentioned below:

    examples/drivers/boot/sbl_ospi_nand_linux_multistage/sbl_ospi_nand_linux_stage1/am62ax-sk/r5fss0-0_nortos/main.c

    Regards,

    Nihar Potturu. 

  • Hello Nihar,

    Thank you for the replay,

    For what cores/memories are trying to run BIST?

    A53 MPU CLUSTER0,CODEC PBIST3 ,MAIN PBIST0 and MCU PBIST0  is these possible to check?

    I flashed the sbl_null in OSPI boot mode. We are going to use SD card or eMMC boot, so could you guide us on how to enable this in the SBL? Also, there is no information regarding PBIST in the AM62A TRM.

    Thankyou,
    Rajkumar.

  • Hello Raj,

    A53 MPU CLUSTER0,CODEC PBIST3 ,MAIN PBIST0 and MCU PBIST0  is these possible to check?

    I flashed the sbl_null in OSPI boot mode. We are going to use SD card or eMMC boot, so could you guide us on how to enable this in the SBL?

    Please check the SDL PBIST example available in MCU+SDK:
    https://software-dl.ti.com/mcu-plus-sdk/esd/AM62AX/latest/exports/docs/api_guide_am62ax/EXAMPLES_SDL_PBIST.html

    You can initiate BIST for MCU R5 core from SBL as shown in the SBL examples. For rest of the instances, MCU R5 can directly trigger the PBIST test. You can use the SDL PBIST example for reference.

    Regards,

    Nihar Potturu. 

  • Hello Nihar,




    This is available as an example application to run on R5. I saw the following file:
    examples/drivers/boot/sbl_ospi_nand_linux_multistage/sbl_ospi_nand_linux_stage1/am62ax-sk/r5fss0-0_nortos/main.c.
    In this example, they are running the BIST test and flashing the binary to NAND flash.

    From my understanding, whenever I boot from OSPI NAND, only this bootloader comes into the picture and the BIST test is executed (please correct me if I'm wrong).

    We require SD card/eMMC boot mode. Can this be enabled in SD/eMMC boot mode?
    If yes, are there any steps available to follow?

    Regards,
    Raj

  • Hello Raj,

    From my understanding, whenever I boot from OSPI NAND, only this bootloader comes into the picture and the BIST test is executed (please correct me if I'm wrong).

    Yes, your understanding is correct.

    We require SD card/eMMC boot mode. Can this be enabled in SD/eMMC boot mode?

    You can enable this in EMMC mode. You can add the same code used in SBL OSPI in SBL EMMC applicaiton.

    examples/drivers/boot/sbl_emmc_linux_multistage/sbl_emmc_linux_stage1/am62ax-sk/r5fss0-0_nortos/main.c

    Regards,

    Nihar Potturu.