PROCESSOR-SDK-J784S4: J784S4 EVM bring-up questions about peripheral usage, memory and boot

Hi,

As the questions are cross domain, I will answer some of the questions and pass the thread to other module owners.

Bugra BAKIREL said:

While examining the TRM, we saw that the processor has a boot mode called Fast xSPI, when we set the Boot Switches on the EVM to Fast xSPI, the boot process did not start. Does the EVM support this boot mode?

For fast xSPI, you need to flash a tuning parameters to the last sector of the flash. Can you confirm that you have done this?

Bugra BAKIREL said:

We saw that the Ethernet sample applications were generally on the first R5F processor (mcu2_0) in the MAIN domain. Is there such a requirement for Ethernet use?

There is no hard requirements for this. It is just a default setting. You will need to take care of the resource partitions if you want to port the applications on other cores. If you are using ethfw, that is more strongly linked to mcu2_0 core and is a bit difficult to move.

Bugra BAKIREL said:

Do you have benchmarks for reading and writing (1-100MB) to RAM? When we tried to perform memcpy (DDR to DDR) in C7x DSPs (FreeRTOS, J784S4 EVM), 1MB took 2ms, which seems very slow. Maybe we did something wrong; do you have any datasheets or codes to compare?

You can take a look at the datasheet here : https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j784s4/11_00_00_06/exports/docs/pdk_j784s4_11_00_00_21/docs/datasheet/j784s4/datasheet_j784s4.html#memory-configuration-benchmarking

This is from R5 cores though.

Regards,
Tanmay

Hello Tanmay, 

Thank you for the replies.

For the Fast xSPI, we write the "<pdk_path>\packages\ti\board\src\flash\nor\ospi\nor_spi_patterns.bin" file to the address 3FC0000 as it is described in the PDK documentation Section 6.2.5 with UNIFLASH tool.

Is it correct way to activate Fast xSPI boot?  How can we test whether Fast xSPI boot is activated? We set the boot switches as follows:

• SW2[1-8]   = 0xxx xxxx
• SW11[1-8] = 0000 1010
• SW7[1-8]   = 0110 0000

Can you describe steps?

Thanks,

Bugra

Hi Bugra,

Tanmay will help address the questions you have asked.

Bugra BAKIREL said:

First, we loaded simple "Hello World" applications to the c7x and R5 processors in the MAIN domain via JTAG. Here, we activated the UART_stdio API and reached the UARTs on the EVM. (Except UART3)

Bugra BAKIREL said:

We could not reach the UART3 coming out of the J49 connector on the J784S4EVM. Is there a setting that needs to be made for this?

To confirm, you are able to use and see logs from all the other UART instances except UART3?

Thanks,

Neehar

Hi,

Bugra BAKIREL said:

For the Fast xSPI, we write the "<pdk_path>\packages\ti\board\src\flash\nor\ospi\nor_spi_patterns.bin" file to the address 3FC0000 as it is described in the PDK documentation Section 6.2.5 with UNIFLASH tool.

Is it correct way to activate Fast xSPI boot?  How can we test whether Fast xSPI boot is activated? We set the boot switches as follows:

• SW2[1-8]   = 0xxx xxxx
• SW11[1-8] = 0000 1010
• SW7[1-8]   = 0110 0000

These boot switch settings are for xSPI boot mode. For Fast-xSPI, you need the following bootmode pin settings

• SW2[1-8]   = 0xxx xxxx
• SW11[1-8] = 1000 1010
• SW7[1-8]   = 0110 0000

Bugra BAKIREL said:

How can we test whether Fast xSPI boot is activated?

So the boot mode is only applicable to RoM code. The tuning parameters are used by default in further bootloader. This means that you would only see improvement in speed over bootRoM section as compared to normal OSPI. To verify this, you would need to get the bootRoM dump by connecting SoC to CCS.

Regards,
Tanmay

Yes, I mean for the J784S4EVM UART8, UART5, UART2 and UART3 can be reached with J49 connector. We are able to see logs from UART8, UART5 and UART2 but not from UART3

Hi,

Can you please confirm UART3 is not used in your application? Including by other cores or by Linux.

Additionally, can you confirm you have set up the pinmux for UART3 as well?

Thanks,

Neehar