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AM623: How to let AM62 sdhci0 (eMMC0) works on force SDR mode only?

Part Number: AM623

Tool/software:

Hello, Expert

Follow title description, this is a double check.

How to let AM62x sdhci0 (eMMC0) works on SDR mode only? 

Because we want to "prevent" eMMC works in DDR mode even eMMC support DDR.

This is spec w/ AM62x

eMMC0 works w/ Legacy SDR, high speed SDR, and HS200

Base on SDK 10.00.07.04,

Linux DTS should be motify as below.

/home/gibbs/work/am62/ti-processor-sdk-linux-am62xx-evm-10.00.07.04/board-support/ti-linux-kernel-6.6.32+git-ti/arch/arm64/boot/dts/ti/k3-am62-main.dtsi

	sdhci0: mmc@fa10000 {
		compatible = "ti,am62-sdhci";
		reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
		clock-names = "clk_ahb", "clk_xin";
		assigned-clocks = <&k3_clks 57 6>;
		assigned-clock-parents = <&k3_clks 57 8>;
		bus-width = <8>;
		/* mmc-ddr-1_8v; */
		mmc-hs200-1_8v;
		ti,clkbuf-sel = <0x7>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-mmc-hs = <0x0>;
		/* ti,otap-del-sel-ddr52 = <0x5>; */
		ti,otap-del-sel-hs200 = <0x5>;
		ti,itap-del-sel-legacy = <0xa>;
		ti,itap-del-sel-mmc-hs = <0x1>;
		status = "disabled";
	};

UBoot DTS should be motify as below.

ti-processor-sdk-linux-am62xx-evm-10.00.07.04/board-support/ti-u-boot-2024.04+git/arch/arm/dts/k3-am62-main.dtsi

	sdhci0: mmc@fa10000 {
		compatible = "ti,am62-sdhci";
		reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
		clock-names = "clk_ahb", "clk_xin";
		assigned-clocks = <&k3_clks 57 6>;
		assigned-clock-parents = <&k3_clks 57 8>;
		bus-width = <8>;
		/* mmc-ddr-1_8v; */
		mmc-hs200-1_8v;
		ti,clkbuf-sel = <0x7>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-mmc-hs = <0x0>;
		/* ti,otap-del-sel-ddr52 = <0x5>; */
		ti,otap-del-sel-hs200 = <0x5>;
		ti,itap-del-sel-legacy = <0xa>;
		ti,itap-del-sel-mmc-hs = <0x1>;

		status = "disabled";
	};

 

Could you help us double check it?

Do I miss any thing?

Thank You Very Much

Gibbs

  • Hello,

    To configure in a certain mode, you would have to disable all the higher modes otap settings like so for U-Boot:

    diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
    index 4d8ad7bd47e..d563190cf66 100644
    --- a/arch/arm/dts/k3-am62-main.dtsi
    +++ b/arch/arm/dts/k3-am62-main.dtsi
    @@ -589,8 +589,8 @@
     		ti,clkbuf-sel = <0x7>;
     		ti,otap-del-sel-legacy = <0x0>;
     		ti,otap-del-sel-mmc-hs = <0x0>;
    -		ti,otap-del-sel-ddr52 = <0x5>;
    -		ti,otap-del-sel-hs200 = <0x5>;
    +		// ti,otap-del-sel-ddr52 = <0x5>;
    +		// ti,otap-del-sel-hs200 = <0x5>;
     		ti,itap-del-sel-legacy = <0xa>;
     		ti,itap-del-sel-mmc-hs = <0x1>;
     		status = "disabled";
    

    The same goes for Linux.

    Regards,

    Prashant

  • Hi, Prashant

    Double check.

    We just want to remove any "DDR" mode, because SDIO0 w/ eMMC  may have issues to support any DDR mode

    I feel confuse because you try to disable HS200

    As far as I know, HS200 belongs SDR mode, isn't?

    Thank You.

    Gibbs

  • We just want to remove any "DDR" mode, because SDIO0 w/ eMMC  may have issues to support any DDR mode

    In that case, removing the "ti,otap-del-sel-ddr52" property is enough. This is how the DDR52 mode is disabled in the SDK v11.0.