AM625: eMMC 1.8V or 3.3V

Tony Tang said:

#1. Is the modification right to limit eMMC to High Speed SDR? In SDK8.6 dtsi there are option of itap, should add it to SDK8.3 also? 

The changes are correct to initialize the eMMC in HS mode.

Tony Tang said:

#2. The signal voltage supply fix to 1.8V in hardware, what is mean of 3.3V of cat /sys/kernel/debug/mmc0/* output?

It cannot be the case. The eMMC initialization starts with 3.3V and later switched to 1.8V for the higher modes like HS200.

#1. Customer followed SK-AM62B board schematic, eMMC_CMD and DAT0 are external pulled up to 1.8V also. I think it can't be switched dynamically.

#2. On SK-AM62B schematic, MMC1 connected SD card is the case, it has a dedicated power supply to switch between 3.3V/1.8V. 

Hi Tony,

Tony Tang said:

#2. The signal voltage supply fix to 1.8V in hardware, what is mean of 3.3V of cat /sys/kernel/debug/mmc0/* output?

The 3.3v information is not correct, since we know eMMC VDD is only 1.8v.

I will try to understand why software reports 3.3v, it seems to be misconfiguration in the code. The kernel debugfs is for information, it doesn't affect the MMC function.

Customer asks for update.

This task is a low priority. I won't get into it at least in a few weeks. The vdd the kernel debugfs is just for information, it doesn't affect the MMC functionality. You can just ignore it. We already know it is 1.8v.

Understood, How about report it as a software bug for development team to fix in next SDK, no need holding on apps team.

It is same with SDK11.0.09.04:

with default dts:

root@am62xx-evm:~# dmesg |grep mmc0
[    1.995025] mmc0: CQHCI version 5.10
[    2.038584] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[    2.134183] mmc0: Command Queue Engine enabled
[    2.138694] mmc0: new HS200 MMC card at address 0001
[    2.144928] mmcblk0: mmc0:0001 G1M15L 29.6 GiB
[    2.154547] mmcblk0boot0: mmc0:0001 G1M15L 31.5 MiB
[    2.160912] mmcblk0boot1: mmc0:0001 G1M15L 31.5 MiB
[    2.167197] mmcblk0rpmb: mmc0:0001 G1M15L 4.00 MiB, chardev (239:0)
root@am62xx-evm:~# cat /sys/kernel/debug/mmc0/*
0x4000004b
0x00860020
200000000
0
# Command Timeout Occurred:      0
# Command CRC Errors Occurred:   0
# Data Timeout Occurred:         0
# Data CRC Errors Occurred:      0
# Auto-Cmd Error Occurred:       0
# ADMA Error Occurred:   0
# Tuning Error Occurred:         0
# CMDQ RED Errors:       0
# CMDQ GCE Errors:       0
# CMDQ ICCE Errors:      0
# Request Timedout:      0
# CMDQ Request Timedout:         0
# ICE Config Errors:     0
# Controller Timedout errors:    0
# Unexpected IRQ errors:         0
clock:          200000000 Hz
actual clock:   200000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      3 (8 bits)
timing spec:    9 (mmc HS200)
signal voltage: 1 (1.80 V)
driver type:    0 (driver type B)
cat: '/sys/kernel/debug/mmc0/mmc0:0001': Is a directory
root@am62xx-evm:~#

delete mmc-ddr-1_8v;, mmc-hs200-1_8v from dts:

root@am62xx-evm:~# dmesg |grep mmc0
[    2.002399] mmc0: CQHCI version 5.10
[    2.048162] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[    2.135543] mmc0: Command Queue Engine enabled
[    2.140055] mmc0: new high speed MMC card at address 0001
[    2.146665] mmcblk0: mmc0:0001 G1M15L 29.6 GiB
[    2.156581] mmcblk0boot0: mmc0:0001 G1M15L 31.5 MiB
[    2.162875] mmcblk0boot1: mmc0:0001 G1M15L 31.5 MiB
[    2.170510] mmcblk0rpmb: mmc0:0001 G1M15L 4.00 MiB, chardev (239:0)
root@am62xx-evm:~# cat /sys/kernel/debug/mmc0/*
0x4000004b
0x00860000
52000000
0
# Command Timeout Occurred:      0
# Command CRC Errors Occurred:   0
# Data Timeout Occurred:         0
# Data CRC Errors Occurred:      0
# Auto-Cmd Error Occurred:       0
# ADMA Error Occurred:   0
# Tuning Error Occurred:         0
# CMDQ RED Errors:       0
# CMDQ GCE Errors:       0
# CMDQ ICCE Errors:      0
# Request Timedout:      0
# CMDQ Request Timedout:         0
# ICE Config Errors:     0
# Controller Timedout errors:    0
# Unexpected IRQ errors:         0
clock:          52000000 Hz
actual clock:   50000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      3 (8 bits)
timing spec:    1 (mmc high-speed)
signal voltage: 0 (3.30 V)
driver type:    0 (driver type B)
cat: '/sys/kernel/debug/mmc0/mmc0:0001': Is a directory
root@am62xx-evm:~#

Tony Tang said:

Understood, How about report it as a software bug for development team to fix in next SDK, no need holding on apps team.

Yes, I have already mentioned the problem to our sw dev team. I am going to file a bug ticket to track the issue.

According to the following comment, if we have a fixed regulator at 1.8V then the Kernel disables the 3.3V voltage support. 

https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/mmc/host/sdhci.c#n4571

So, the following patch forces the 1.8V for all the speed modes:

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 3e5ca8a3eb86..38ba795f7a90 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -597,8 +597,6 @@ sdhci0: mmc@fa10000 {
 		ti,trm-icp = <0x8>;
 		ti,otap-del-sel-legacy = <0x1>;
 		ti,otap-del-sel-mmc-hs = <0x1>;
-		ti,otap-del-sel-ddr52 = <0x6>;
-		ti,otap-del-sel-hs200 = <0x8>;
 		ti,itap-del-sel-legacy = <0x10>;
 		ti,itap-del-sel-mmc-hs = <0xa>;
 		ti,itap-del-sel-ddr52 = <0x3>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index ddcbdee853e6..519f42a2c770 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -160,6 +160,15 @@ vddshv_sdio: regulator-3 {
 		bootph-all;
 	};
 
+	vqmmc_mmc0: regulator-0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vqmmc_mmc0";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		bootph-all;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-names = "default";
@@ -606,6 +615,7 @@ &main_i2c2 {
 
 &sdhci0 {
 	status = "okay";
+	vqmmc-supply = <&vqmmc_mmc0>;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
 	bootph-all;

Otherwise, the following patch independently forces the 1.8V as well:

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
index 3e5ca8a3eb86..38ba795f7a90 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
@@ -597,8 +597,6 @@ sdhci0: mmc@fa10000 {
 		ti,trm-icp = <0x8>;
 		ti,otap-del-sel-legacy = <0x1>;
 		ti,otap-del-sel-mmc-hs = <0x1>;
-		ti,otap-del-sel-ddr52 = <0x6>;
-		ti,otap-del-sel-hs200 = <0x8>;
 		ti,itap-del-sel-legacy = <0x10>;
 		ti,itap-del-sel-mmc-hs = <0xa>;
 		ti,itap-del-sel-ddr52 = <0x3>;
diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 9ff07aadb2d9..dde79080d318 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -802,6 +802,10 @@ static int sdhci_am654_init(struct sdhci_host *host)
 	if (ret)
 		return ret;
 
+	/* Force 1.8V signal voltage */
+	host->flags &= ~SDHCI_SIGNALING_330;
+	host->flags |=  SDHCI_SIGNALING_180;
+
 	ret = sdhci_am654_cqe_add_host(host);
 	if (ret)
 		goto err_cleanup_host;

Both these patches independently correctly sets 1.8V for HS mode:

[19:25:15.320] root@am62pxx-evm:~# cat /sys/kernel/debug/mmc0/ios
[19:25:19.528] clock:           52000000 Hz
[19:25:19.530] actual clock:    50000000 Hz
[19:25:19.532] vdd:             7 (1.65 - 1.95 V)
[19:25:19.545] bus mode:        2 (push-pull)
[19:25:19.547] chip select:     0 (don't care)
[19:25:19.549] power mode:      2 (on)
[19:25:19.551] bus width:       3 (8 bits)
[19:25:19.553] timing spec:     1 (mmc high-speed)
[19:25:19.555] signal voltage:  1 (1.80 V)
[19:25:19.557] driver type:     0 (driver type B)

As for the default behaviour, the Kernel initially sets the voltage with the following function:

https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/mmc/core/core.c#n1177

Since the TI host driver does not explicitly disables the 3.3V, the initial voltage gets set to 3.3V. For higher speed modes like HS200, their respective functions in the driver contains the code to then set the voltage to 1.8V.

If the 3.3V support is disabled, the initial voltage gets set to 1.8V and so all the speed modes are then set to 1.8V.

We are working on AM62-SK board, not AM62P board. followed the first approach to make similar change to dts. Got below result. it occurred 9 CRC error, and vdd is 3.3V. 

root@am62xx-evm:~# cat /sys/kernel/debug/mmc0/*
0x4000004b
0x00860000
52000000
1
# Command Timeout Occurred: 0
# Command CRC Errors Occurred: 0
# Data Timeout Occurred: 0
# Data CRC Errors Occurred: 9
# Auto-Cmd Error Occurred: 0
# ADMA Error Occurred: 0
# Tuning Error Occurred: 0
# CMDQ RED Errors: 0
# CMDQ GCE Errors: 0
# CMDQ ICCE Errors: 0
# Request Timedout: 0
# CMDQ Request Timedout: 0
# ICE Config Errors: 0
# Controller Timedout errors: 0
# Unexpected IRQ errors: 0
clock: 52000000 Hz
actual clock: 50000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 1 (mmc high-speed)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
cat: '/sys/kernel/debug/mmc0/mmc0:0001': Is a directory
root@am62xx-evm:~#

From the code, it actually matters as it access ctrl register when set to 1V8, so need make it clear in case it impact something.

attach the changed dts

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/2870.k3_2D00_am625_2D00_sk.dts

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/2870.k3_2D00_am62_2D00_main.dtsi

Hi Prashant,

Did you tried on SK-AM62 board? and analysis the code if it impact register configuration, not just a wrong information.

Hello Prashant,

Is this request still in tracking? or file a jira?