AM6421: there is a GCC attribute can not work.

Hi Jaxon,

Thanks for your patience.

Please follow the below steps.

1. Define the init and deinit functions in the boot_armv8.c file located at mcu_plus_sdk_am64x_11_00_00_15\source\kernel\nortos\dpl\a53.

typedef void (*func_ptr)(void);
extern func_ptr __preinit_array_start[0], __preinit_array_end[0];
extern func_ptr __init_array_start[0], __init_array_end[0];
extern func_ptr __fini_array_start[0], __fini_array_end[0];

void __init()
{
    for ( func_ptr* func = __preinit_array_start; func != __preinit_array_end; func++ )
            (*func)();
    for ( func_ptr* func = __init_array_start; func != __init_array_end; func++ )
           (*func)();
}

void __deinit()
{
    for ( func_ptr* func = __fini_array_start; func != __fini_array_end; func++ )
            (*func)();
}

2. Modify the __system_start function with below code.

int __system_start(void)
{
    volatile unsigned int * bs;
    volatile unsigned int * be;
    unsigned int * dl;
    unsigned int * ds;
    unsigned int * de;

#if defined (SMP_FREERTOS)

    /* Initialization of bss section is done only once (From Core0) */
    if (0 == Armv8_getCoreId())
    {
        /* initialize .bss to zero */
        bs = & __bss_start__;
        be = & __bss_end__;
        while (bs < be)
        {
            *bs = 0;
            bs++;
        }

        /* relocate the .data section */
        dl = & __data_load__;
        ds = & __data_start__;
        de = & __data_end__;
        if (dl != ds)
        {
            while (ds < de)
            {
                *ds = *dl;
                dl++;
                ds++;
            }
        }

        /* Set flag to indicate bss initialization is done by Core0 */
        bssInitDone = 1;
    }
    else
    {
        /* Core1 should wait until bss initialization is done by Core0 */
        while(bssInitDone != 1)
        {
            ;
        }
    }

#else
    /* initialize .bss to zero */
    bs = & __bss_start__;
    be = & __bss_end__;
    while (bs < be)
    {
        *bs = 0;
        bs++;
    }

    /* relocate the .data section */
    dl = & __data_load__;
    ds = & __data_start__;
    de = & __data_end__;
    if (dl != ds)
    {
        while (ds < de)
        {
            *ds = *dl;
            dl++;
            ds++;
        }
    }
#endif

#if defined (SMP_FREERTOS)

    /* Wait for MMU init to be done by Core0 when running SMP FreeRTOS */
    /* This is done to synchronise between Core0 and Core1 so that MMU initialization is done by Core 0 */
    if (1 == Armv8_getCoreId())
    {
        while(mmuInitDone != 1)
        {
            ;
        }
    }

#endif
    CacheP_enableSMP();
    /* initialize mmu and cache */
    __mmu_init();

#if defined (SMP_FREERTOS)

    /* Set flag to indicate the MMU initialization completion by Core0 */
    if (0 == Armv8_getCoreId())
    {
        mmuInitDone = 1;
        CacheP_wb((void *)&mmuInitDone, sizeof(mmuInitDone), CacheP_TYPE_ALL);
    }

#endif

    __init();
    main();
    __deinit();

    Armv8_exit();

    return(0);
}

3. Build the libraries for kernel.

cd ${MCU+SDK}/source/kernel/nortos
gmake -s -f makefile.am64x.a53.gcc-aarch64 PROFILE=debug
gmake -s -f makefile.am64x.a53.gcc-aarch64 

4. In the example's sysconfig file, add the below sections.

.ARM.exidx : {} > DDR
    .preinit_array     :
	 {
	    PROVIDE_HIDDEN (__preinit_array_start = .);
	    KEEP (*(.preinit_array*))
	    PROVIDE_HIDDEN (__preinit_array_end = .);
	 } > DDR

	 .init_array :
	 {
	    PROVIDE_HIDDEN (__init_array_start = .);
	    KEEP (*(SORT(.init_array.*)))
	    KEEP (*(.init_array*))
	    PROVIDE_HIDDEN (__init_array_end = .);
	 } > DDR

	 .fini_array :
	 {
	    PROVIDE_HIDDEN (__fini_array_start = .);
	    KEEP (*(SORT(.fini_array.*)))
	    KEEP (*(.fini_array*))
	    PROVIDE_HIDDEN (__fini_array_end = .);
	 } > DDR

5. Rebuild the application. It should now work.

Please let us know if the above solution works.

Regards,

Tushar