Tool/software:
Hi.
In LPDDR4 IF, it is usually recognized that a pair of CLK and CA[5:0] are assigned to each 16-bit Data Bus (1ch).
But, the TDA4VEN-Q1 signal has only one set of CLK and CA[5:0].
Is it possible to support 32-bit 1-RANK or 2-RANK products?
Regards,