Tool/software:
Hi.
We have a AM6422 with one 16b DDR4.
Attached measurement shows, that termination after write is switched off too early., resulting in ringing on DQS pair (green signal, differential measured) The total assertion time is correct (10 CLK in this case) but it also seems to get activated a little bit too early.
we set up write preamble to 1CLK, but it looks more like 1.5CLK...
How this can improved?
regards,
Christian