This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRA829V: SERDES Configuration – Current Software Support and Clocking Question

Part Number: DRA829V
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello TI Community,

We are currently planning a custom board using the DRA829V processor and evaluating the SERDES configuration. Our intended allocation is as follows:

  • SERDES 0: PCIe x2

  • SERDES 1: 2x SGMII

  • SERDES 2: USB 3

  • SERDES 3: PCIe x1 + USB 3

  • SERDES 4: DisplayPort + 3x SGMII

According to the SysConfig Tool, this configuration appears to be valid and supported. The TRM also describes these combinations as possible.

However, we came across older forum posts from around 5 years ago stating that some combinations—especially on SERDES 3 and 4—were not yet supported by the software stack at that time.

We would like to confirm whether the current SDK and software stack fully support this configuration.

Additionally, can the DRA829V generate all required SERDES reference clocks internally, or will external reference clocks be necessary for this configuration?

Any guidance or clarification would be highly appreciated.

Regards,
Lennart

  • Hi,

    According to the SysConfig Tool, this configuration appears to be valid and supported. The TRM also describes these combinations as possible.

    Yes, it is possible as per HW.

    However, we came across older forum posts from around 5 years ago stating that some combinations—especially on SERDES 3 and 4—were not yet supported by the software stack at that time.

    We would like to confirm whether the current SDK and software stack fully support this configuration.

    Yes, software does not yet support the above SerDes4 combinations.
    Also, there was no plan to support this combination.

    Best Regards,
    Sudheer

  • Hi,

    thank you for your feedback.

    Given this limitation, we would like to ask a follow-up question regarding SERDES 1:

    Would it be possible to configure SERDES 1 to support both SGMII and QSGMII simultaneously, or is it limited to one protocol at a time?

    Regards,
    Lennart

  • Hi,

    Would it be possible to configure SERDES 1 to support both SGMII and QSGMII simultaneously, or is it limited to one protocol at a time?

    Yes, from a hardware perspective, it is possible to have both SGMII and QSGMII interfaces from SerDes1, but this specific combination is not supported by the software.

    Best Regards,
    Sudheer