• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 98 subscribers
  • Views 158 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4AEN-Q1: CAN Clock configuration from TI Linux

Tejas S P
Prodigy 60 points
Part Number: TDA4AEN-Q1


Tool/software:

Hi Team,

I'm using PSDK version 10.x on TDA4AEN based custom board.

Application is to configure 4 socket CAN channels from the A53 core.

I see that MCU CAN clock is configured to 20MHz but Main CAN is configured to 80MHz by default.

Is there a way to configure the MCU MCAN clocks in the PSDK.

Below is the details of the CAN channels:

root@j722s-evm:/opt/aptiv_apps# ip -details link show mcu_mcan0

7: mcu_mcan0: <NOARP,ECHO> mtu 72 qdisc noop state DOWN mode DEFAULT group default qlen 10

    link/can  promiscuity 0 allmulti 0 minmtu 0 maxmtu 0

    can <FD> state STOPPED (berr-counter tx 0 rx 0) restart-ms 0

          bitrate 500000 sample-point 0.750

          tq 250 prop-seg 3 phase-seg1 2 phase-seg2 2 sjw 2 brp 5

          m_can: tseg1 2..256 tseg2 2..128 sjw 1..128 brp 1..512 brp_inc 1

          m_can: dtseg1 1..32 dtseg2 1..16 dsjw 1..16 dbrp 1..32 dbrp_inc 1

          clock 20000000 numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 tso_max_size 65536 tso_max_segs 65535 gro_max_size 65536 gso_ipv4_max_size 65536 gro_ipv4_max_size 65536 parentbus pl

root@j722s-evm:/opt/aptiv_apps# ip -details link show mcu_mcan1

4: mcu_mcan1: <NOARP,ECHO> mtu 72 qdisc noop state DOWN mode DEFAULT group default qlen 10

    link/can  promiscuity 0 allmulti 0 minmtu 0 maxmtu 0

    can <FD> state STOPPED (berr-counter tx 0 rx 0) restart-ms 0

          bitrate 500000 sample-point 0.750

          tq 250 prop-seg 3 phase-seg1 2 phase-seg2 2 sjw 2 brp 5

          m_can: tseg1 2..256 tseg2 2..128 sjw 1..128 brp 1..512 brp_inc 1

          m_can: dtseg1 1..32 dtseg2 1..16 dsjw 1..16 dbrp 1..32 dbrp_inc 1

          clock 20000000 numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 tso_max_size 65536 tso_max_segs 65535 gro_max_size 65536 gso_ipv4_max_size 65536 gro_ipv4_max_size 65536 parentbus pl

root@j722s-evm:/opt/aptiv_apps# ip -details link show main_mcan0

5: main_mcan0: <NO-CARRIER,NOARP,UP,ECHO> mtu 72 qdisc pfifo_fast state DOWN mode DEFAULT group default qlen 10

    link/can  promiscuity 0 allmulti 0 minmtu 0 maxmtu 0

    can <FD> state BUS-OFF (berr-counter tx 248 rx 0) restart-ms 0

          bitrate 500000 sample-point 0.750

          tq 250 prop-seg 3 phase-seg1 2 phase-seg2 2 sjw 2 brp 20

          m_can: tseg1 2..256 tseg2 2..128 sjw 1..128 brp 1..512 brp_inc 1

          dbitrate 2000000 dsample-point 0.750

          dtq 25 dprop-seg 9 dphase-seg1 5 dphase-seg2 5 dsjw 5 dbrp 2

          m_can: dtseg1 1..32 dtseg2 1..16 dsjw 1..16 dbrp 1..32 dbrp_inc 1

          clock 80000000 numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 tso_max_size 65536 tso_max_segs 65535 gro_max_size 65536 gso_ipv4_max_size 65536 gro_ipv4_max_size 65536 parentbus pl

root@j722s-evm:/opt/aptiv_apps# ip -details link show main_mcan1

6: main_mcan1: <NOARP,ECHO> mtu 16 qdisc noop state DOWN mode DEFAULT group default qlen 10

    link/can  promiscuity 0 allmulti 0 minmtu 0 maxmtu 0

    can state STOPPED (berr-counter tx 0 rx 0) restart-ms 0

          m_can: tseg1 2..256 tseg2 2..128 sjw 1..128 brp 1..512 brp_inc 1

          m_can: dtseg1 1..32 dtseg2 1..16 dsjw 1..16 dbrp 1..32 dbrp_inc 1

          clock 80000000 numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 tso_max_size 65536 tso_max_segs 65535 gro_max_size 65536 gso_ipv4_max_size 65536 gro_ipv4_max_size 65536 parentbus pl

I have tried to look into the mcan kernel driver files but could not find any configuration nor in the dts file.

Kindly have a look into this request at the earliest.

  • 0
    TI__Guru 52983 points

    Hi Tejas,

    Could you do a "k3conf dump clocks | grep -i mcan"? This should dump all the clocks.

    I see in our TRM that MCAN and MCU_MCAN use different sources for the clock. I suspect they are using the MAIN_PLL0_HSDIV4_CLKOUT and MCU_PLL0_HSIV4_CLKOUT respectively, and MCU_PLL 0 HSDIV4 is set to 20MHz.

    Regards,

    Takuma

  • 0 in reply to Takuma Fujiwara
    Prodigy 60 points

    Hello,

    Thanks for your quick response.

    Let me have a look at the TRM to gather more details.

    In the meantime, here is the snippet of output of the command you shared

  • 0 in reply to Tejas S P
    TI__Guru 52983 points

    Hi Tejas,

    The k3conf command should output clocks. I think it was cut off in the shared screenshot. Can you do a comparison between DEV_MCAN0_MCANSS_CCLK_CLK and DEV_MCU_MCAN0_MCANSS_CCLK_CLK? These should be the bus clock for main MCAN0 and MCU MCAN0 respectively.

    Regards,

    Takuma

  • 0 in reply to Takuma Fujiwara
    Prodigy 60 points

    Hi,

    I apologies for the screenshot.

    Here is the complete one

    Here are the values mapped

    DEV_MCAN0_MCANSS_CCLK_CLK = 80000000

    DEV_MCU_MCAN0_MCANSS_CCLK_CLK = 20000000

    I understand from this command that the MCU MCAN is using a lower clock.

    Can you please help me on the details for configuring/ changing the MCU MCAN clock to match Main MCAN clock?

  • +1 in reply to Tejas S P
    TI__Guru 52983 points

    Hi Tejas, 

    In theory, k3conf should be able to set those clocks. Syntax would be "k3conf set clock <device ID> <clock ID> <desired frequency Hz>". However, when I tried it, the clock shown in "ip" command was not changing. It should be changed underneath, so I think somehow the change is not propagating to tool.

    Alternatively, this hack should set the frequency for all clocks to be the same. I can confirm that the changes are propagated to "ip" command, and clock when checked with k3conf is changed.

     https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/0001_2D00_Force_2D00_MCAN_2D00_at_2D00_80000000Hz.patch

    As a warning, this will change cclk for all MCAN to 80MHz, which means MCU0 PLL's HSDIV4 clock frequency will be changed. Should check with "k3conf dump clocks | grep -i MCU_0_HSDIVOUT4" to see if other modules that are important to your system are depending on this HSDIV output.

    Regards,

    Takuma