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AM625-Q1: How to read manufacturer ID of external DDR Ram

Huy Khuat
Intellectual 621 points
Part Number: AM625-Q1

Tool/software:

Hello TI expert,

We are using  MICRON_MT53E256Mx or ISSI_DDR_43-46LQ16256B RAM for AM625-Q1 board, corresponding to 2 separate configurations RAM for each type.

We want to read the manufacturer ID (MR5 register) during the run and select the corresponding configuration RAM

Can you guide me how to read the MR5 register at SBL1 ?

Thanks you very much

Huy

  • 0
    Intellectual 621 points

    And I looked at the spec document and saw that to read the MR5 register it would be through the 0x0F3083B0h register, is this correct?, but the value I read in SBL1 and the devmem2 command on the kernel are both 0x0.

    What is MR5_DATA_F0_0, MR5_DATA_F1_0....? they are both for reading register 5, what is the difference?

    Best regards,
    Huy

  • 0 in reply to Huy Khuat
    TI__Guru* 86440 points

    Hi Huy, it would probably be more practical to come up with a common configuration that would work for both memories.  The interface to write/read MR registers requires that the controller/PHY be in an initialized state, which requires that the memory should already be initialized and trained.  Thus you would need to have a DDR configuration to get to that point anyway.

    You should be able to achieve a common configuration with the 2 devices you mentioned. If there are parameters with different timings, ensure you choose the highest value for the parameter for min valued specs.  

    Regards,

    James

  • 0 in reply to JJD
    Intellectual 621 points

    Hello James,

    Thanks for your suggestion to make a common configuration for both RAMs. But in this thread I want to focus on how to read the MR5 register.
    Can you guide me to read it in the SBL of the AM62x chip? How to put the controller/PHY into initial state? and then read the MR register.

    In my test, after Ram init I read register 0x0F3083B0h, its value is still 0x0, is there anything I did wrong?

    Best regards,

    Huy

  • +1 in reply to Huy Khuat
    TI__Guru* 86440 points

    Huy,

    check towards the end of this thread.  This gives you the sequence to read from one of the MR registers.  Ensure you add the delay after the read() function as mentioned.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1343101/sk-am62-lp-how-to-issue-mrw-command-to-lpddr4-device

    Regards,

    James

  • 0 in reply to JJD
    Intellectual 621 points

    Hello James,

    Thank you for your help, I have read the MR5 register.

    Regards,

    Huy

  • 0 in reply to JJD
    Intellectual 621 points

    Hello James,

    In case i want to read before config ram is that possible?, and if so what do i need to do?, if not is there any way to reinit ram?

    Thanks,

    Huy

  • 0 in reply to Huy Khuat
    TI__Guru* 86440 points

    Hi Huy, the procedure the read the registers requires controller to be initialized.  So it's not possible to read the MR values before initialization. Re-initialization occurs on every power up.  Do you need to re-initialize after that, and why?  Can you explain more of what you want to do?  

    Regards,

    James

  • 0 in reply to JJD
    Intellectual 621 points

    Hello James,

    I have the idea of ​​init twice, the first time is with the default ram config, then read the ID of the ram and the second time will init the ram corresponding to the ram config of that ID.

    Thanks,

    Huy

  • 0 in reply to Huy Khuat
    TI__Guru* 86440 points

    Hi Huy, i still would recommend to come up with a common configuration so you can avoid all of the reinitialization.  You would have to modify the first init routine to remove a lot of the training (so that the training doesn't fail), but we do not support this kind of a modification.  

    Regards,

    James