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AM623: AM62x CPSW Ethernet switch mode?

Part Number: AM623

Tool/software:

Team,

Our customer has used both AM335x and AM62x in various designs;  they have the following discrepancy they'd like to discuss with us:

"

I work as part of a team which is in the process of porting one of our firmware applications from the AM335x platform to the AM62x.  On the AM335x platform, certain variants of our hardware used the CPSW Ethernet peripheral in switch mode, such that the two physical Ethernet ports functioned as ports of a layer 2 switch, and a single Ethernet interface was created by the Linux OS which was bound to both physical ports.  This was configured via the Linux device tree, with switch mode being the default operating mode, while independent interface operation could be enabled by adding the “dual_emac” property to the appropriate device tree entry.

 

The above does not appear to apply to the AM62x platform, or at least we have not found documentation that suggests it is possible.  We did find the CPSW3g page of the processor SDK for AM62x which describes creating a Linux software bridge between the two interfaces in order to emulate the operation of a layer 2 switch between the two physical interfaces.  We have implemented this during initial development and found it to be less-than-ideal for several reasons:

 

  1. It requires extra scripts and services which must be run each time the device boots.
  2. The bridge interface takes several seconds to become active and obtain an address.  In some cases our application starts before this occurs, and thus is not able to bind to the interface as it does not yet have an address.  Further delaying the startup of our application until the bridge is up is problematic as we already have customer complaints about startup being “too slow” which were part of the reason we are moving to the higher-performance AM62x platform.
  3. We are not able to determine when the interface goes down (i.e. is unplugged) by monitoring the bridge interface—we must instead monitor both member interfaces (eth0 and eth1) and try to determine which is or was up/active in order to determine whether it is now down/inactive.
  4. It would seem that using a software bridge would require host processor and kernel overhead to process each packet which traverses the bridge, likely impacting overall system performance relative to the hardware-based bridging used on the AM335x platform.  Note that we have not yet confirmed this to be the case through testing, however.

 

Given the above, we would like to understand whether there is an alternate hardware-based means to use the interface in switched mode or if the software-based bridge is in fact the only solution on this platform.

 

Note that we have been directed not to post questions on public internet forums (the TI E2E processor forum), hence I am reaching out directly to you.  Thanks for any assistance you can provide,

"

Comments welcomed!

TY,
CY

  • Hi Chris, 

    Regarding how AM62x configures switch mode, the method is different from how it was done for AM335x as was described by the customer. However, there does seem to be a confusion over the fact that a br0 interface is required for switch mode and thinking that this means it is a software switch being implemented. This is not the case as the key command that is used to setup hardware switching is the "devlink" command. Please see my explanation in https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1463803/processor-sdk-am62x-how-to-use-cpsw3g-in-hw-switch-mode-using-linux/5619131#5619131

    In terms of how to assess how much faster br0 bridge operates in hardware switch mode vs dual emac mode, please see my response in https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1468456/am625-cpsw-mode-and-bridging/5679164#5679164 

    Given the above, we would like to understand whether there is an alternate hardware-based means to use the interface in switched mode or if the software-based bridge is in fact the only solution on this platform.

    From my understanding, the reason why AM62x uses a different method to setup switch mode is to put it more broadly, due to Linux kernel version differences from what was used for AM335x. From what I remember (from my colleague Schuyler who is more familiar with AM335x switch configuration and why the transition to how we setup switch mode now), changing to using commands rather than modifying the DTS is simply due to making it easier to change between dual-emac and switch mode when Linux is already running on the processor instead of having to power off everything and manually make the change in the DTS every-time we need to change between dual-emac and switch mode. 

    I tried tracking down which kernel patch made the change https://lore.kernel.org/all/20201130082046.16292-5-vigneshr@ti.com/, it seems to imply this method of setting up switch mode with devlink was specifically implemented for K3 devices (starting with AM65x). Based on this, I'm assuming there probably isn't an alternate method of setting up switch mode using the DTS for example like it was done on K3 devices. 

    It might be worth looking through kernel patches to see if there was any log of why the change in switch configuration was made. (At least until Schuyler gets back)

    Please let us know if you have any additional questions!

    -Daolin

  • Hi Daolin,

    We do very much appreciate your reply on this one and detailed answer.

    In communicating with the customer just today, we realize that it is not quite the answer we were hoping for but appears they’ll have to live with the bridge implementation and the additional complication it adds to their implementation.

    This is all good to know though and we appreciate it.

    I'll tie off with you shortly to close the thread.

    Regards,

    Chris

  • Hi Chris, 

    Thanks for the update regarding this topic.

    In communicating with the customer just today, we realize that it is not quite the answer we were hoping for but appears they’ll have to live with the bridge implementation and the additional complication it adds to their implementation.

    Yes, unfortunately to my knowledge I don't think there is a way to avoid adding a br0 interface. But from my understanding, because the hardware switch configuration can be setup with devlink, theoretically there shouldn't be additional delay in forwarding packets from one port to another (though I haven't measured this myself).

    Let me know when/if this thread can be closed!

    -Daolin