• State
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 5 replies
  • Subscribers 99 subscribers
  • Views 194 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

AM335x error connecting to target: PRSC module failed to write to a router register

AM6422: Error connecting to the target: (Error -6305) PRSC module failed to write to a router register.

Jakub Grad
Intellectual 720 points
Part Number: AM6422
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi

I have a problem to upload custom software or TI examples from SDK to other R5 cores than R5_0 core 0. Attempt to flash example software e.g empty_am64x-evm_r5fss0-1_nortos_ti-arm-clang and with error:

MAIN_Cortex_R5_0_1: Error connecting to the target: (Error -6305) PRSC module failed to write to a router register. (Emulation package 20.2.0.3536) 

And this happens also when I try to flash empty project on any other core besides R5_0 core 0 - on that core everything works fine.

We are using:

  • CCS 20.2.0.12__1.8.0
  • MCU + SDK for AM64x 10.1.0.32
  • SysConfig 1.23.0
  • XDS110 Debug Probe Rev. A

Based on related topics I tried to use older version of software CCS, MCU+SDK and SysConfig and also lowering the TCLK JTAG speed. It does not help.

Thanks for help.

BR

Jakub

  • 0
    TI__Mastermind 49048 points

    Hi Jakub,

    Have you initialized the EVM properly with the SBL binaries? Please refer EVM_FLASH_SOC_INIT 

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 720 points

    Actually not. So this is initialization is required even if we do not use A53 core at all?
    JTAG is communicating with this SBL binary during debugging?

    So how it works with R5_0 core 0? Because I have not flashed any SBL on that core and flashing application via XDS110 Debug probe seems to work.

  • 0 in reply to Jakub Grad
    TI__Mastermind 49048 points

    Hi Jakub,

    The Core needs to be initialized before you load any binary to it via XDS110 debugger. 

    Can you please describe your flow?

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 720 points

    On our system we have VxWorks system running on A53. It is loaded by u-boot from external flash memory. Besides that we wanted to have ability to develop applications for R5 cores using CCS. As of now R5 cores applications are not loaded via u-boot or other mechanism during boot of VxWorks. So you mean that JTAG can only communicate with R5 core if A53 initialize those cores or eventually if we load SBL manually (via UART boot mode)?
    This R5 cores initialization can be done by u-boot or SPL via some device tree adjustments?

  • 0 in reply to Jakub Grad
    TI__Mastermind 49048 points

    Hi Jakub,

    Is A53 the only core you initialized? 

    Jakub Grad said:
    So you mean that JTAG can only communicate with R5 core if A53 initialize those cores

    Yes, this is correct. The core needs to be initialized for debugger to communicate with.

    Jakub Grad said:
    This R5 cores initialization can be done by u-boot or SPL via some device tree adjustments?

    I am not aware how VxWorks works here. I do have documentation from Linux academy which does tell about remoteproc supported from U-boot.

    Please refer U-boot Remoteproc for details.

    Regards,

    Tushar