AM6442: AM6442BSFGHAALV

Fhamitha M

Part Number: AM6442
Other Parts Discussed in Thread: DP83869, TMDS64EVM

Tool/software:

Hi,

I’m working on signal integrity analysis for the AM6442BSFGHAALV processor and DP83869HMRGZT PHY using the RGMII interface at 125 MHz. For TX signals (TX data, TX CLK, TX CTRL) with a 1-inch trace and a 0Ω series resistor at the driver side (processor), I observed ringing. When I increased the resistor to 22Ω, the fall time exceeded the target range of 0.75 ns and reached around 1 ns. Rise time is also close to the edge of the acceptable range. Increasing the series resistor further is degrading the signal quality. I will share snapshots of the results I got, along with the parameter range we’re targeting. Can you suggest a better approach for tuning termination in this case?

2 months ago

0 Kallikuppa Sreenivasa 2 months ago

TI__Guru**** 189879 points

Hello Phamitha,

Thank you for the query.

Help me understand if you are facing any communication issues with 0R or 22R series resistor.

Regards,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Hi Sreenivasa,

The above images represent our design with series resistor for termination and its respective eye diagram is not much good, where the eye border was crossing the eye mask. Could you please, suggest us a better termination for this issue?

0 Kallikuppa Sreenivasa 2 months ago in reply to Fhamitha M

TI__Guru**** 189879 points

Hello Fhamitha,

Thank you.

Can you confirm if you are facing any communication issue or are you only performing simulations

Can you share the clock signal probed image.

Regards,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Hi Sreenivasa,

We are performing simulation for the AM644 on main board & DP83869 on the custom daughter board, which is board to board analysis. Now, can you suggest a solution for series termination issue for TX signal line & please confirm whether the AM64x SR 2.0 is the latest IBIS model? or share the latest IBIS model for AM644.

0 Kallikuppa Sreenivasa 2 months ago in reply to Fhamitha M

TI__Guru**** 189879 points

Hello Fhamitha,

Thank you.

Kallikuppa Sreenivasa said:
Can you share the clock signal probed image.

Can you share the above clock signal plot.

I suspect we use the rise time for checking the integrity for the RGMII signal. I will have to check with the expert.

Did you download the IBIS from TI.COM - the IBIS model on TI.com is the updated model.

Regards,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Hi Sreenivasa,

The above image represents the clock signal probed.

we download the IBIS model from AM6442 data sheet, product information and support | TI.com

Why termination resistors not added at driver side(AM6442BSFGHAALV processor) in the TMDS64EVM RGMII interface to the DP83869HMRGZT phy?

Regards,

Fhamitha M

0 Kallikuppa Sreenivasa 2 months ago in reply to Fhamitha M

TI__Guru**** 189879 points

Hello Fhamitha,

Thank you.

Help me understand the probe point - near the SOC clock output pin or at the input of EPHY.

Regards,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Probing at the input of phy

0 Kallikuppa Sreenivasa 2 months ago in reply to Fhamitha M

TI__Guru**** 189879 points

Hello Fhamitha,

Thank you.

Let me check with the experts and come back.

Regards,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Hi Sreenivasa,

Just following up on my earlier mail. Kindly let me know if there are any updates?

Regards,

Fhamitha M

0 Kallikuppa Sreenivasa 2 months ago in reply to Fhamitha M

TI__Guru**** 189879 points

Hello Fhamitha,

Thank you.

I am checking with the simulation expert.

Regards,

Sreenivasa

0 Kallikuppa Sreenivasa 2 months ago in reply to Kallikuppa Sreenivasa

TI__Guru**** 189879 points

Hello Fhamitha,

Refer below inputs i received and the summary of the discussions:

If they are concerned about signal quality, here are some recommendations regarding possible methods of improving it. They can implement whichever technique works best for their design.

	Recommendation	How does it help?
A	Add series termination	Helps reduce reflections and helps with better signal quality
B	Add dummy load cap	Helps reduce the return reflections. Balancing cap on both ends reduces the overall reflections
C	Increase in trace length	Prevent the out-of-phase reflection from impacting the incident signal while it is still transitioning
D	Combination of A, B, C	Better rise/fall and improves overall eye along with a combination of A, B, C to reduce reflections

Customer attached a Eye diagram – not sure how they generated and if the eye diagram is applicable for the RGMII TX clock.

The clock waveform seems to have multiple distortions causing the rise time to change.

Did you have any comments on the waveform for the clock customer shared.

SDM>> The recommendations in the table below should all help in improving the waveform for the Clock.

Regarding the below table, did you have a cap that can be added on both ends.

SDM>> The cap in the table is only meant to be added at the load end to “compensate” for a lower Ccomp in the load.

There is no specific value – it will depend on the difference in the total (Ccomp + Cpkg) value in the AM4x SoC and the customer PHY

Typically in the order of a few pFs

Regrds,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Hi,

Can you share the latest IBIS model for AM6442BSFGHAALV? We done simulation using this two ibis model sprm730e and sprm810, but we are facing some issues in these models.

0 Kallikuppa Sreenivasa 2 months ago in reply to Fhamitha M

TI__Guru**** 189879 points

Hello Fhamitha,

Thank you.

Please elaborate the issue.

The models on TI.com are the latest.

In case you are looking to program the drive strength, this is not supported.

Regards,

Sreenivasa

0 Fhamitha M 2 months ago in reply to Kallikuppa Sreenivasa

Prodigy 155 points

Hello Sreenivasa,

I am facing monotonicity issues and ringing even with just a 1-inch trace when using a 0-ohm series resistor in the current IBIS model. When I use termination resistors like 22Ω or 33Ω, the waveform improves, but the rise/fall times go out of spec. We suspect there may be issues with the model itself. On the TI website, I see four different IBIS models available for this processor — could you please confirm which is the latest or most accurate version? Previously, we were using models SPRM730D and SPRM810

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AM6442: AM6442BSFGHAALV