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Original question:

SK-TDA4VM: boot logs

SK-TDA4VM: Runtime logs

komal k s
Prodigy 150 points
Part Number: SK-TDA4VM

Tool/software:

Question: Unable to See C7x RTOS-Side Logs During TIDL Inference (from app_tidl)
I added a printf statement to the C7x RTOS side in:


vision_apps/platform/j721e/rtos/common/app_init.c:755
Then i ran in minicom 
root@j721e-evm:/opt/vision_apps# ./vx_app_arm_remote_log.out &
White check mark I can see my custom log printed via printf in minicom, so the remote log mechanism is working in general.

However, when I run the TIDL demo:
./vx_app_tidl -c config.txt
X I do not see any logs printed from the C7x RTOS side during inference — even though I know inference is happening, and the C7x should be actively processing.

Mag What I’ve Verified:
VX_ZONE_INFO, VX_ZONE_WARNING, etc., are globally enabled.

The TIDL node is set to run on TIVX_TARGET_DSP_C7_1.

APP_PRINTF works from general RTOS files like app_init.c.

TIDL inference completes successfully.

QuestionHow can I enable or trace debug/inference logs specifically from the RTOS side (C7x) when running TIDL inference from app_tidl?
Is there a logging macro other than APP_PRINTF I should be using inside DSP kernels? 

Do I need to recompile the DSP-side Vision Apps with debug flags?

Any additional logging setup needed for TIDL or tivxTIDLNode?

  • 0
    TI__Expert 7031 points

    Hi

    Thanks for the question.

    Could you please do a clean build first, by following the steps below

    1. make vision_apps_scrub

    2. make vision_apps

    For inference debug level and log, please try to turn on the debug level as 3, like the one shown below  

    ./TI_DEVICE_armv8_test_dl_algo_host_rt.out (your inference configuration) --debugTraceLevel 3

    Regards

    Wen Li

  • 0 in reply to Wen Li
    Prodigy 150 points

    I followed the steps and enabled --debugTraceLevel 3 during inference, but it didn't fully address my query.

    My main goal is to observe and log what happens specifically on the C7x RTOS side during inference. I would like to know:

    1. How can I enable or expose logs from the RTOS side (i.e., from the C7x core) to verify that inference is actually running there?

    2. Is there specific source code or a location in the Vision Apps or TIDL RTOS framework where I can insert my own debug logs (e.g., in the inference task or kernel) on the C7x?

    3. Ultimately, I want to ensure that when I run an inference app (e.g., app_tidl or any graph-based app), any debug prints I add on the RTOS side (C7x) are executed and visible through remote logs or serial output.

    • The right place in the source code to insert such logs?

      Fullscreen 2703.run_app_tidl_log.txt Download 
      root@j7-evm:/opt/vision_apps# ./run_app_tidl.sh
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
APP: Init ... Done !!!
   181.640433 s:  VX_ZONE_INIT:Enabled
   181.640456 s:  VX_ZONE_ERROR:Enabled
   181.640461 s:  VX_ZONE_WARNING:Enabled
   181.644159 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
   181.644350 s:  VX_ZONE_INIT:[tivxHostInit:48] Initialization Done for HOST !!!
[C7x_1 ]    181.809425 s:  VX_ZONE_WARNING:[tivxKernelTIDLCreate:615] All Interrupts DISABLED during TIDL process


 =================================
 Demo : TIDL Object Classification
 =================================

 p: Print performance statistics

 x: Exit

 Enter Choice: network file: /opt/vision_apps/test_data/tivx/tidl_models/tidl_net_mobilenet_v1.bin
config  file: /opt/vision_apps/test_data/tivx/tidl_models/tidl_io_mobilenet_v1_1.bin
Iteration 0 of 1000000 ... 
x

   184.920091 s:  VX_ZONE_INIT:[tivxHostDeInit:56] De-Initialization Done for HOST !!!
   184.924433 s:  VX_ZONE_INIT:[tivxDeInit:111] De-Initialization Done !!!
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
MEM: Alloc's: 21 alloc's of 29432301 bytes 
MEM: Free's : 21 free's  of 29432301 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!
root@j7-evm:/opt/vision_apps#


      so the file that i have attached it was there in SDK ... as there c7x inference disabled during tidl process...... this line is visible ... as such i want to eanble logs for rtos side c7x and debug it . 

      ./ti-processor-sdk-rtos-j721e-evm-11_00_00_06/c7x-mma-tidl/arm-tidl/tiovx_kernels/tidl/dsp$ ls
      concerto.mak vx_target_kernels_tidl.c vx_tidl_target.c

      I have enabled logs in this file , but still its same .