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TDA4VL-Q1: The GPIO external interrupt cannot be triggered, I hope the expert can help me solve it

KONG XIANGXU
Expert 1996 points
Part Number: TDA4VL-Q1

Tool/software:

Hello, TI team：

    I found that the interrupt could not be triggered when using the interrupt trigger of GPIO, I refer to the code of the led_blink under the test folder of the gpio module in pdk10.0, I used the GPIO0_15 of the MAIN domain, set it as the output, call Board_initGPIO () first, then call GPIO_init(), then call GPIO_setCallback(), then call GPIO_enable(), When calling AppGPIOConfig() and then calling GPIO_toggle flipping the level so that an interrupt can be triggered, but the interrupt is not actually triggered, or even entering the GPIO_V0_hwiFxn(), the values of the BINTEN, DIR01, SET_DATA01, SET_RIS_TRIG01 registers of GPIO0 are the same as the settings, but the value of the corresponding bit of the INTSTAT01 is 0, indicating that no interrupt has occurred , the value of the specific register and the code I put below, please experts help me see as soon as possible, to achieve interrupt triggering, the project is urgent, and the trouble is as soon as possible.

  • 0
    Expert 1996 points

    The code implementation is as follows

    The values of the registers are as follows

  • 0 in reply to KONG XIANGXU
    TI__Mastermind 41256 points

    Hi,

    Please expect a delay in responses due to holidays in the US.

    Regards,

    Josiitaa

  • 0 in reply to Josiitaa RL
    Expert 1996 points

    I have reviewed some posts and would like to provide additional information to help you locate the issue more quickly. 1. The return value of GPIO_socConfigIntrPath is CSL_PASS. 2. The boardCfg=BOARD_INIT_MODULE_CLOCK has been added in the Board_initGPIO() function, followed by Board_init(boardCfg). 3. The clock frequency of GPIO0 is 125,000,000, and GPIO0_15 is configured to drive an LED on our project board. Calling GPIO_toggle successfully toggles the light, confirming that GPIO0_15 is outputting correctly. 4. I also attempted to use GPIOs from the WKUP domain, specifically WKUP domain GPIO0_11, but I was unable to trigger an interrupt. Similarly, using GPIO0_11 in led_blink also failed to trigger an interrupt.

  • 0 in reply to KONG XIANGXU
    TI__Mastermind 19600 points

    Hi,

    Please expect a delay in responses due to US holiday.

    Thanks,

    Neehar

  • 0
    TI__Genius 9361 points

    Dear customer，

        Could you please add the requirement which core you hope to recevice the interrupt by GPIO0_15?  Thanks.

    Linjun

  • 0 in reply to Linjun Meng
    Expert 1996 points

    hello，Thanks for the reply, the core we use is the R5_0 of the MCU domain, the project is urgent, I hope you can help us solve it as soon as possible.

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    Which means the main domain GPIO interrupt source will route to Mcu1_0.  Generally, as to the limited resource of WKUP_GPIOMUX_INTRRT0 for MCU1_0, the bank interrerup will be used by default. 

    Here are some quesions need you input,

    1 Which main domain GPIOs will router to mcu domain as interrupt?

     2 Which Mcu domian GPIO will router to Main domain as interrupt?

    Figure out your requirement, we will support you for the next step. 

    Thanks. 

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, I would like to inquire about the testing code provided in the PDK package. Where is the interrupt routing for the GPIO in the main domain? Why is it unable to trigger an interrupt? We are verifying using GPIO0_15, as the level change on GPIO0_15 causes an indicator light to flash on our project board, making it easier to observe the phenomenon. We have also attempted interrupts on the GPIO in the WKUP domain, but we were equally unable to trigger them. We will make adjustments based on project requirements once verification is complete. Currently, our project only requires WKUP_GPIO0_5 and WKUP_GPIO0_61 for GPIO interrupts.

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    As to the interrupt mapping is a system level resouce plan, so need you input your requirement. Currenlty if only use WKUP_GPIO0_5 and WKUP_GPIO0_61 as interrupt to MCU1-0, just debug it when issue encountered.  please dump the register and place here by the following script. I will help to check the status. 

    /cfs-file/__key/communityserver-discussions-components-files/791/TDA4VL_5F00_gpio_5F00_byd.gel

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, the output of the gel script is as follows. I debugged it, but I still did not enter the interrupt handling function.

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x0001006A

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200020 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200038 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220003C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200040 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200044 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200048 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220004C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200050 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200060 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200070 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110000 = 0x44832905

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110004 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110008 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7DF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110020 = 0x019AE006

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xDFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211003C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110040 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110044 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110048 = 0x83008001

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110050 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110060 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110070 = 0x00800007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110084 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110088 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211008C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110090 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110094 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110098 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211009C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100AC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B0 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100BC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100CC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80400 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80420 = 0x30000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80440 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80480 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E0 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80500 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80520 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80540 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80560 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80580 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80404 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80424 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80444 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80464 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80484 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80504 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80524 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80544 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80564 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80584 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80408 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80428 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80448 = 0x000003C0

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80468 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80488 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80508 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80528 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80548 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80568 = 0x07000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80588 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80410 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80430 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80450 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80470 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80490 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804F0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80510 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80530 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80550 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80570 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80590 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805F0 = 0x00000000

  • 0 in reply to KONG XIANGXU
    TI__Mastermind 19600 points

    Hi,

    KONG XIANGXU said:
    We have also attempted interrupts on the GPIO in the WKUP domain, but we were equally unable to trigger them.

    Can you confirm the GPIO_socConfigIntrPath() return value when setting up the WKUP_ GPIO interrupt?

    KONG XIANGXU said:
    Currently, our project only requires WKUP_GPIO0_5 and WKUP_GPIO0_61 for GPIO interrupts.

    Which are you testing with? Or are you testing with WKUP_GPIO0_11? I am trying to understand which bank you are using.   

    Thanks,

    Neehar

  • 0 in reply to Neehar Sawant
    Expert 1996 points

    Hi，

    Neehar Sawant said:
    Can you confirm the GPIO_socConfigIntrPath() return value when setting up the WKUP_ GPIO interrupt?

    I typed this question earlier, as follows

    KONG XIANGXU said:
    The return value of GPIO_socConfigIntrPath is CSL_PASS
    Neehar Sawant said:
    Which are you testing with? Or are you testing with WKUP_GPIO0_11? I am trying to understand which bank you are using. 

    Currently, we have attempted GPIO0_15, GPIO0_31, GPIO0_11, WKUP_GPIO0_11, WKUP_GPIO0_5, WKUP_GPIO0_61, and WKUP_GPIO0_6, but none of them have been able to trigger an interrupt.

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    According to the register dump, currently only "Reg_0x42200010 = 0x0001006A" of CSL_WKUP_GPIOMUX_INTRTR0 configured.  That means WKUP_GPIO0_GPIO_BANK_3( WKUP_GPIO0_48 to WKUP_GPIO0_63) interrupt configured.   The WKUP_GPIO0_61 should work.  Note here, you are enabled bank interrupt. 

    If your purpose is WKUP_GPIO0_5 and WKUP_GPIO0_61works in interrupt mode separately, please follow the below setting

    *(volatile unsigned int *) (0x42200004) = 0x10005; // WKUP_GPIO0_5 MCU1_0 interrupt number 124

    *(volatile unsigned int *) (0x42200008) = 0x1003D; // WKUP_GPIO0_61 MCU1_0 interrupt number 125

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hi,

    Linjun Meng said:
     The WKUP_GPIO0_61 should work

    If it's configured correctly, why isn't the WKUP_GPIO0_61 interrupt generated?

    Linjun Meng said:

    *(volatile unsigned int *) (0x42200004) = 0x10005; // WKUP_GPIO0_5 MCU1_0 interrupt number 124

    *(volatile unsigned int *) (0x42200008) = 0x1003D; // WKUP_GPIO0_61 MCU1_0 interrupt number 125

    Can you tell me the name of the specific register? It's easy for me to find and set up

  • 0 in reply to Linjun Meng
    TI__Genius 9361 points

    Here are two demo function to set WKUP_GPIO0_5 and WKUP_GPIO0_61 as interrupt.

    static void MCU_GPIO0_5_configIntRouter()

    {

          int              status;

           struct tisci_msg_rm_irq_set_req rmIrqReq;

           struct tisci_msg_rm_irq_set_resp rmIrqResp;

            memset(&rmIrqReq, 0x0, sizeof(rmIrqReq));

            memset(&rmIrqResp, 0x0, sizeof(rmIrqResp));

            rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

            rmIrqReq.src_id = TISCI_DEV_WKUP_GPIOMUX_INTRTR0; //125

            rmIrqReq.src_index = 5;

            rmIrqReq.dst_id = TISCI_DEV_WKUP_GPIOMUX_INTRTR0;

            rmIrqReq.dst_host_irq = 0;

           

            rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;

            rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;

           

            Sciclient_rmIrqSetRaw((const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,

                                    &rmIrqResp,

                                    SCICLIENT_SERVICE_WAIT_FOREVER); 

            if(status==CSL_PASS)

            {

                UART_printf("ok \n");

            }

            else

            {

                UART_printf("failed\n");

            }

    }

     

    static void MCU_GPIO0_61_configIntRouter()

    {

            int              status;

           struct tisci_msg_rm_irq_set_req rmIrqReq;

           struct tisci_msg_rm_irq_set_resp rmIrqResp;

            memset(&rmIrqReq, 0x0, sizeof(rmIrqReq));

            memset(&rmIrqResp, 0x0, sizeof(rmIrqResp));

            rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

            rmIrqReq.src_id = TISCI_DEV_WKUP_GPIOMUX_INTRTR0; //125

            rmIrqReq.src_index = 61;

            rmIrqReq.dst_id = TISCI_DEV_WKUP_GPIOMUX_INTRTR0;

            rmIrqReq.dst_host_irq = 1;

           

            rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;

            rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;

           

            Sciclient_rmIrqSetRaw((const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,

                                    &rmIrqResp,

                                    SCICLIENT_SERVICE_WAIT_FOREVER); 

            if(status==CSL_PASS)

            {

                UART_printf("ok \n");

            }

            else

            {

                UART_printf("failed\n");

            }

    }

  • 0 in reply to Linjun Meng
    TI__Genius 9361 points

    Hi, 

    Send wbex meeting invitation to you. Please join in. Thanks.

    Linjun

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, I didn't see the meeting invitation, where did you send it

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    Bro, please check your mail-box. 

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, our company is several project teams using the same TI account, so the account is not my mailbox, and my mailbox cannot receive foreign mail.

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Please send an email to fdkjwaiyou@byd.com with "To li.xiao49@byd.com” in the subject line

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    OK, have you got my webex invitation?

  • 0 in reply to Linjun Meng
    Expert 1996 points

    I haven't received it yet, fdkjwaiyou@byd.com it may take a little time to get the email forwarded to me

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    OK.  if the goal is wkup_gpio0_5 and wkup_gpio0_61 trigger MCU1_0 interrupt separately, please follow my demo code and dump the register let me check.

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, there are some issues with the register values provided last time. The new register values are as follows. Regarding the test code you sent me, I would like to confirm whether it is unnecessary to call GPIO_init_v0() if I am using your test code's interface. I noticed that the GPIO_init_v0() code includes interrupt settings.

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010067

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x0001006A

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200020 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200038 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220003C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200040 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200044 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200048 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220004C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200050 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200060 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200070 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110000 = 0x44832905

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110004 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110008 = 0x00000009

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7DF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110014 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110018 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211001C = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110020 = 0x07FA6006

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110028 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xDFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211003C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110040 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110044 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110048 = 0x8300803C

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110050 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110060 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110070 = 0x00800007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110084 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110088 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211008C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110090 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110094 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110098 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211009C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100AC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B0 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100BC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100CC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80400 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80420 = 0x30000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80440 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80480 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C0 = 0x00000002

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80500 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80520 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80540 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80560 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80580 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80404 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80424 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80444 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80464 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80484 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80504 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80524 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80544 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80564 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80584 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80408 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80428 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80448 = 0x000003C0

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80468 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80488 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80508 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80528 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80548 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80568 = 0x07000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80588 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80410 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80430 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80450 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80470 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80490 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804F0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80510 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80530 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80550 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80570 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80590 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805F0 = 0x00000000

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    GPIO_init_v0() is used for bank interrupt. You can share your office phone number; I will call you directly. 

  • 0 in reply to Linjun Meng
    Expert 1996 points

    OK，My phone number is 15290006072

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, I tried the method of communication on the phone, and I didn't call GPIO_init() (what I understand is that the interrupt of bank is not used now, so there is no need to call GPIO_init()), call MCU_GPIO0_5_configIntRouter() and MCU_GPIO0_61_configIntRouter() first, and then call interrupt configuration, intrPrms.corepacConfig.isrRoutine=Callback (Callback is my callback function), intrPrms.corepacConfig.intVecNum=124 (WKUP_GPIO0_61 is 125), call Osal_RegisterInterrupt (&intrPrms, &hwiHandle) GPIO_enable() is called, the WKUP_GPIO0_5 and WKUP_GPIO0_61 are set to input, and the falling edge triggers, but there is no interrupt. The following uses the value of the register that debugs when waiting for the interrupt to trigger after initialization is complete:

     

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010067

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x0001003D

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x0001006A

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200020 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200038 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220003C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200040 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200044 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200048 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220004C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200050 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200060 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200070 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110000 = 0x44832905

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110004 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110008 = 0x00000009

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7DF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110020 = 0x07FA6006

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110028 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xDFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211003C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110040 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110044 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110048 = 0x8300003C

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110050 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110060 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110070 = 0x00800007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110084 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110088 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211008C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110090 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110094 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110098 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211009C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100AC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B0 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100BC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100CC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80400 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80420 = 0x30000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80440 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80480 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C0 = 0x00000002

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80500 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80520 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80540 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80560 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80580 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80404 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80424 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80444 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80464 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80484 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80504 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80524 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80544 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80564 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80584 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80408 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80428 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80448 = 0x000003C0

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80468 = 0x30000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80488 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80508 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80528 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80548 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80568 = 0x07000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80588 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80410 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80430 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80450 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80470 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80490 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804F0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80510 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80530 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80550 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80570 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80590 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805F0 = 0x00000000

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points
    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7DF

    This means the WKUP_GPIO0_5 set as output, please change to input mode ( bit5 should be 1, the actual is 0 as output)

    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xDFFFFFFF

     WKUP_GPIO0_61  set as output , please change to input mode ( bit29 should be 1, the actual is 0 as output)

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, I can't trigger the interrupt after I change it to input, the register value is as follows

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00070007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00070007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010067

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x0001003D

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x0001006A

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200020 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200038 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220003C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200040 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200044 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200048 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220004C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200050 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200060 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200070 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110000 = 0x44832905

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110004 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110008 = 0x00000009

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7FF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110020 = 0x07FA6026

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110028 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110034 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211003C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110040 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110044 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110048 = 0x8300003C

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110050 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211005C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110060 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110070 = 0x00800007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110084 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110088 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211008C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110090 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110094 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110098 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211009C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100AC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B0 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100BC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100CC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80400 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80420 = 0x30000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80440 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x80000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80480 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80500 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80520 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80540 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80560 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80580 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80404 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80424 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80444 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80464 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80484 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80504 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80524 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80544 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80564 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80584 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80408 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80428 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80448 = 0x000003C0

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80468 = 0x30000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80488 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80508 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80528 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80548 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80568 = 0x07000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80588 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80410 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80430 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80450 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80470 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80490 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804F0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80510 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80530 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80550 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80570 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80590 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805F0 = 0x00000000

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points
    KONG XIANGXU said:

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00030007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00070007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00070007

    The PADCONFIG register isn't correct. Please change to 0x50007, that is bit16 is 1, Bit18 is 1.( pull up/down is disabled, and enable the reveiver. )

    Please modify the code as below in the J721S2_pinmux_data.c

    {

    PIN_WKUP_GPIO0_5, PIN_MODE(7) | \
    ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))

    },

    {

    PIN_WKUP_GPIO0_61, PIN_MODE(7) | \
    ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))

    },

    {

    PIN_GPIO0_15, PIN_MODE(7) | \
    ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))

    },

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, the register values of the WKUPGPIO0_5 and WKUP_GPIO0_61 have been modified according to what you said, or can not trigger the interrupt, I can guarantee that the read level is changed by the jump, but still not into my interrupt handler, the new register value and the log print read the level value as follows:

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00020007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00050007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00050007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010067

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x0001003D

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x0001006A

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200020 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200038 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220003C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200040 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200044 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200048 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220004C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200050 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200060 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200070 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110000 = 0x44832905

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110004 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110008 = 0x00000009

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7FF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110020 = 0x07FA6026

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110028 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110034 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211003C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110040 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110044 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110048 = 0x8300003C

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110050 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211005C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110060 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110070 = 0x00800007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110084 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110088 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211008C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110090 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110094 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110098 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211009C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100AC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B0 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100BC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100CC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80400 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80420 = 0x30000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80440 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x80000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80480 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C0 = 0x00000002

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80500 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80520 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80540 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80560 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80580 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80404 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80424 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80444 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80464 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80484 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80504 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80524 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80544 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80564 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80584 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80408 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80428 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80448 = 0x000003C0

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80468 = 0x30000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80488 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80508 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80528 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80548 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80568 = 0x07000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80588 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80410 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80430 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80450 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80470 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80490 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804F0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80510 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80530 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80550 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80570 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80590 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805F0 = 0x00000000

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points
    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x0001006A

    Currently the bank3 interrupt is enabled. And the interrupt no. 127 happened. Below is the raw interrupt. I suppose this is caused by GPIO0_61.

    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x80000000

    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010067

    As my expectation, the Reg_0x42200004 = 0x00010005, why enabled bank0 here?

    Could you please make sure the change output value just the same as below?

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010005

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x0001003D

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x00000000

    Thanks.

  • 0 in reply to KONG XIANGXU
    TI__Mastermind 19600 points

    Hi,

    KONG XIANGXU said:
    Currently, we have attempted GPIO0_15, GPIO0_31, GPIO0_11, WKUP_GPIO0_11, WKUP_GPIO0_5, WKUP_GPIO0_61, and WKUP_GPIO0_6, but none of them have been able to trigger an interrupt.

    In addition, can you confirm the return value of GPIO_socConfigIntrPath is CSL_PASS for all of the GPIO and WKUP_GPIO pins?

    Thanks,

    Neehar

  • 0 in reply to Linjun Meng
    Expert 1996 points

    Hello, it has been modified according to what you said, and the interrupt was not triggered normally, and the modified register values are as follows:

    MCU_Cortex_R5_0: GEL Output: Reg_0x0011C03C = 0x00020007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0D4 = 0x00050007

    MCU_Cortex_R5_0: GEL Output: Reg_0x4301C0BC = 0x00050007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200004 = 0x00010005

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200008 = 0x0001003D

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200010 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200020 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200024 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200028 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200034 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200038 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220003C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200040 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200044 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200048 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220004C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200050 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220005C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200060 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200070 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4220007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42200080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110000 = 0x44832905

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110004 = 0x00000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110008 = 0x00000009

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211000C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110010 = 0xFFFFF7FF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110014 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110018 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211001C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110020 = 0x019AE026

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110028 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211002C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110030 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110034 = 0x00000020

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110038 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211003C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110040 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110044 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110048 = 0xA3000001

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110050 = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110054 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110058 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211005C = 0x20000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110060 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110064 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110068 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211006C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110070 = 0x00800007

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110074 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110078 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211007C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110080 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110084 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110088 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211008C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110090 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110094 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x42110098 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x4211009C = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100AC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B0 = 0xFFFFFFFF

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100B8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100BC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100CC = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x421100D4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80400 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80420 = 0x30000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80440 = 0x00000008

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80460 = 0x80000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80480 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80500 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80520 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80540 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80560 = 0x00100000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80580 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80404 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80424 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80444 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80464 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80484 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80504 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80524 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80544 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80564 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80584 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E4 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80408 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80428 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80448 = 0x000003C0

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80468 = 0x30000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80488 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80508 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80528 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80548 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80568 = 0x07000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80588 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805A8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805C8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805E8 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80410 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80430 = 0x00000080

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80450 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80470 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80490 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F804F0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80510 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80530 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80550 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80570 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F80590 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805B0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805D0 = 0x00000000

    MCU_Cortex_R5_0: GEL Output: Reg_0x40F805F0 = 0x00000000

  • 0 in reply to Neehar Sawant
    Expert 1996 points

    Hello, your colleague has asked me to use the code he provided to debug the gpio interrupt, seeing the question you asked, I used the method in the PDK package again, and confirmed that the return value of the GPIO_socConfigIntrPath is CSL_PASS through the log output, but at present we only use WKUPGPIO0_5 and WKUPGPIO0_61, and I only confirmed these two. The log output is as follows:

  • +1 in reply to KONG XIANGXU
    TI__Genius 9361 points
    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x42110024 = 0x00000020

    Currently the Wkup_GPIO0_5 is rising edge trigger the interrupt.  So the initialized logic should be Low to trigger the interrupt.

    KONG XIANGXU said:
    MCU_Cortex_R5_0: GEL Output: Reg_0x4211004C = 0x20000000

    The WKUP_GPIO0_61 is also rising edge trigger the interrupt. So the initialized logic should be  Low also.

  • +1 in reply to Linjun Meng
    Expert 1996 points

    Hello, now our interrupt can be triggered into the callback function normally, thank you very much for your help, but we use the code in the PDK package to do the trigger, adjust the test code, but what you said 0x40F80460 the value of this register has always been 0, but the values of 0x4211005C and 0x42110034 are correct, marking the interrupt triggering。

  • 0 in reply to KONG XIANGXU
    TI__Genius 9361 points

    After the ISR executed the interrupt state will be clean. the 0x40F80460 value your read is before the ISR or end the ISR?