AM62P-Q1: PCB related questions

Hello François

Thank you for the query.

Francois Charlot said:

They ask whether we have already seen a successful 8-layer PCB routing with this processor. If so, which tradeoffs had to be made?

As i understand, we do not have a 8 layer reference for customers to use.

Francois Charlot said:

They also asked if they could limit via usage to through-hole vias, with no buried nor blind vias.

As i understand we do not use Blink or buried Vias.

Let me check and update.

Regards,

Sreenivasa

Hello François

I checked with the team and have the below inputs:

We do not have a 8 layer board reference that has been successfully implemented.

We do have some of the lead customer who are designing with 8 layers.

Do you know if Valeo would want to use the HS400 capabilities of the eMMC interface.

Francois Charlot said:

They also asked if they could limit via usage to through-hole vias, with no buried nor blind vias.

We have not used buried or bling vias on the SK.

Regards,'

Sreenivasa

Hello Sreenivasa,

Thank you. Are you implying that the biggest challenge with 8 layers is to implement an HS400 eMMC interface?

Best regards,
François.

Hello Sreenivasa,

Thank you. I am good with the above information.

Best regards,
François.

Hello François

Thank you.

When you get a chance, please update us on the HS400 capabilities interest customer may have.

Regards,

Sreenivasa

Hello Sreenivasa,

Customer indeed want to implement HS400, so I have pointed them to your HS400 FAQ.

Thank you for having pointed this out.

Best regards,
François.

Hello François

Thank you.

Could you please update the status of the project. (Example - initial design or schematics complete or schematics started etc.

There are some specific collaterals that are shared for customer to refer and follow.

I will check and update if those are on mysecure.

Regards,

Sreenivasa