Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
I would like to set eight GPIO input interrupts for the AM6442 R5F0-1 core.
However, there seems to have been a problem changing the settings, as the debug output displayed the message "[Error] Sciclient event config failed!!!" and the processing stopped.
I would appreciate some advice on how to resolve this error.
・Steps taken
Since "launching K3 Respart Tool from make" was restricted by security software, I made the following changes directly to the sciclient_defaultBoardcfg_rm.c source.
Line 179: .num_resource = 8 → .num_resource = 4
Line 185: .num_resource = 8 → .num_resource = 4
Line 191: .num_resource = 4 → .num_resource = 8
Line 193: .start_resource = 8 → .start_resource = 4
After making the above changes, I ran the following command in the SDK root directory:
make -s -C tools/sysfw/boardcfg sciclient_boardcfg SOC=am64x
Since "executing GET RM DATA in sysconfig" was also restricted by the security software, I modified the code generated by sysconfig to create an initialization code.
static void Sciclient_gpioIrqSet(void)
{
int32_t retVal;
struct tisci_msg_rm_irq_set_req rmIrqReq;
struct tisci_msg_rm_irq_set_resp rmIrqResp;
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO0;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO0 + GPIO_GET_BANK_INDEX(32);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_4;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO0;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO0 + GPIO_GET_BANK_INDEX(40);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_5;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO0;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO0 + GPIO_GET_BANK_INDEX(41);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_6;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO0;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO0 + GPIO_GET_BANK_INDEX(42);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_7;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO0;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO0 + GPIO_GET_BANK_INDEX(43);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_8;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO1;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + GPIO_GET_BANK_INDEX(60);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_9;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO1;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + GPIO_GET_BANK_INDEX(61);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_10;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO1;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + GPIO_GET_BANK_INDEX(62);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE1;
rmIrqReq.dst_host_irq = CSLR_R5FSS0_CORE1_INTR_MAIN_GPIOMUX_INTROUTER0_OUTP_11;
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}
return;
}
