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AM2432: AM2432 Spread Spectrum Modulation setting

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Genius 11200 points
Part Number: AM2432

Tool/software:

1: 

In Table 5-1121. PLL2_SS_SPREAD Register Field Descriptions 'MOD_DIV' supports divide values of 1-63，But the register only has bits 16 to 19, a total of 4 bits, how do you write 1-63?

2: 

RGMII_RX manual for Tw(RXCH) 1000Mbps requirement is 3.6ns to 4.4ns, the current test time is 3.507ns~3.79ns, the minimum value does not meet the requirement;

RGMII_RX manual for Tw (RXCL) 1000Mbps requirements are 3.6ns to 4.4ns, the current test to time is 4.23ns ~ 4.458ns, the maximum value does not meet the requirements;As above, is there any risk based on our tested out Tw(RXCH) and Tw(RXCL)1?


Please help to evaluate, thanks!

Translated with DeepL.com (free version)

  • 0
    TI__Guru 62895 points

    AM2432 does not support Spread Spectrum Clocking.

    Tw(RXCH) and Tw(RXCL) are input parameters for AM2432 and the limits defined for this parameter were taken from the RGMII standard. It appears the attached PHY is introducing too much duty cycle distortion by creating shorter than expected high pulses and longer than expected low pulses. The AM2432 device was not validated to operate with clock pulse widths outside of the limits defined by the RGMII standard. Therefore, we expect the attached device to provide a clock that operates within the limits of 3.6ns to 4.4ns. Operating outside of the limits on a clock input could cause the RGMII receiver to do unpredictable things.

    Regards,
    Paul