Tool/software:
Hi Expert,
Customer report one abnormal warm reset issue, from the MCU_CTRL_MMR_CFG0_RST_SRC register, the value is 0x10, bit4 turn 1, and from the TRM, the reason of this warm reset is Thermal reset, so I let customer print the temp of VTM sensor, and Customers also used cooling solutions, the print of the VTM sensor always is around 48 and 50C, I also check the WKUP_VTM_MISC_CTRL2[25-16] MAXT_OUTRG_ALERT_THR, the value is 0x2f8, it represent 123C, so that this is no possible is a real Thermal reset, and I also let customer disable the VTM out of range alter as well. clear the WKUP_VTM_MISC_CTRL[0] ANYMAXT_OUTRG_ALERT_EN bit and change the source code to disable the Thermal reset as well. this bit is always 0 during the test, and the low probability (1/3000) abnormal reset is still here.
so I think although the reset reason said it is thermal reset, but it must be a mistake, it can't be the thermal reset, but I can 't find the reason of abnormal reset. and I also let customer to have test on TI EVM, it can be reproduced as well using the TI default SDK in around 700 times power on and off. they are using OSPI+EMMC boot mode, the emmc speed is DDR52. I need you help to find out any reason will cause the SOC trig the warm reset and record it as thermal reset?
BR,
Biao