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TDA4VE-Q1 POST Sequence selection

Ryan Zhou
Prodigy 90 points
Part Number: TDA4VE-Q1
Other Parts Discussed in Thread: TDA4VL, TDA4VM

Tool/software:

Hi TI expert,

In our original hardware design, MCU8&9 is pulled up for MCU_BOOTMODE setting.

And now PBIST and LBIST are needed. 

Could we change the POST sequence while eFuse programming in our factory without modifying the HW BOM?

SOC PN:  TDA4VE88T5AALZRQ1

Thanks,

  • 0
    TI__Guru** 112635 points

    Hi Ryan,

    Ryan Zhou said:
    And now PBIST and LBIST are needed.

    Which PBIST and LBIST are you looking at? The MCU_BOOTMODE pins dictate the HWPOST behavior, and this is run even before ROM gets to run.

    You can run PBIST and LBIST for other modules in s/w.

    Ryan Zhou said:
    Could we change the POST sequence while eFuse programming in our factory without modifying the HW BOM?

    No, this is not possible. There is no eFuse control for this. The only eFuses the Customer can program are associated with the Security eFuses that are programmed using KeyWriter.

    regards

    Suman

  • 0 in reply to Suman Anna
    Prodigy 90 points

    Hi Suman,

    We are processing MCU and  A-core  PBIST/LBIST.

    So, the bootmode value must be updated to MCU9=0 If SOC executes MCU BIST first?

    By the way, the eFUSE programming which can replace the POST sequence is in TI's Factory?

  • +1 in reply to Ryan Zhou
    TI__Guru** 112635 points

    Hi Ryan,

    Ryan Zhou said:
    We are processing MCU and  A-core  PBIST/LBIST

    A-Core PBIST/LBIST would have to be triggered in s/w through the SDL API.

    The BIST for MCU and Wkup domains being a Safety island needs to be run through the HWPOST.

    Ryan Zhou said:
    So, the bootmode value must be updated to MCU9=0 If SOC executes MCU BIST first?

    Yes, the bootmode value has to be latched with MCU9=0, not something you can modify using s/w. HWPOST is run before any s/w is run.

    Ryan Zhou said:
    By the way, the eFUSE programming which can replace the POST sequence is in TI's Factory?

    This section is a common chapter on all the TDA4 TRMs, but the footnote is only applicable to the earlier TDA4VM SoCs. There is no such provision for later devices including TDA4VE/TDA4VL.

    We will be adding another footnote for this in future TRM updates to make this clear.

    regards

    Suman