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SK-TDA4VM: BUS off status for MCAN5 and MCAN9

Ner Fellon
Intellectual 455 points
Part Number: SK-TDA4VM


Tool/software:

Hy,

I am using the SDK: rtos-09_02_00_05 on a custom board that has the same schematic like the SK-TDA4VM (MCU_MCAN0, MCAN0, MCAN5 and MCAN9).

All the three main domain CANs (MCAN0, MCAN5, MCAN9) are initialized and configured the same. However only just the MCAN0 works, the other two main CAN: MCAN5 MCAN9 continuously reports an bus off error:  MCAN_ERR_CODE_BIT0_ERROR. Using the probe Rx and Tx line are always 3.3V. As example we are using the mcan_evm_loopback_app_main_k3.c code. The transcievers are TCAN1046, means that the STB should be pulled down for normal mode. This works, but the CAN_H and CAN_L remains in recessive mode.

Pin configuration used:

static pinmuxPerCfg_t gMcan0PinCfg[] =
{
    /* MyMCAN0 -> MCAN0_RX -> W5 */
    {
        PIN_MCAN0_RX, PIN_MODE(0) | \
        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
    },
    /* MyMCAN0 -> MCAN0_TX -> W6 */
    {
        PIN_MCAN0_TX, PIN_MODE(0) | \
        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
    },
    {PINMUX_END}
};

static pinmuxPerCfg_t gMcan5PinCfg[] =
{
    /* MyMCAN5 -> MCAN5_RX -> AE21 */
    {
        PIN_PRG1_PRU0_GPO18, PIN_MODE(6) | \
        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
    },
    /* MyMCAN5 -> MCAN5_TX -> AJ21 */
    {
        PIN_PRG1_PRU0_GPO17, PIN_MODE(6) | \
        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
    },
    {PINMUX_END}
};
static pinmuxPerCfg_t gMcan9PinCfg[] =
{
    /* MyMCAN9 -> MCAN9_RX -> AC27 */
    {
        PIN_PRG0_PRU0_GPO8, PIN_MODE(6) | \
        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
    },
    /* MyMCAN9 -> MCAN9_TX -> AC28 */
    {
        PIN_PRG0_PRU0_GPO7, PIN_MODE(6) | \
        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
    },
    {PINMUX_END}
};


Any advice why is the MCAN5 and MCAN9 not working?

Regards,
Tamas

  • 0
    TI__Guru 53296 points

    Hello,

    Ner Fellon said:

    All the three main domain CANs (MCAN0, MCAN5, MCAN9) are initialized and configured the same. However only just the MCAN0 works, the other two main CAN: MCAN5 MCAN9 continuously reports an bus off error:  MCAN_ERR_CODE_BIT0_ERROR. Using the probe Rx and Tx line are always 3.3V. As example we are using the mcan_evm_loopback_app_main_k3.c code. The transcievers are TCAN1046, means that the STB should be pulled down for normal mode. This works, but the CAN_H and CAN_L remains in recessive mode.

    MCAN5 and MCAN9 are same as MCAN0 nothing different.

    It should be the application issue , your pin mux looks correct only but the mcan_evm_loopback_app_main_k3.c  application mentioned is written based on MCAN0 and MCU_CAN0. Can you share me your latest application changes and also core register dump of MCAN5 and MCAN9 ?

    You can also compare the registers of CAN0 and CAN5.,CAN9

    Regards

    Tarun Mukesh

  • 0 in reply to Tarun Mukesh Puvvada
    Intellectual 455 points

    Hy Tarun,

    Thanks for reaching me out, of course here is the initialization part:

     for (uint8_t idx = 0U; idx < CAN_NUM_CONTROLLER; idx++)
    {
        baseAddr = tcht_CAN_obj[idx].BaseAddr;
        gMcanModAddr = baseAddr;

        /* Initialize MCAN Init params */
        initParams.fdMode          = 0x0U;
        initParams.brsEnable       = 0x0U;
        initParams.txpEnable       = 0x1U;
        initParams.efbi            = 0x0U;
        initParams.pxhddisable     = 0x0U;
        /* To enable automatic retransmission of the packet,
         * program initParams.darEnable to "0" */
        initParams.darEnable       = 0x1U;
        initParams.wkupReqEnable   = 0x0U;
        initParams.autoWkupEnable  = 0x0U;
        initParams.emulationEnable = 0x0U;
        initParams.emulationFAck   = 0x0U;
        initParams.clkStopFAck     = 0x0U;
        initParams.wdcPreload      = 0xFFU;
        initParams.tdcEnable       = 0x1U;
        initParams.tdcConfig.tdcf  = 0xAU;
        initParams.tdcConfig.tdco  = 0x6U;

        /* Initialize MCAN Config params */
        configParams.monEnable         = 0x0U;
        configParams.asmEnable         = 0x0U;
        configParams.tsPrescalar       = 0xFU;
        configParams.tsSelect          = 0x0U;
        configParams.timeoutSelect     = MCAN_TIMEOUT_SELECT_CONT;
        configParams.timeoutPreload    = 0xFFFFU;
        configParams.timeoutCntEnable  = 0x0U;
        configParams.filterConfig.rrfs = 0x1U;
        configParams.filterConfig.rrfe = 0x1U;
        configParams.filterConfig.anfe = 0x1U;
        configParams.filterConfig.anfs = 0x0U;

        /* Initialize bit timings
         * Configuring 1Mbps and 5Mbps as nominal and data bit-rate respectively */
        bitTimes.nomRatePrescalar   = 0x7U;
        bitTimes.nomTimeSeg1        = 0x5U;
        bitTimes.nomTimeSeg2        = 0x2U;
        bitTimes.nomSynchJumpWidth  = 0x0U;
        bitTimes.dataRatePrescalar  = 0x1U;
        bitTimes.dataTimeSeg1       = 0x3U;
        bitTimes.dataTimeSeg2       = 0x2U;
        bitTimes.dataSynchJumpWidth = 0x0U;
        
        /* Initialize Tx Buffer Config params */
        stdFiltelem.sfid2 = 0x0U;
        stdFiltelem.sfid1 = 0x4U;
        stdFiltelem.sfec  = 0x7U;
        stdFiltelem.sft   = 0x0U;

        /* Initialize Message RAM Sections Configuration Parameters */
        msgRAMConfigParams.flssa                = MCAN_STD_ID_FILT_START_ADDR;
        msgRAMConfigParams.lss                  = MCAN_STD_ID_FILTER_NUM;
        msgRAMConfigParams.flesa                = MCAN_EXT_ID_FILT_START_ADDR;
        msgRAMConfigParams.lse                  = MCAN_EXT_ID_FILTER_NUM;
        msgRAMConfigParams.txStartAddr          = MCAN_TX_BUFF_START_ADDR;
        msgRAMConfigParams.txBufNum             = MCAN_TX_BUFF_SIZE;
        msgRAMConfigParams.txFIFOSize           = 0U;
        msgRAMConfigParams.txBufMode            = 0U;
        msgRAMConfigParams.txBufElemSize        = MCAN_ELEM_SIZE_64BYTES;
        msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
        msgRAMConfigParams.txEventFIFOSize      = MCAN_TX_BUFF_SIZE;
        msgRAMConfigParams.txEventFIFOWaterMark = 3U;
        msgRAMConfigParams.rxFIFO0startAddr     = MCAN_FIFO_0_START_ADDR;
        msgRAMConfigParams.rxFIFO0size          = MCAN_FIFO_0_NUM;
        msgRAMConfigParams.rxFIFO0waterMark     = 3U;
        msgRAMConfigParams.rxFIFO0OpMode        = 0U; /* Don't block if the fifo is full */
        msgRAMConfigParams.rxFIFO1startAddr     = MCAN_FIFO_1_START_ADDR;
        msgRAMConfigParams.rxFIFO1size          = MCAN_FIFO_1_NUM;
        msgRAMConfigParams.rxFIFO1waterMark     = 3U;
        msgRAMConfigParams.rxFIFO1OpMode        = 0U; /* Don't block if the fifo is full */
        msgRAMConfigParams.rxBufStartAddr       = MCAN_RX_BUFF_START_ADDR;
        msgRAMConfigParams.rxBufElemSize        = MCAN_ELEM_SIZE_64BYTES;
        msgRAMConfigParams.rxFIFO0ElemSize      = MCAN_ELEM_SIZE_64BYTES;
        msgRAMConfigParams.rxFIFO1ElemSize      = MCAN_ELEM_SIZE_64BYTES;

        MCAN_isFDOpEnable(baseAddr);
        /* Reseting the CAN module */
        MCAN_reset(baseAddr);
        while (MCAN_isInReset(baseAddr) == (uint32_t)TRUE)
        {
        }
        /* Set operation mode */
        MCAN_setOpMode(baseAddr, MCAN_OPERATION_MODE_SW_INIT);
        /* Checking CAN module status */
        while(FALSE == MCAN_isMemInitDone(baseAddr))
        {}
        /* Initialize CAN controller */
        configStatus = MCAN_init(baseAddr, &initParams);
        if (configStatus != STW_SOK)
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Initialization failed for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
            return;
        }
        /* Configure the CAN controller */
        configStatus = MCAN_config(baseAddr, &configParams);
        if (configStatus != STW_SOK)
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Configuration failed for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
            return;
        }
        /* Configure the CAN bit timing */
        configStatus = MCAN_setBitTime(baseAddr, &bitTimes);
        if (configStatus != STW_SOK)
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Bit Timing Configuration failed for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
            return;
        }
        /* Configuring the CAN Extended ID mask */
        configStatus = MCAN_setExtIDAndMask(baseAddr, 0x1FFFFFFFU);
        if( configStatus != STW_SOK)
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Extended ID Mask Configuration failed for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
            return;
        }
        /* Configure Message RAM Sections */
        configStatus = MCAN_msgRAMConfig(baseAddr, &msgRAMConfigParams);
        if (configStatus != STW_SOK)
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Message RAM Configuration failed for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
            return;
        }
        /* Configure Standard ID filter element */
        MCAN_addStdMsgIDFilter(baseAddr, 0U, &stdFiltelem);

        MCAN_setOpMode(baseAddr, MCAN_OPERATION_MODE_NORMAL);
        while (MCAN_OPERATION_MODE_NORMAL != MCAN_getOpMode(baseAddr))
        {
            MCAN_setOpMode(baseAddr, MCAN_OPERATION_MODE_NORMAL);
        }

        techtra_uart_write(DEBUG_UART, "DEBUG_INFO(CAN): "
                            "MCAN Message RAM Configuration done\n");

        MCAN_getProtocolStatus(baseAddr, &protStatus);
        if (MCAN_ERR_CODE_NO_ERROR != protStatus.lastErrCode)
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Protocol Status Error for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "Error code: %x\n", protStatus.lastErrCode);
            techtra_uart_write(DEBUG_UART, buffer);
        }
        else
        {
            snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN Protocol Status OK for baseAddr: 0x%08X\n", baseAddr);
            techtra_uart_write(DEBUG_UART, buffer);
        }

        /* Get Revision ID */
        MCAN_ErrCntStatus errCntStatus;
        MCAN_getErrCounters(baseAddr, &errCntStatus);
        snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN transErrLogCnt: 0x%08X\n", errCntStatus.transErrLogCnt);
        techtra_uart_write(DEBUG_UART, buffer);
        snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN rpStatus: 0x%08X\n", errCntStatus.rpStatus);
        techtra_uart_write(DEBUG_UART, buffer);
        snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN recErrCnt: 0x%08X\n", errCntStatus.recErrCnt);
        techtra_uart_write(DEBUG_UART, buffer);

        MCAN_lpbkModeEnable(baseAddr, MCAN_LPBK_MODE_INTERNAL, (uint32_t)TRUE);
    }

    ,where tcht_CAN_obj[idx].BaseAddr contains each CAN controllers address: MCU_CAN0: 0x40500000U, MCAN0: 0x2708000UL, MCAN5: 0x2758000UL, MCAN9: 0x2798000UL

    And here is the CAN message sending (at the moment I only want to send the messages out in polling mode, no receive, no interrupt):

       baseAddr = tcht_CAN_obj[can_idx].BaseAddr;

    /* Enable Interrupts */
    MCAN_enableIntr(baseAddr, MCAN_INTR_MASK_ALL, (uint32_t)TRUE);
    MCAN_enableIntr(baseAddr,
                    MCAN_INTR_SRC_RES_ADDR_ACCESS, (uint32_t)FALSE);

    /* Select Interrupt Line */
    if (baseAddr == tcht_CAN_obj[0].BaseAddr)
    {
        MCAN_selectIntrLine(baseAddr,
                            MCAN_INTR_MASK_ALL,
                            MCAN_INTR_LINE_NUM_0);
        /* Enable Interrupt Line */
        MCAN_enableIntrLine(baseAddr,
                        MCAN_INTR_LINE_NUM_0,
                        1U);
    }
    else if (baseAddr == tcht_CAN_obj[1].BaseAddr)
    {
        MCAN_selectIntrLine(baseAddr,
                            MCAN_INTR_MASK_ALL,
                            MCAN_INTR_LINE_NUM_1);
        /* Enable Interrupt Line */
        MCAN_enableIntrLine(baseAddr,
                        MCAN_INTR_LINE_NUM_1,
                        1U);
    }
    else if (baseAddr == tcht_CAN_obj[2].BaseAddr)
    {
        MCAN_selectIntrLine(baseAddr,
                            MCAN_INTR_MASK_ALL,
                            MCAN_INTR_LINE_NUM_0);
        /* Enable Interrupt Line */
        MCAN_enableIntrLine(baseAddr,
                        MCAN_INTR_LINE_NUM_0,
                        1U);
    }
    else if (baseAddr == tcht_CAN_obj[3].BaseAddr)
    {
        MCAN_selectIntrLine(baseAddr,
                            MCAN_INTR_MASK_ALL,
                            MCAN_INTR_LINE_NUM_1);
        /* Enable Interrupt Line */
        MCAN_enableIntrLine(baseAddr,
                        MCAN_INTR_LINE_NUM_1,
                        1U);
    }

    /* Enable Transmission interrupt */
    testStatus = MCAN_txBufTransIntrEnable(baseAddr,
                                           1U,
                                           (uint32_t)TRUE);

    MCAN_getErrCounters(baseAddr, &errCntStatus);
    if (0U != errCntStatus.recErrCnt)
    {
        snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN receive error count: 0x%08X\n", errCntStatus.recErrCnt);
        uart_write(DEBUG_UART, buffer);
        snprintf(buffer, sizeof(buffer), "DEBUG_INFO(CAN): "
                                "MCAN can Err Log cnt: 0x%08X\n", errCntStatus.canErrLogCnt);
        uart_write(DEBUG_UART, buffer);
    }

    MCAN_initTxBufElement(&txMsg);

    memcpy(txMsg.data, p_msg, sizeof(txMsg.data));

    /* Enter critical area */
    CanSchM_IntKey = HwiP_disable();

    /* Write message to Msg RAM */
    MCAN_writeMsgRam(baseAddr, MCAN_MEM_TYPE_BUF, 1U, &txMsg);
    /* Add request for transmission */
    testStatus = MCAN_txBufAddReq(baseAddr, 1U);

    /* Exit critical area */
    HwiP_restore(CanSchM_IntKey);

    if (CSL_PASS != testStatus)
    {
        uart_write(DEBUG_UART, "\nError in Adding Transmission Request...\n");
        //return;
    }
    MCAN_getProtocolStatus(baseAddr, &protStatus);
    /* Checking for Errors */
    if (((MCAN_ERR_CODE_NO_ERROR == protStatus.lastErrCode) ||
            (MCAN_ERR_CODE_NO_CHANGE == protStatus.lastErrCode)) &&
        ((MCAN_ERR_CODE_NO_ERROR == protStatus.dlec) ||
            (MCAN_ERR_CODE_NO_CHANGE == protStatus.dlec)) &&
        (0U == protStatus.pxe))
    {
        snprintf(buffer, sizeof(buffer),
            "Message successfully transferred with payload Bytes:%d\n",
            canDataSize[txMsg.dlc]);
        uart_write(DEBUG_UART, buffer);
    }
    else
    {
        snprintf(buffer, sizeof(buffer),
        "DEBUG_ERROR(CAN): " "Bus status %d\n", protStatus.busOffStatus);
        uart_write(DEBUG_UART, buffer);

        snprintf(buffer, sizeof(buffer),
        "DEBUG_ERROR(CAN): " "Error code: %x\n", protStatus.lastErrCode);
        uart_write(DEBUG_UART, buffer);
        
        snprintf(buffer, sizeof(buffer),
        "DEBUG_ERROR(CAN): " "Activity state: %x\n", protStatus.act);
        uart_write(DEBUG_UART, buffer);

        snprintf(buffer, sizeof(buffer),
        "DEBUG_ERROR(CAN): " "Bus off status: %x\n", protStatus.busOffStatus);
        uart_write(DEBUG_UART, buffer);

        snprintf(buffer, sizeof(buffer),
        "Error in transmission for address :0x%08X\n", baseAddr);
        uart_write(DEBUG_UART, buffer);
        testStatus = CSL_EFAIL;

        /* Restart the CAN */
        if (protStatus.lastErrCode == MCAN_ERR_CODE_BIT0_ERROR)
        {
            uart_write(DEBUG_UART, "DEBUG_INFO(CAN): " "MCAN reset!\n");
            MCAN_setOpMode(baseAddr, MCAN_OPERATION_MODE_SW_INIT);
            MCAN_setOpMode(baseAddr, MCAN_OPERATION_MODE_NORMAL);
        }
    }


    Which register do I need to look after?

    Tarun Mukesh Puvvada said:
    You can also compare the registers of CAN0 and CAN5.,CAN9

    I am comparing these three. The MCAN0 is working only problem that set is that the data that sends out doesn't receive ACk, but that's normal because there is nothing connected to the pins. (but the is sent out)

    Regards,
    Tamas

  • 0 in reply to Ner Fellon
    Intellectual 455 points

    Some updates!

    The first CAN message is transmitted successfully without any issues. However, after that, I consistently encounter the lastErrorCode: (5) Bus_Off state.

    I've restarted the board multiple times, and in some instances, the first and third messages were transmitted successfully before entering Bus_Off.

    I also experimented with adding delays between transmissions, but that had no effect. Additionally, I attempted to reset or reinitialize the MCAN module after each transmission, but that approach did not resolve the problem either.

    Any advice?
    Regards,
    Tamas

  • +1 in reply to Ner Fellon
    TI__Guru 53296 points

    Hello Tamas,

    Thanks for latest updates. This clears majority of things for me ,If your first message is received successfully then all your configuration, pin mux,initilization, etc... All are good .

    Ner Fellon said:
    I also experimented with adding delays between transmissions, but that had no effect. Additionally, I attempted to reset or reinitialize the MCAN module after each transmission, but that approach did not resolve the problem either.

    This will not solve the problem. I strongly suspect there is no issue in software but in Hardware. It can be due to re use of GPIO0 pins going to CAN transceiver by some one else or wiring issues. SInce the MCAN5 and MCAN9 being on same CAN transceiver and not working similarly  is strong suspect on HW issues.

     If you get CAN bus off , in the example application there is no CAN bus recovery mechanism. So you have to identify why CAN bus off is occurring .

    The error code 5 indicates that a CAN node has entered a Bus Off state, meaning it has disconnected from the CAN bus and can no longer transmit or receive data. This state is triggered when a CAN node's transmit error counter exceeds 255.
     A CAN node in the Bus Off state is essentially disabled and can not  participate in network communication. When a CAN node experiences too many errors during transmission, its transmit error counter increases.
     If this counter reaches 256 or more, the node enters the "Bus Off" state. Once a node is in the Bus Off state, it cannot send or receive any CAN messages, and it will not generate error flags.
     To restore communication, the CAN node typically needs to be reset. This can be done through a hardware reset (power cycling) or by software you have to run the sequence of commands.
    To fix this you can checking the wiring, ensuring proper termination, inspecting sensors, and verifying the CAN transceiver.
    Regards
    Tarun Mukesh
  • 0 in reply to Tarun Mukesh Puvvada
    Intellectual 455 points

    Oh, that explains some errors! Thanks. 
    In meantime I want to use an external loopback between the MCAN5 and MCAN9 to test the communication. I have followed this link: [FAQ] TDA4VM: Routing interrupts via the interrupt router but I am not really sure how to set up the ISR to receive the interrupt from MCAN5 and MCAN9. 
    I have inserted the following functions but I am not sure how to connect the input and the source:

    static int32_t MCUCAN_regiterISR(uint32_t intNum, void f(uintptr_t))
{
   int32_t configStatus = STW_SOK;
    OsalRegisterIntrParams_t    intrPrms;
    OsalInterruptRetCode_e      osalRetVal;
    HwiP_Handle                 hwiHandle = NULL;

    /* Enable CPU Interrupts and register ISR */
    Osal_RegisterInterrupt_initParams(&intrPrms);
    /* Populate the interrupt parameters */
    intrPrms.corepacConfig.arg              = (uintptr_t) NULL;
    intrPrms.corepacConfig.isrRoutine       = f;
    intrPrms.corepacConfig.priority         = 1U;
    intrPrms.corepacConfig.corepacEventNum  = 0U;
    intrPrms.corepacConfig.intVecNum        = intNum;

    /* Register interrupts */
    osalRetVal = Osal_RegisterInterrupt(&intrPrms, &hwiHandle);
    if(OSAL_INT_SUCCESS != osalRetVal)
    {
        configStatus = CSL_EFAIL;
        techtra_uart_write(DEBUG_UART, "Error in registering ISR!!!");
    }
    return configStatus;
}

static int32_t MCAN_CfgIrqRouterMain2Mcu(uint32_t devId, uint32_t offset, uint32_t dest_id, uint32_t intNum)
{
    int32_t retVal;
    struct tisci_msg_rm_irq_set_req     rmIrqReq;
    struct tisci_msg_rm_irq_set_resp    rmIrqResp;

    rmIrqReq.valid_params           = TISCI_MSG_VALUE_RM_DST_ID_VALID;
    rmIrqReq.valid_params          |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
    rmIrqReq.src_id                 = devId;
    rmIrqReq.global_event           = 0U;
    rmIrqReq.src_index              = offset;
    rmIrqReq.dst_id                 = TISCI_DEV_MCU_R5FSS0_CORE0;
    rmIrqReq.dst_host_irq           = intNum;
    rmIrqReq.ia_id                  = 0U;
    rmIrqReq.vint                   = 0U;
    rmIrqReq.vint_status_bit_index  = 0U;
    rmIrqReq.secondary_host         = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
    retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, 0x10000);//SCICLIENT_SERVICE_WAIT_FOREVER);
    if(CSL_PASS != retVal)
    {
        uart_write(DEBUG_UART, "Error in SciClient Interrupt Params Configuration!!!");
        snprintf(buffer, sizeof(buffer), "offset: %d \n", offset);
        uart_write(DEBUG_UART, buffer);
    }
    else
    {
        snprintf(buffer, sizeof(buffer), 
                "SciClient Interrupt Params Configuration passed for intNum: %08X \n", intNum);
        uart_write(DEBUG_UART, buffer);
    }
    return retVal;
}

    What has to be these parameteres: rmIrqReq.src_id, rmIrqReq.src_index, rmIrqReq.dst_host_irq?

    Am I right that the rmIrqReq.dst_id = TISCI_DEV_MCU_R5FSS0_CORE0 ?


    Regards,
    Tamas

  • 0 in reply to Ner Fellon
    TI__Guru 53296 points

    Hello Tamas,

    Let us keep this thread on transmission issues.

    Ner Fellon said:
    In meantime I want to use an external loopback between the MCAN5 and MCAN9 to test the communication. I have followed this link: [FAQ] TDA4VM: Routing interrupts via the interrupt router but I am not really sure how to set up the ISR to receive the interrupt from MCAN5 and MCAN9. 
    I have inserted the following functions but I am not sure how to connect the input and the source:

    I request to raise another thread on external loop back and interrupt routing since the description of thread "Bus off" deviates .

    Thanks for understanding.

    Regards

    Tarun Mukesh

  • 0 in reply to Ner Fellon
    Intellectual 455 points

    Sorry, but the error is still persisting. I have printed out the interrupt register (MCAN_IR):

    0xb800000 = 1011 1000 0000 0000 0000 0000 0000
    This bits are: Bit 24 - EW - Error Warning status
                          Bit 25 - BO - Bus_off Status
                          Bit 26 - WDI - Watchdog Interrupt
                          Bit 28 - PED - Protocol Error in Data Phase

    Which other register should I read? 

    Regards,
    Tamas

  • 0 in reply to Ner Fellon
    TI__Guru 53296 points

    Hello,

    Ner Fellon said:
    Sorry, but the error is still persisting. I have printed out the interrupt register (MCAN_IR):

    what error is still persisting ? I am not sure of why it works some times fine and it is becoming very inconclusive to even suggest solution.

    After system entered bus off , there won't be active errors in register listed so before bus off what error are you facing?

    Regards

    Tarun Mukesh

  • 0 in reply to Tarun Mukesh Puvvada
    Intellectual 455 points

    Hy Tarun,

    Let's sum up. I am configuring the MCAN5 and MCAN9 in the same way with the following parameters:

            /* Initialize MCAN Init params */
        initParams.fdMode          = 0x0U;
        initParams.brsEnable       = 0x0U;
        initParams.txpEnable       = 0x1U;
        initParams.efbi            = 0x0U;
        initParams.pxhddisable     = 0x0U;
        /* To enable automatic retransmission of the packet,
         * program initParams.darEnable to "0" */
        initParams.darEnable       = 0x0U;
        initParams.wkupReqEnable   = 0x0U;
        initParams.autoWkupEnable  = 0x0U;
        initParams.emulationEnable = 0x0U;
        initParams.emulationFAck   = 0x0U;
        initParams.clkStopFAck     = 0x0U;
        initParams.wdcPreload      = 0xFFU;
        initParams.tdcEnable       = 0x1U;
        initParams.tdcConfig.tdcf  = 0xAU;
        initParams.tdcConfig.tdco  = 0x6U;

        /* Initialize MCAN Config params */
        configParams.monEnable         = 0x0U;
        configParams.asmEnable         = 0x0U;
        configParams.tsPrescalar       = 0xFU;
        configParams.tsSelect          = 0x0U;
        configParams.timeoutSelect     = MCAN_TIMEOUT_SELECT_CONT;
        configParams.timeoutPreload    = 0xFFFFU;
        configParams.timeoutCntEnable  = 0x0U;
        configParams.filterConfig.rrfs = 0x1U;
        configParams.filterConfig.rrfe = 0x1U;
        configParams.filterConfig.anfe = 0x1U;
        configParams.filterConfig.anfs = 0x0U;

        /* Initialize bit timings
         * Configuring 1Mbps and 5Mbps as nominal and data bit-rate respectively */
        bitTimes.nomRatePrescalar   = 0x7U;
        bitTimes.nomTimeSeg1        = 0x5U;
        bitTimes.nomTimeSeg2        = 0x2U;
        bitTimes.nomSynchJumpWidth  = 0x0U;
        bitTimes.dataRatePrescalar  = 0x1U;
        bitTimes.dataTimeSeg1       = 0x3U;
        bitTimes.dataTimeSeg2       = 0x2U;
        bitTimes.dataSynchJumpWidth = 0x0U;
        
        /* Initialize Tx Buffer Config params */
        stdFiltelem.sfid2 = 0x0U;
        stdFiltelem.sfid1 = 0x4U;
        stdFiltelem.sfec  = 0x7U;
        stdFiltelem.sft   = 0x0U;

        /* Initialize Message RAM Sections Configuration Parameters */
        msgRAMConfigParams.flssa                = MCAN_STD_ID_FILT_START_ADDR;
        msgRAMConfigParams.lss                  = MCAN_STD_ID_FILTER_NUM;
        msgRAMConfigParams.flesa                = MCAN_EXT_ID_FILT_START_ADDR;
        msgRAMConfigParams.lse                  = MCAN_EXT_ID_FILTER_NUM;
        msgRAMConfigParams.txStartAddr          = MCAN_TX_BUFF_START_ADDR;
        msgRAMConfigParams.txBufNum             = MCAN_TX_BUFF_SIZE;
        msgRAMConfigParams.txFIFOSize           = 0U;
        msgRAMConfigParams.txBufMode            = 0U;
        msgRAMConfigParams.txBufElemSize        = MCAN_ELEM_SIZE_64BYTES;
        msgRAMConfigParams.txEventFIFOStartAddr = MCAN_TX_EVENT_START_ADDR;
        msgRAMConfigParams.txEventFIFOSize      = MCAN_TX_BUFF_SIZE;
        msgRAMConfigParams.txEventFIFOWaterMark = 3U;
        msgRAMConfigParams.rxFIFO0startAddr     = MCAN_FIFO_0_START_ADDR;
        msgRAMConfigParams.rxFIFO0size          = MCAN_FIFO_0_NUM;
        msgRAMConfigParams.rxFIFO0waterMark     = 3U;
        msgRAMConfigParams.rxFIFO0OpMode        = 0U; /* Don't block if the fifo is full */
        msgRAMConfigParams.rxFIFO1startAddr     = MCAN_FIFO_1_START_ADDR;
        msgRAMConfigParams.rxFIFO1size          = MCAN_FIFO_1_NUM;
        msgRAMConfigParams.rxFIFO1waterMark     = 3U;
        msgRAMConfigParams.rxFIFO1OpMode        = 0U; /* Don't block if the fifo is full */
        msgRAMConfigParams.rxBufStartAddr       = MCAN_RX_BUFF_START_ADDR;
        msgRAMConfigParams.rxBufElemSize        = MCAN_ELEM_SIZE_64BYTES;
        msgRAMConfigParams.rxFIFO0ElemSize      = MCAN_ELEM_SIZE_64BYTES;
        msgRAMConfigParams.rxFIFO1ElemSize      = MCAN_ELEM_SIZE_64BYTES;

    These parameters have been configured based on the mcan_evm_loopback_app_main_k3.c file and the corresponding documentation.

    After setting the parameters, I execute the following sequence of commands: MCAN_reset(), MCAN_setOpMode(), MCAN_config(), MCAN_setBitTime(), MCAN_setExtIDAndMask(), MCAN_msgRAMConfig(), MCAN_addStdMsgIDFilter(), and finally MCAN_setOpMode() again.

    After this sequence, I check the protocol status flags, and observe that the LEC (Last Error Code) register contains the value 7, which corresponds to MCAN_ERR_CODE_NO_CHANGE.
    Should this error rise here? 

    My question are:

    1. If I would like to use the MCAN in polling mode do I need to set up the IRQ for each CAN module?
    2. Using in polling mode the MCAN if there is nothing connected to each CAN (so nobody send back Ack for messages) sending multiple messages can cause Bus_off state? 

    Regards,
    Tamas 

  • +1 in reply to Ner Fellon
    TI__Guru 53296 points

    Hello,

    Ner Fellon said:
    After this sequence, I check the protocol status flags, and observe that the LEC (Last Error Code) register contains the value 7, which corresponds to MCAN_ERR_CODE_NO_CHANGE.
    Should this error rise here? 

    First of all this is not an error , this is default setting.

    In MCAN PSR register , MCAN_PSR[2-0] LEC field indicates the type of the last error to occur on the CAN bus. This field will be cleared to 0h when a message has been transferred (reception or transmission) without error.

    7h = NoChange: Any read access to the Protocol Status Register re-initializes the MCAN_PSR[2-0] LEC field to 7h. When the MCAN_PSR[2-0] LEC field shows the value 7h, no CAN bus event was detected since the last Host CPU read access to the Protocol Status Register.

    Ner Fellon said:
    1. If I would like to use the MCAN in polling mode do I need to set up the IRQ for each CAN module?

    No ,not needed.

    Ner Fellon said:
    Using in polling mode the MCAN if there is nothing connected to each CAN (so nobody send back Ack for messages) sending multiple messages can cause Bus_off state? 

    Yes Ack error will come and eventually leads to bus off.

    Regards

    Tarun Mukesh

  • 0 in reply to Tarun Mukesh Puvvada
    Intellectual 455 points

    Thanks, for help! 

    Regards,
    Tamas