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AM62P: DDR Configuration for AM64x, AM625, AM623, AM62Ax, AM62Px, AM62Dx, AM62Lx

Michael Frey
Prodigy 50 points
Part Number: AM62P

Tool/software:

https://dev.ti.com/sysconfig/#/config/?args=--product%20%2Fmnt%2Ftirex-content%2FProcessor_DDR_Config_0.10.32.0000%2F.metadata%2Fproduct.json%20--device%20AM62Px

When I open this tool, the Reference Design "none" is selected.

Unfolding "Bit Swizzle / Byte Swap for Bytes 2/3", I see that "Processor DM3 ->" is mapped to "Memory DQ24". I am puzzled as seemingly two Processor Pins(?) are mapped to the same Memory Pin(?).

I would except DM3 to be mapped to DM3. Is there are specific reason why my expectation is incorrect?

  • 0
    TI__Guru* 86160 points

    Hi Michael, that is a bug in the tool.  Will get that fixed in the next release.  Thanks for pointing that out.

    The AM62P EVM (SK-AM62P-LP) actually has some of those signals swapped, so if you choose the EVM in the  Reference Design dropdown, you will see those bit swizzles represented.

    Regards,

    James