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AM62A3: DDR Configuration for LPDDR4 (MT53E256M32D1KS-046 WT:L) on Custom AM62A Board – Boot Stuck at U-Boot SPL

Part Number: AM62A3
Other Parts Discussed in Thread: SYSCONFIG, SK-AM62A-LP

Tool/software:

Hi,

We are using the AM62A32AOMHIAMBR SoM on our custom board and attempting to boot from an SD card in legacy mode (3.3V).

We’ve made the necessary sdhci1 device tree changes to support 1.8V operation in both U-Boot and the Linux kernel. Our SD card slot does not have a card detect (CD) pin, so we have pulled the CD pin low. Additionally, we’ve added a 10kΩ pull-down resistor on the CLK line as recommended.

For memory, our custom board uses LPDDR4 (part number: MT53E256M32D1KS-046 WT:L), which differs from the memory used on the TI EVK. I had previously raised a query regarding the boot issue and hardware verification, and it was suggested that I raise a separate request specifically for DDR configuration, as the issue may be related to the different DDR part.

When attempting to boot from the SD card, the system stops after the following output from the ROM:


U-Boot SPL 2023.04-gb0d717b732 (Dec 06 2023 - 15:11:45 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)')
am62a_init: board_init_f done
SPL initial stack usage: 17040 bytes


This indicates that the ROM code is executing correctly, but the boot process does not proceed beyond SPL, which suggests a potential issue with DDR initialization, possibly due to the custom LPDDR4 configuration.

Below is the SD-card device tree changes we have made in both u-boot and kernel device tree files (k3-am62a7-sk.dts)

&sdhci1 {
	/* SD/MMC */
	status = "okay";
	vmmc-supply = <&vdd_mmc1>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;	
    	/delete-property/ ti,otap-del-sel-sdr12;
	/delete-property/ ti,otap-del-sel-sdr25;
	/delete-property/ ti,otap-del-sel-sdr50;
	/delete-property/ ti,otap-del-sel-ddr50;
	/delete-property/ ti,otap-del-sel-sdr104;
	no-1-8-v;
	bootph-all;
};


We would like guidance on how to properly configure the DDR settings for the MT53E256M32D1KS-046 WT:L on the AM62A SoC.

Best Regards,
Adnan