AM5728: Keypad driver probe failing on TI am5728 9.03 SDK running on custom board

Other Parts Discussed in Thread: AM5728

hi,

I have a custom board based on am5728 SOC running TI linux SDK 9.03 and I am trying to port the keypad driver. This is the dts entry that i have added in arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi

  keypad: keypad@4ae1c000 {
    compatible = "ti,omap4-keypad";
    reg = <0x4ae1c000 0x80>;  // Correct 4-cell format
    interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
    keypad,num-rows = <4>;
    keypad,num-columns = <4>;
    linux,input-no-autorepeat;
    linux,keymap = <
        0x00000041 0x00010042 0x00020043 0x00030044
        0x01000045 0x01010046 0x01020047 0x01030048
        0x02000049 0x0201004a 0x0202004b 0x0203004c
        0x0300004d 0x0301004e 0x0302004f 0x03030050
    >;
    status = "okay";
};

I have set CONFIG_KEYBOARD_OMAP4=y in .config file and put prints in each function of

/opt/ti-processor-sdk-linux-am57xx-evm-09_03_06_05/board-support/ti-linux-kernel-6.1.119+gitAUTOINC+e4e8b16e66-ti/drivers/input/keyboard/omap4-keypad.c

Upon booting the board after compilation I am getting the following error in dmesg logs


root@am57xx-evm:~# dmesg | grep omap4
[    0.325897] VM********************* File: drivers/input/keyboard/omap4-keypad.c, Line: 358, Function: omap4_keypad_probe ****************************
[    0.325927] omap4-keypad 4ae1c00000000080.keypad: no base address specified
[    0.325927] omap4-keypad: probe of 4ae1c00000000080.keypad failed with error -22

 

I haven't done the changes as mentioned in the post (at the end ) by Thomas McManus as I was not facing the error he was facing. 

is the DTS entry not ok?
As i can see that in 9.03 SDK the file arch/arm/boot/dts/dra7-l4.dtsi contains the following 

target-module@c000 { /* 0x4ae1c000, ap 11 38.0 */
compatible = "ti,sysc";
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xc000 0x1000>;
};


So do I need to add keypad entry under this node in arch/arm/boot/dts/dra7-l4.dtsi  for the address 0x4ae1c000 ?

Please help me resolve this issue !

  • Hello Vishal,

    Unfortunately we do not have a Keypad reference to help you out with on our side.  I am assuming you have a working version on the older kernel and this DTS entry was working?

    Can you confirm?

    Have you made sure you have all the dependencies taken care of in Config file?

    For example, the keyboard matrix has the following dependency:

    source: https://cateee.net/lkddb/web-lkddb/KEYBOARD_MATRIX.html

    -Josue

  • Unfortunately we do not have a Keypad reference to help you out with on our side.  I am assuming you have a working version on the older kernel and this DTS entry was working?

    Can you confirm?

    Yes, it is working fine on 6.03 SDK .


    Have you made sure you have all the dependencies taken care of in Config file?

    yes both CONFIG_GPIOLIB and CONFIG_COMPILE_TEST are set to "y" but the probe is failing. 

  • Hello Vishal,

    Has there been any changes in the the driver?

    Are you by any chance making any pinmuxing for this device via the DTS?

    -Josue

  • Has there been any changes in the the driver?

    I have modified the driver as mentioned at the end in the post 
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/634114/linux-am5728-keypad-driver-not-working?tisearch=e2e-sitesearch&keymatch=am5728%252525252520keypad%252525252520devashish%252525252520tiwari#

    Are you by any chance making any pinmuxing for this device via the DTS?

    Pimux changes are made in u-boot source code as mentiomed in the post below:-
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1542924/am5728-lm75-sensor-i2c1-timeout-after-sdk-9-03-upgrade-on-am5728-custom-board

    SImilary pinmux changes are added in kernel source code in the file arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi (see contents below):-

    /*
     * MMC IOdelay values for TI's DRA74x, DRA75x and AM572x SoCs.
     *
     * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or
     * modify it under the terms of the GNU General Public License as
     * published by the Free Software Foundation version 2.
     *
     * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     * kind, whether express or implied; without even the implied warranty
     * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     * GNU General Public License for more details.
     */
    
    /*
     * Rules for modifying this file:
     * a) Update of this file should typically correspond to a datamanual revision.
     *    Datamanual revision that was used should be updated in comment below.
     *    If there is no update to datamanual, do not update the values. If you
     *    need to use values different from that recommended by the datamanual
     *    for your design, then you should consider adding values to the device-
     *    -tree file for your board directly.
     * b) We keep the mode names as close to the datamanual as possible. So
     *    if the manual calls a mode, DDR50, or DDR or DDR 1.8v or DDR 3.3v,
     *    we follow that in code too.
     * c) If the values change between multiple revisions of silicon, we add
     *    a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
     *    'rev20' for PG 2.0 and so on.
     * d) The node name and node label should be the exact same string. This is
     *    to curb naming creativity and achieve consistency.
     *
     * Datamanual Revisions:
     *
     * AM572x Silicon Revision 2.0: SPRS953F, Revised May 2019
     * AM572x Silicon Revision 1.1: SPRS915R, Revised November 2016
     *
     */
    
    &dra7_pmx_core {
    	mmc1_pins_default: mmc1_pins_default {
    		pinctrl-single,pins = <
                DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
    			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
    			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
    			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
    			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
    			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
    			DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_sdcd.mmc1_sdcd */
    		>;
    	};
    
    	mmc1_pins_sdr12: mmc1_pins_sdr12 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
                DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
                DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
                DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
                DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
                DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
                DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT_PULLUP | MUX_MODE0) 	/* mmc1_sdcd.mmc1_sdcd */
    		>;
    	};
    
    	mmc1_pins_hs: mmc1_pins_hs {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
                DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
                DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
                DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
                DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
                DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
    		>;
    	};
    
    	mmc1_pins_sdr25: mmc1_pins_sdr25 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
                DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
                DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
                DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
                DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
                DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
    >;
    	};
    
    	mmc1_pins_sdr50: mmc1_pins_sdr50 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
                DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
                DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
                DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
                DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
                DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
    		>;
    	};
    
    	mmc1_pins_ddr50: mmc1_pins_ddr50 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
                DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
                DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
                DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
                DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
                DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
    		>;
    	};
    
    	mmc1_pins_sdr104: mmc1_pins_sdr104 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_clk.mmc1_clk */
                DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_cmd.mmc1_cmd */
                DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat0.mmc1_dat0 */
                DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat1.mmc1_dat1 */
                DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat2.mmc1_dat2 */
                DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) 	/* mmc1_dat3.mmc1_dat3 */
    		>;
    	};
    
    	mmc2_pins_default: mmc2_pins_default {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a23.mmc2_clk */
                DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_cs1.mmc2_cmd */
                DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a24.mmc2_dat0 */
                DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a25.mmc2_dat1 */
                DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a26.mmc2_dat2 */
                DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a27.mmc2_dat3 */
                DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a19.mmc2_dat4 */
                DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a20.mmc2_dat5 */
                DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a21.mmc2_dat6 */
                DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
    	mmc2_pins_hs: mmc2_pins_hs {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a23.mmc2_clk */
                DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_cs1.mmc2_cmd */
                DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a24.mmc2_dat0 */
                DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a25.mmc2_dat1 */
                DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a26.mmc2_dat2 */
                DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a27.mmc2_dat3 */
                DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a19.mmc2_dat4 */
                DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a20.mmc2_dat5 */
                DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a21.mmc2_dat6 */
                DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
    	mmc2_pins_ddr_3_3v_rev11: mmc2_pins_ddr_3_3v_rev11 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
    			DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
    			DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
    			DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
    			DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
    			DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
    			DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
    			DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
    			DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
    			DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
    	mmc2_pins_ddr_1_8v_rev11: mmc2_pins_ddr_1_8v_rev11 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
    			DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
    			DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
    			DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
    			DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
    			DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
    			DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
    			DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
    			DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
    			DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
    	mmc2_pins_ddr_rev20: mmc2_pins_ddr_rev20 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a23.mmc2_clk */
                DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_cs1.mmc2_cmd */
                DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a24.mmc2_dat0 */
                DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a25.mmc2_dat1 */
                DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a26.mmc2_dat2 */
                DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a27.mmc2_dat3 */
                DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a19.mmc2_dat4 */
                DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a20.mmc2_dat5 */
                DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a21.mmc2_dat6 */
                DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) 	/* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
    	mmc2_pins_hs200: mmc2_pins_hs200 {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a23.mmc2_clk */
                DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_cs1.mmc2_cmd */
                DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a24.mmc2_dat0 */
                DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a25.mmc2_dat1 */
                DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a26.mmc2_dat2 */
                DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a27.mmc2_dat3 */
                DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a19.mmc2_dat4 */
                DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a20.mmc2_dat5 */
                DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a21.mmc2_dat6 */
                DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) 	/* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
    	mmc3_pins_default: mmc3_pins_default {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
        			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
        			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
        			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
        			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
        			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
        		>;
        	};
    
        	mmc3_pins_hs: mmc3_pins_hs {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
        			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
        			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
        			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
        			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
        			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
        		>;
        	};
    
        	mmc3_pins_sdr12: mmc3_pins_sdr12 {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
        			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
        			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
        			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
        			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
        			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
        		>;
        	};
    
        	mmc3_pins_sdr25: mmc3_pins_sdr25 {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
        			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
        			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
        			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
        			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
        			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
        		>;
        	};
    
        	mmc3_pins_sdr50: mmc3_pins_sdr50 {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
        			DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
        			DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
        			DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
        			DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
        			DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
        		>;
        	};
    
    	mmc4_pins_default: mmc4_pins_default {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
        			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
        			DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
        			DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
        			DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
        			DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
        		>;
        	};
    
        mmc4_pins_hs: mmc4_pins_hs {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
        			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
        			DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
        			DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
        			DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
        			DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
        		>;
        	};
    
        mmc4_pins_sdr12: mmc4_pins_sdr12 {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
        			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
        			DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
        			DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
        			DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
        			DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
        		>;
        	};
    
        mmc4_pins_sdr25: mmc4_pins_sdr25 {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
        			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
        			DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
        			DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
        			DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
        			DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
        		>;
        	};
    
    
    
        spi1_pins_default: spi1_pins_default {
        		pinctrl-single,pins = <
        			DRA7XX_CORE_IOPAD(0x37a4, PIN_INPUT | MUX_MODE0) /* A25 spi1_sclk.spi1_sclk */
        			DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE0) /* B25 spi1_d0.spi1_d0 */
        			DRA7XX_CORE_IOPAD(0x37a8, PIN_INPUT | MUX_MODE0) /*  F16 spi1_d1.spi1_d1 */
        			DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE0) /* A24 spi1_cs0.spi1_cs0 */
        		>;
        	};
    
    };
    
    &dra7_iodelay_core {
    
    	/* Corresponds to MMC1_DDR_MANUAL1 in datamanual */
    	mmc1_iodelay_ddr_rev11_conf: mmc1_iodelay_ddr_rev11_conf {
    		pinctrl-pin-array = <
    			0x618 A_DELAY_PS(572) G_DELAY_PS(540)	/* CFG_MMC1_CLK_IN */
    			0x620 A_DELAY_PS(1525) G_DELAY_PS(0)	/* CFG_MMC1_CLK_OUT */
    			0x624 A_DELAY_PS(0) G_DELAY_PS(600)	/* CFG_MMC1_CMD_IN */
    			0x628 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OEN */
    			0x62c A_DELAY_PS(55) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OUT */
    			0x630 A_DELAY_PS(403) G_DELAY_PS(120)	/* CFG_MMC1_DAT0_IN */
    			0x634 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OEN */
    			0x638 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OUT */
    			0x63c A_DELAY_PS(23) G_DELAY_PS(60)	/* CFG_MMC1_DAT1_IN */
    			0x640 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OEN */
    			0x644 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OUT */
    			0x648 A_DELAY_PS(25) G_DELAY_PS(60)	/* CFG_MMC1_DAT2_IN */
    			0x64c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OEN */
    			0x650 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OUT */
    			0x654 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_IN */
    			0x658 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OEN */
    			0x65c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC1_DDR_MANUAL1 in datamanual */
    	mmc1_iodelay_ddr_rev20_conf: mmc1_iodelay_ddr50_rev20_conf {
    		pinctrl-pin-array = <
                0x618 A_DELAY_PS(1076) G_DELAY_PS(330) 	/* CFG_MMC1_CLK_IN */
                0x620 A_DELAY_PS(1271) G_DELAY_PS(0) 	/* CFG_MMC1_CLK_OUT */
                0x624 A_DELAY_PS(722) G_DELAY_PS(0) 	/* CFG_MMC1_CMD_IN */
                0x628 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_CMD_OEN */
                0x62C A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_CMD_OUT */
                0x630 A_DELAY_PS(751) G_DELAY_PS(0) 	/* CFG_MMC1_DAT0_IN */
                0x634 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT0_OEN */
                0x638 A_DELAY_PS(20) G_DELAY_PS(0) 	/* CFG_MMC1_DAT0_OUT */
                0x63C A_DELAY_PS(256) G_DELAY_PS(0) 	/* CFG_MMC1_DAT1_IN */
                0x640 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT1_OEN */
                0x644 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT1_OUT */
                0x648 A_DELAY_PS(263) G_DELAY_PS(0) 	/* CFG_MMC1_DAT2_IN */
                0x64C A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT2_OEN */
                0x650 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT2_OUT */
                0x654 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT3_IN */
                0x658 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT3_OEN */
                0x65C A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT3_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC1_SDR104_MANUAL1 in datamanual */
    	mmc1_iodelay_sdr104_rev11_conf: mmc1_iodelay_sdr104_rev11_conf {
    		pinctrl-pin-array = <
    			0x620 A_DELAY_PS(1063) G_DELAY_PS(17)	/* CFG_MMC1_CLK_OUT */
    			0x628 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OEN */
    			0x62c A_DELAY_PS(23) G_DELAY_PS(0)	/* CFG_MMC1_CMD_OUT */
    			0x634 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OEN */
    			0x638 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT0_OUT */
    			0x640 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OEN */
    			0x644 A_DELAY_PS(2) G_DELAY_PS(0)	/* CFG_MMC1_DAT1_OUT */
    			0x64c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OEN */
    			0x650 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT2_OUT */
    			0x658 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OEN */
    			0x65c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC1_DAT3_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC1_SDR104_MANUAL1 in datamanual */
    	mmc1_iodelay_sdr104_rev20_conf: mmc1_iodelay_sdr104_rev20_conf {
    		pinctrl-pin-array = <
    			0x620 A_DELAY_PS(600) G_DELAY_PS(400) 	/* CFG_MMC1_CLK_OUT */
                0x628 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_CMD_OEN */
                0x62C A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_CMD_OUT */
                0x634 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT0_OEN */
                0x638 A_DELAY_PS(30) G_DELAY_PS(0) 	/* CFG_MMC1_DAT0_OUT */
                0x640 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT1_OEN */
                0x644 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT1_OUT */
                0x64C A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT2_OEN */
                0x650 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT2_OUT */
                0x658 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT3_OEN */
                0x65C A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_MMC1_DAT3_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
    	mmc2_iodelay_hs200_rev11_conf: mmc2_iodelay_hs200_rev11_conf {
    		pinctrl-pin-array = <
    			0x190 A_DELAY_PS(621) G_DELAY_PS(600)	/* CFG_GPMC_A19_OEN */
    			0x194 A_DELAY_PS(300) G_DELAY_PS(0)	/* CFG_GPMC_A19_OUT */
    			0x1a8 A_DELAY_PS(739) G_DELAY_PS(600)	/* CFG_GPMC_A20_OEN */
    			0x1ac A_DELAY_PS(240) G_DELAY_PS(0)	/* CFG_GPMC_A20_OUT */
    			0x1b4 A_DELAY_PS(812) G_DELAY_PS(600)	/* CFG_GPMC_A21_OEN */
    			0x1b8 A_DELAY_PS(240) G_DELAY_PS(0)	/* CFG_GPMC_A21_OUT */
    			0x1c0 A_DELAY_PS(954) G_DELAY_PS(600)	/* CFG_GPMC_A22_OEN */
    			0x1c4 A_DELAY_PS(60)  G_DELAY_PS(0)	/* CFG_GPMC_A22_OUT */
    			0x1d0 A_DELAY_PS(1340) G_DELAY_PS(420)	/* CFG_GPMC_A23_OUT */
    			0x1d8 A_DELAY_PS(935) G_DELAY_PS(600)	/* CFG_GPMC_A24_OEN */
    			0x1dc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A24_OUT */
    			0x1e4 A_DELAY_PS(525) G_DELAY_PS(600)	/* CFG_GPMC_A25_OEN */
    			0x1e8 A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A25_OUT */
    			0x1f0 A_DELAY_PS(767) G_DELAY_PS(600)	/* CFG_GPMC_A26_OEN */
    			0x1f4 A_DELAY_PS(225) G_DELAY_PS(0)	/* CFG_GPMC_A26_OUT */
    			0x1fc A_DELAY_PS(565) G_DELAY_PS(600)	/* CFG_GPMC_A27_OEN */
    			0x200 A_DELAY_PS(60) G_DELAY_PS(0)	/* CFG_GPMC_A27_OUT */
    			0x364 A_DELAY_PS(969) G_DELAY_PS(600)	/* CFG_GPMC_CS1_OEN */
    			0x368 A_DELAY_PS(180) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OUT */
    	      >;
    	};
    
    	/* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
    	mmc2_iodelay_hs200_rev20_conf: mmc2_iodelay_hs200_rev20_conf {
    		pinctrl-pin-array = <
    			0x1D0 A_DELAY_PS(935) G_DELAY_PS(280) 	/* CFG_GPMC_A23_OUT */
                0x364 A_DELAY_PS(684) G_DELAY_PS(0) 	/* CFG_GPMC_CS1_OEN */
                0x368 A_DELAY_PS(76) G_DELAY_PS(0) 	/* CFG_GPMC_CS1_OUT */
                0x1D8 A_DELAY_PS(621) G_DELAY_PS(0) 	/* CFG_GPMC_A24_OEN */
                0x1DC A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_GPMC_A24_OUT */
                0x1E4 A_DELAY_PS(183) G_DELAY_PS(0) 	/* CFG_GPMC_A25_OEN */
                0x1E8 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_GPMC_A25_OUT */
                0x1F0 A_DELAY_PS(467) G_DELAY_PS(0) 	/* CFG_GPMC_A26_OEN */
                0x1F4 A_DELAY_PS(0) G_DELAY_PS(0) 	/* CFG_GPMC_A26_OUT */
                0x1FC A_DELAY_PS(262) G_DELAY_PS(0) 	/* CFG_GPMC_A27_OEN */
                0x200 A_DELAY_PS(46) G_DELAY_PS(0) 	/* CFG_GPMC_A27_OUT */
                0x190 A_DELAY_PS(274) G_DELAY_PS(0) 	/* CFG_GPMC_A19_OEN */
                0x194 A_DELAY_PS(162) G_DELAY_PS(0) 	/* CFG_GPMC_A19_OUT */
                0x1A8 A_DELAY_PS(401) G_DELAY_PS(0) 	/* CFG_GPMC_A20_OEN */
                0x1AC A_DELAY_PS(73) G_DELAY_PS(0) 	/* CFG_GPMC_A20_OUT */
                0x1B4 A_DELAY_PS(465) G_DELAY_PS(0) 	/* CFG_GPMC_A21_OEN */
                0x1B8 A_DELAY_PS(115) G_DELAY_PS(0) 	/* CFG_GPMC_A21_OUT */
                0x1C0 A_DELAY_PS(633) G_DELAY_PS(0) 	/* CFG_GPMC_A22_OEN */
                0x1C4 A_DELAY_PS(47) G_DELAY_PS(0) 	/* CFG_GPMC_A22_OUT */
    	      >;
    	};
    
    	/* Correspnds to MMC2_DDR_3V3_MANUAL1 in datamanual */
    	mmc2_iodelay_ddr_3_3v_rev11_conf: mmc2_iodelay_ddr_3_3v_rev11_conf {
    		pinctrl-pin-array = <
    			0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
    			0x190 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A19_OEN */
    			0x194 A_DELAY_PS(174) G_DELAY_PS(0)	/* CFG_GPMC_A19_OUT */
    			0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
    			0x1a8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A20_OEN */
    			0x1ac A_DELAY_PS(168) G_DELAY_PS(0)	/* CFG_GPMC_A20_OUT */
    			0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
    			0x1b4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A21_OEN */
    			0x1b8 A_DELAY_PS(136) G_DELAY_PS(0)	/* CFG_GPMC_A21_OUT */
    			0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
    			0x1c0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A22_OEN */
    			0x1c4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A22_OUT */
    			0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
    			0x1d0 A_DELAY_PS(879) G_DELAY_PS(0)	/* CFG_GPMC_A23_OUT */
    			0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
    			0x1d8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A24_OEN */
    			0x1dc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A24_OUT */
    			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
    			0x1e4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_OEN */
    			0x1e8 A_DELAY_PS(34) G_DELAY_PS(0)	/* CFG_GPMC_A25_OUT */
    			0x1ec A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A26_IN */
    			0x1f0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A26_OEN */
    			0x1f4 A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_OUT */
    			0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
    			0x1fc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A27_OEN */
    			0x200 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A27_OUT */
    			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
    			0x364 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OEN */
    			0x368 A_DELAY_PS(11) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC2_DDR_1V8_MANUAL1 in datamanual */
    	mmc2_iodelay_ddr_1_8v_rev11_conf: mmc2_iodelay_ddr_1_8v_rev11_conf {
    		pinctrl-pin-array = <
    			0x18c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A19_IN */
    			0x190 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A19_OEN */
    			0x194 A_DELAY_PS(174) G_DELAY_PS(0)	/* CFG_GPMC_A19_OUT */
    			0x1a4 A_DELAY_PS(274) G_DELAY_PS(240)	/* CFG_GPMC_A20_IN */
    			0x1a8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A20_OEN */
    			0x1ac A_DELAY_PS(168) G_DELAY_PS(0)	/* CFG_GPMC_A20_OUT */
    			0x1b0 A_DELAY_PS(0) G_DELAY_PS(60)	/* CFG_GPMC_A21_IN */
    			0x1b4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A21_OEN */
    			0x1b8 A_DELAY_PS(136) G_DELAY_PS(0)	/* CFG_GPMC_A21_OUT */
    			0x1bc A_DELAY_PS(0) G_DELAY_PS(60)	/* CFG_GPMC_A22_IN */
    			0x1c0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A22_OEN */
    			0x1c4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A22_OUT */
    			0x1c8 A_DELAY_PS(514) G_DELAY_PS(360)	/* CFG_GPMC_A23_IN */
    			0x1d0 A_DELAY_PS(879) G_DELAY_PS(0)	/* CFG_GPMC_A23_OUT */
    			0x1d4 A_DELAY_PS(187) G_DELAY_PS(120)	/* CFG_GPMC_A24_IN */
    			0x1d8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A24_OEN */
    			0x1dc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A24_OUT */
    			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
    			0x1e4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_OEN */
    			0x1e8 A_DELAY_PS(34) G_DELAY_PS(0)	/* CFG_GPMC_A25_OUT */
    			0x1ec A_DELAY_PS(0) G_DELAY_PS(60)	/* CFG_GPMC_A26_IN */
    			0x1f0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A26_OEN */
    			0x1f4 A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_OUT */
    			0x1f8 A_DELAY_PS(121) G_DELAY_PS(60)	/* CFG_GPMC_A27_IN */
    			0x1fc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A27_OEN */
    			0x200 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A27_OUT */
    			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
    			0x364 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OEN */
    			0x368 A_DELAY_PS(11) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC3_MANUAL1 in datamanual */
    	mmc3_iodelay_manual1_rev20_conf: mmc3_iodelay_manual1_conf {
    		pinctrl-pin-array = <
    			0x678 A_DELAY_PS(0) G_DELAY_PS(386)	/* CFG_MMC3_CLK_IN */
    			0x680 A_DELAY_PS(605) G_DELAY_PS(0)	/* CFG_MMC3_CLK_OUT */
    			0x684 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_IN */
    			0x688 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OEN */
    			0x68c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OUT */
    			0x690 A_DELAY_PS(171) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_IN */
    			0x694 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OEN */
    			0x698 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OUT */
    			0x69c A_DELAY_PS(221) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_IN */
    			0x6a0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OEN */
    			0x6a4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OUT */
    			0x6a8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_IN */
    			0x6ac A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OEN */
    			0x6b0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OUT */
    			0x6b4 A_DELAY_PS(474) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_IN */
    			0x6b8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OEN */
    			0x6bc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC3_MANUAL1 in datamanual */
    	mmc3_iodelay_manual1_rev11_conf: mmc3_iodelay_manual1_conf {
    		pinctrl-pin-array = <
    			0x678 A_DELAY_PS(406) G_DELAY_PS(0)	/* CFG_MMC3_CLK_IN */
    			0x680 A_DELAY_PS(659) G_DELAY_PS(0)	/* CFG_MMC3_CLK_OUT */
    			0x684 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_IN */
    			0x688 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OEN */
    			0x68c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_CMD_OUT */
    			0x690 A_DELAY_PS(130) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_IN */
    			0x694 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OEN */
    			0x698 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT0_OUT */
    			0x69c A_DELAY_PS(169) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_IN */
    			0x6a0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OEN */
    			0x6a4 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT1_OUT */
    			0x6a8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_IN */
    			0x6ac A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OEN */
    			0x6b0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT2_OUT */
    			0x6b4 A_DELAY_PS(457) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_IN */
    			0x6b8 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OEN */
    			0x6bc A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_MMC3_DAT3_OUT */
    		>;
    	};
    
    	/* Corresponds to MMC4_DS_MANUAL1 in datamanual */
        mmc4_iodelay_ds_rev11_conf: mmc4_iodelay_ds_rev11_conf {
        	pinctrl-pin-array = <
        			0x840 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_IN */
        			0x848 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_OUT */
        			0x84c A_DELAY_PS(96) G_DELAY_PS(0)	/* CFG_UART1_RTSN_IN */
        			0x850 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OEN */
        			0x854 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OUT */
        			0x870 A_DELAY_PS(582) G_DELAY_PS(0)	/* CFG_UART2_CTSN_IN */
        			0x874 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OEN */
        			0x878 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OUT */
        			0x87c A_DELAY_PS(391) G_DELAY_PS(0)	/* CFG_UART2_RTSN_IN */
        			0x880 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OEN */
        			0x884 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OUT */
        			0x888 A_DELAY_PS(561) G_DELAY_PS(0)	/* CFG_UART2_RXD_IN */
        			0x88c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OEN */
        			0x890 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OUT */
        			0x894 A_DELAY_PS(588) G_DELAY_PS(0)	/* CFG_UART2_TXD_IN */
        			0x898 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OEN */
        			0x89c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OUT */
        		>;
        	};
    
        	/* Corresponds to MMC4_DS_MANUAL1 in datamanual */
        mmc4_iodelay_ds_rev20_conf: mmc4_iodelay_ds_rev20_conf {
        	pinctrl-pin-array = <
        			0x840 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_IN */
        			0x848 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_OUT */
        			0x84c A_DELAY_PS(307) G_DELAY_PS(0)	/* CFG_UART1_RTSN_IN */
        			0x850 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OEN */
        			0x854 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OUT */
        			0x870 A_DELAY_PS(785) G_DELAY_PS(0)	/* CFG_UART2_CTSN_IN */
        			0x874 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OEN */
        			0x878 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OUT */
        			0x87c A_DELAY_PS(613) G_DELAY_PS(0)	/* CFG_UART2_RTSN_IN */
        			0x880 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OEN */
        			0x884 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OUT */
        			0x888 A_DELAY_PS(683) G_DELAY_PS(0)	/* CFG_UART2_RXD_IN */
        			0x88c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OEN */
        			0x890 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OUT */
        			0x894 A_DELAY_PS(835) G_DELAY_PS(0)	/* CFG_UART2_TXD_IN */
        			0x898 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OEN */
        			0x89c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OUT */
        		>;
        	};
    
        	/* Corresponds to MMC4_MANUAL1 in datamanual */
        mmc4_iodelay_sdr12_hs_sdr25_rev11_conf: mmc4_iodelay_sdr12_hs_sdr25_rev11_conf {
        	pinctrl-pin-array = <
        			0x840 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_IN */
        			0x848 A_DELAY_PS(2651) G_DELAY_PS(0)	/* CFG_UART1_CTSN_OUT */
        			0x84c A_DELAY_PS(1572) G_DELAY_PS(0)	/* CFG_UART1_RTSN_IN */
        			0x850 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OEN */
        			0x854 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OUT */
        			0x870 A_DELAY_PS(1913) G_DELAY_PS(0)	/* CFG_UART2_CTSN_IN */
        			0x874 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OEN */
        			0x878 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OUT */
        			0x87c A_DELAY_PS(1721) G_DELAY_PS(0)	/* CFG_UART2_RTSN_IN */
        			0x880 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OEN */
        			0x884 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OUT */
        			0x888 A_DELAY_PS(1891) G_DELAY_PS(0)	/* CFG_UART2_RXD_IN */
        			0x88c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OEN */
        			0x890 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OUT */
        			0x894 A_DELAY_PS(1919) G_DELAY_PS(0)	/* CFG_UART2_TXD_IN */
        			0x898 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OEN */
        			0x89c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OUT */
        		>;
        	};
    
        	/* Corresponds to MMC4_MANUAL1 in datamanual */
        mmc4_iodelay_sdr12_hs_sdr25_rev20_conf: mmc4_iodelay_sdr12_hs_sdr25_rev20_conf {
        	pinctrl-pin-array = <
        			0x840 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_CTSN_IN */
        			0x848 A_DELAY_PS(1147) G_DELAY_PS(0)	/* CFG_UART1_CTSN_OUT */
        			0x84c A_DELAY_PS(1834) G_DELAY_PS(0)	/* CFG_UART1_RTSN_IN */
        			0x850 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OEN */
        			0x854 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART1_RTSN_OUT */
        			0x870 A_DELAY_PS(2165) G_DELAY_PS(0)	/* CFG_UART2_CTSN_IN */
        			0x874 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OEN */
        			0x878 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_CTSN_OUT */
        			0x87c A_DELAY_PS(1929) G_DELAY_PS(64)	/* CFG_UART2_RTSN_IN */
        			0x880 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OEN */
        			0x884 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RTSN_OUT */
        			0x888 A_DELAY_PS(1935) G_DELAY_PS(128)	/* CFG_UART2_RXD_IN */
        			0x88c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OEN */
        			0x890 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_RXD_OUT */
        			0x894 A_DELAY_PS(2172) G_DELAY_PS(44)	/* CFG_UART2_TXD_IN */
        			0x898 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OEN */
        			0x89c A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_UART2_TXD_OUT */
        		>;
        	};
    };

    May be some issue with pinmux changes I guess. Please help ! 

  • Vishal,

    If you are following that thread, I think it would be worth trying to make the same changes including to the dra7.dtsi file. 

    You should try it and see if it works. 

    -Josue

  • Josue,

    The overall DTS (Device Tree Source) structure seems to have changed in 9.03 SDK, so instead of adding the entry in dra7.dtsi, I added it in arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi due to a lack of full understanding of the updated DTS hierarchy.

    I'd appreciate your guidance on where exactly the entry should go within the current structure.

    At the moment, the entry has been added as follows:


    // SPDX-License-Identifier: GPL-2.0-only
    /*
     * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
     */
    /dts-v1/;
    
    #include "am5728.dtsi"
    #include "am57xx-commercial-grade.dtsi"
    #include "dra74x-mmc-iodelay.dtsi"
    #include "dra74-ipu-dsp-common.dtsi"
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    
    / {
    	compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
    
    	aliases {
    		rtc0 = &mcp_rtc;
    		rtc1 = &tps659038_rtc;
    		rtc2 = &rtc;
    		//display0 = &hdmi0;
    		display0 = "/display";
    	};
    
    	gpio-keys {
    		compatible = "gpio-keys";
    
    		button-user1 {
    			gpios = <&gpio1 14 0>;
    			label = "HOOK_INT";
    			linux,code = <103>;
    		};
    
    		button-user2 {
    			gpios = <&gpio2 6 1>;
    			label = "KEYL_INT";
    			linux,code = <102>;
    		};
    
    		button-user3 {
    			gpios = <&gpio5 1 0>;
    			label = "HEADSET_INT";
    			linux,code = <108>;
    		};
    
    	};
    
    keypad: keypad@4ae1c000 {
    		compatible = "ti,omap4-keypad";
    		reg = <0x4ae1c000 0x80>;
    		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
    		keypad,num-rows = <4>;
    		keypad,num-columns = <4>;
    		linux,keymap = <
    			0x00000041 0x00010042 0x00020043 0x00030044
    			0x01000045 0x01010046 0x01020047 0x01030048
    			0x02000049 0x0201004a 0x0202004b 0x0203004c
    			0x0300004d 0x0301004e 0x0302004f 0x03030050
    			>;
    		status="okay";
    	};
    	chosen {
    		stdout-path = &uart3;
    	};
    
    	memory@0 {
    		device_type = "memory";
    		reg = <0x0 0x80000000 0x0 0x80000000>;
    	};
    
    main_12v0: fixedregulator-main_12v0 {
    		   /* main supply */
    		   compatible = "regulator-fixed";
    		   regulator-name = "main_12v0";
    		   regulator-min-microvolt = <12000000>;
    		   regulator-max-microvolt = <12000000>;
    		   regulator-always-on;
    		   regulator-boot-on;
    	   };
    
    evm_5v0: fixedregulator-evm_5v0 {
    		 /* Output of TPS54531D */
    		 compatible = "regulator-fixed";
    		 regulator-name = "evm_5v0";
    		 regulator-min-microvolt = <5000000>;
    		 regulator-max-microvolt = <5000000>;
    		 vin-supply = <&main_12v0>;
    		 regulator-always-on;
    		 regulator-boot-on;
    	 };
    
    	 reserved-memory {
    #address-cells = <2>;
    #size-cells = <2>;
    		 ranges;
    
    ipu2_memory_region: ipu2-memory@95800000 {
    			    compatible = "shared-dma-pool";
    			    reg = <0x0 0x95800000 0x0 0x3800000>;
    			    reusable;
    			    status = "okay";
    		    };
    
    dsp1_memory_region: dsp1-memory@99000000 {
    			    compatible = "shared-dma-pool";
    			    reg = <0x0 0x99000000 0x0 0x4000000>;
    			    reusable;
    			    status = "okay";
    		    };
    
    ipu1_memory_region: ipu1-memory@9d000000 {
    			    compatible = "shared-dma-pool";
    			    reg = <0x0 0x9d000000 0x0 0x2000000>;
    			    reusable;
    			    status = "okay";
    		    };
    
    dsp2_memory_region: dsp2-memory@9f000000 {
    			    compatible = "shared-dma-pool";
    			    reg = <0x0 0x9f000000 0x0 0x800000>;
    			    reusable;
    			    status = "okay";
    		    };
    	 };
    
    vdd_3v3: fixedregulator-vdd_3v3 {
    		 compatible = "regulator-fixed";
    		 regulator-name = "vdd_3v3";
    		 vin-supply = <&regen1>;
    		 regulator-min-microvolt = <3300000>;
    		 regulator-max-microvolt = <3300000>;
    	 };
    
    aic_dvdd: fixedregulator-aic_dvdd {
    		  compatible = "regulator-fixed";
    		  regulator-name = "aic_dvdd_fixed";
    		  vin-supply = <&vdd_3v3>;
    		  regulator-min-microvolt = <1800000>;
    		  regulator-max-microvolt = <1800000>;
    	  };
    
    vtt_fixed: fixedregulator-vtt {
    		   /* TPS51200 */
    		   compatible = "regulator-fixed";
    		   regulator-name = "vtt_fixed";
    		   vin-supply = <&smps3_reg>;
    		   regulator-min-microvolt = <3300000>;
    		   regulator-max-microvolt = <3300000>;
    		   regulator-always-on;
    		   regulator-boot-on;
    		   enable-active-high;
    		   gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
    	   };
    
    gpio_fan: gpio_fan {
    		  /* Based on 5v 500mA AFB02505HHB */
    		  compatible = "gpio-fan";
    		  gpios =  <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
    		  gpio-fan,speed-map = <0     0>,
    			  <13000 1>;
    #cooling-cells = <2>;
    	  };
    
    hdmi0: connector {
    	       compatible = "hdmi-connector";
    	       label = "hdmi";
    
    	       type = "a";
    
    	       port {
    hdmi_connector_in: endpoint {
    			   remote-endpoint = <&tpd12s015_out>;
    		   };
    	       };
           };
    
    tpd12s015: encoder {
    		   compatible = "ti,tpd12s015";
    
    		   ports {
    #address-cells = <1>;
    #size-cells = <0>;
    
    			   port@0 {
    				   reg = <0>;
    
    tpd12s015_in: endpoint {
    		      remote-endpoint = <&hdmi_out>;
    	      };
    			   };
    
    			   port@1 {
    				   reg = <1>;
    
    tpd12s015_out: endpoint {
    		       remote-endpoint = <&hdmi_connector_in>;
    	       };
    			   };
    		   };
    	   };
    
    lcd0: display {
    	      compatible = "bolymin,btz070f-chc" ,"panel-dpi";
    	      //compatible = "osddisplays,osd070t1718-19ts" ,"panel-dpi";
    	      backlight = <&lcd_bl>;
    	      enable-gpios = <&gpio5 12 GPIO_ACTIVE_HIGH>;
    	      attr-gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>; //LCD GPIO [AKSHI] changed in VIC2
    	      label = "lcd";
    
    
    	      port {
    lcd_in: endpoint {
    		remote-endpoint = <&dpi_out>;
    	};
    	      };
          };
    
    lcd_bl: backlight {
    		compatible = "pwm-backlight";
    		brightness-levels = <0 32 64 96 128 160 192 255>;
    		default-brightness-level = <8>;
    		pwms = <&ehrpwm0 0 50000 0>;
    	};
    
    sound0: sound0 {
    		compatible = "simple-audio-card";
    		simple-audio-card,name = "BeagleBoard-X15";
    		simple-audio-card,widgets =
    			"Line", "Line Out",
    			"Line", "Line In";
    		simple-audio-card,routing =
    			"Line Out",	"LLOUT",
    			"Line Out",	"RLOUT",
    			"MIC2L",	"Line In",
    			"MIC2R",	"Line In";
    		simple-audio-card,format = "dsp_b";
    		simple-audio-card,bitclock-master = <&sound0_master>;
    		simple-audio-card,frame-master = <&sound0_master>;
    		simple-audio-card,bitclock-inversion;
    
    		simple-audio-card,cpu {
    			sound-dai = <&mcasp3>;
    		};
    
    sound0_master: simple-audio-card,codec {
    		       sound-dai = <&tlv320aic3104>;
    		       clocks = <&clkout2_clk>;
    	       };
    	};
    };
    
    &i2c1 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    tps659038: tps659038@58 {
    		   compatible = "ti,tps659038";
    		   reg = <0x58>;
    		   interrupt-parent = <&gpio1>;
    		   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    
    #interrupt-cells = <2>;
    		   interrupt-controller;
    
    		   ti,system-power-controller;
    		   ti,palmas-override-powerhold;
    
    		   tps659038_pmic {
    			   compatible = "ti,tps659038-pmic";
    
    			   regulators {
    smps12_reg: smps12 {
    		    /* VDD_MPU */
    		    regulator-name = "smps12";
    		    regulator-min-microvolt = < 850000>;
    		    regulator-max-microvolt = <1250000>;
    		    regulator-always-on;
    		    regulator-boot-on;
    	    };
    
    smps3_reg: smps3 {
    		   /* VDD_DDR */
    		   regulator-name = "smps3";
    		   regulator-min-microvolt = <1350000>;
    		   regulator-max-microvolt = <1350000>;
    		   regulator-always-on;
    		   regulator-boot-on;
    	   };
    
    smps45_reg: smps45 {
    		    /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
    		    regulator-name = "smps45";
    		    regulator-min-microvolt = < 850000>;
    		    regulator-max-microvolt = <1250000>;
    		    regulator-always-on;
    		    regulator-boot-on;
    	    };
    
    smps6_reg: smps6 {
    		   /* VDD_CORE */
    		   regulator-name = "smps6";
    		   regulator-min-microvolt = <850000>;
    		   regulator-max-microvolt = <1150000>;
    		   regulator-always-on;
    		   regulator-boot-on;
    	   };
    
    	   /* SMPS7 unused */
    
    smps8_reg: smps8 {
    		   /* VDD_1V8 */
    		   regulator-name = "smps8";
    		   regulator-min-microvolt = <1800000>;
    		   regulator-max-microvolt = <1800000>;
    		   regulator-always-on;
    		   regulator-boot-on;
    	   };
    
    	   /* SMPS9 unused */
    
    ldo1_reg: ldo1 {
    		  /* VDD_SD / VDDSHV8  */
    		  regulator-name = "ldo1";
    		  regulator-min-microvolt = <1800000>;
    		  regulator-max-microvolt = <3300000>;
    		  regulator-boot-on;
    		  regulator-always-on;
    	  };
    
    ldo2_reg: ldo2 {
    		  /* VDD_SHV5 */
    		  regulator-name = "ldo2";
    		  regulator-min-microvolt = <3300000>;
    		  regulator-max-microvolt = <3300000>;
    		  regulator-always-on;
    		  regulator-boot-on;
    	  };
    
    ldo3_reg: ldo3 {
    		  /* VDDA_1V8_PHYA */
    		  regulator-name = "ldo3";
    		  regulator-min-microvolt = <1800000>;
    		  regulator-max-microvolt = <1800000>;
    		  regulator-always-on;
    		  regulator-boot-on;
    	  };
    
    ldo4_reg: ldo4 {
    		  /* VDDA_1V8_PHYB */
    		  regulator-name = "ldo4";
    		  regulator-min-microvolt = <1800000>;
    		  regulator-max-microvolt = <1800000>;
    		  regulator-always-on;
    		  regulator-boot-on;
    	  };
    
    ldo9_reg: ldo9 {
    		  /* VDD_RTC */
    		  regulator-name = "ldo9";
    		  regulator-min-microvolt = <1050000>;
    		  regulator-max-microvolt = <1050000>;
    		  regulator-always-on;
    		  regulator-boot-on;
    	  };
    
    ldoln_reg: ldoln {
    		   /* VDDA_1V8_PLL */
    		   regulator-name = "ldoln";
    		   regulator-min-microvolt = <1800000>;
    		   regulator-max-microvolt = <1800000>;
    		   regulator-always-on;
    		   regulator-boot-on;
    	   };
    
    ldousb_reg: ldousb {
    		    /* VDDA_3V_USB: VDDA_USBHS33 */
    		    regulator-name = "ldousb";
    		    regulator-min-microvolt = <3300000>;
    		    regulator-max-microvolt = <3300000>;
    		    regulator-boot-on;
    	    };
    
    regen1: regen1 {
    		/* VDD_3V3_ON */
    		regulator-name = "regen1";
    		regulator-boot-on;
    		regulator-always-on;
    	};
    			   };
    		   };
    
    tps659038_rtc: tps659038_rtc {
    		       compatible = "ti,palmas-rtc";
    		       interrupt-parent = <&tps659038>;
    		       interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
    		       wakeup-source;
    	       };
    
    tps659038_pwr_button: tps659038_pwr_button {
    			      compatible = "ti,palmas-pwrbutton";
    			      interrupt-parent = <&tps659038>;
    			      interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
    			      wakeup-source;
    			      ti,palmas-long-press-seconds = <12>;
    		      };
    
    tps659038_gpio: tps659038_gpio {
    			compatible = "ti,palmas-gpio";
    			gpio-controller;
    #gpio-cells = <2>;
    		};
    
    extcon_usb2: tps659038_usb {
    		     compatible = "ti,palmas-usb-vid";
    		     ti,enable-vbus-detection;
    		     vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
    	     };
    
    	   };
    
    tmp102: tmp102@48 {
    		compatible = "ti,tmp102";
    		reg = <0x48>;
    		interrupt-parent = <&gpio7>;
    		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
    #thermal-sensor-cells = <1>;
    	};
    
    tlv320aic3104: tlv320aic3104@18 {
    #sound-dai-cells = <0>;
    		       compatible = "ti,tlv320aic3104";
    		       reg = <0x18>;
    		       assigned-clocks = <&clkoutmux2_clk_mux>;
    		       assigned-clock-parents = <&sys_clk2_dclk_div>;
    
    		       status = "okay";
    		       adc-settle-ms = <40>;
    
    		       AVDD-supply = <&vdd_3v3>;
    		       IOVDD-supply = <&vdd_3v3>;
    		       DRVDD-supply = <&vdd_3v3>;
    		       DVDD-supply = <&aic_dvdd>;
    	       };
    
    eeprom: eeprom@50 {
    		compatible = "atmel,24c32";
    		reg = <0x50>;
    	};
    };
    
    &i2c3 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    mcp_rtc: rtc@6f {
    		 compatible = "microchip,mcp7941x";
    		 reg = <0x6f>;
    		 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
    			 <&dra7_pmx_core 0x424>;
    		 interrupt-names = "irq", "wakeup";
    
    		 vcc-supply = <&vdd_3v3>;
    		 wakeup-source;
    	 };
    };
    
    &ehrpwm0 {
    	status = "okay";
    };
    
    &epwmss0 {
    	status = "okay";
    };
    
    
    /* [00] ::  Added Touch panel entries */
    &i2c5 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    polytouch: edt-ft5x06@38 {
    		   compatible = "edt,edt-ft5x06";
    		   reg = <0x38>;
    		   attb-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
    		   interrupt-parent = <&gpio5>;
    		   interrupts = <9 0>;
    		   //reset-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
    		   //wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
    		   /* AKSHI*/
    		   threshold = <20>;
    		   touchscreen-size-x = <1024>;
    		   touchscreen-size-y = <600>;
    		   wakeup-source;
    	   };
    
    };
    
    
    &gpio7_target {
    	ti,no-reset-on-init;
    	ti,no-idle-on-init;
    };
    
    &cpu0 {
    	vdd-supply = <&smps12_reg>;
    	voltage-tolerance = <1>;
    };
    
    &uart3 {
    	status = "okay";
    	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
    		<&dra7_pmx_core 0x3f8>;
    };
    
    &davinci_mdio_sw {
    phy0: ethernet-phy@1 {
    	      reg = <1>;
          };
    
    phy1: ethernet-phy@2 {
    	      reg = <2>;
          };
    };
    
    &mac_sw {
    	status = "okay";
    };
    
    &cpsw_port1 {
    	phy-handle = <&phy0>;
    	phy-mode = "rgmii-rxid";
    	ti,dual-emac-pvid = <1>;
    };
    
    &cpsw_port2 {
    	phy-handle = <&phy1>;
    	phy-mode = "rgmii-rxid";
    	ti,dual-emac-pvid = <2>;
    };
    
    &mmc1 {
    	status = "okay";
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&mmc1_pins_default>;
    
    	bus-width = <4>;
    	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
    	no-1-8-v;
    };
    
    &mmc2 {
    	status = "okay";
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&mmc2_pins_default>;
    
    	vmmc-supply = <&vdd_3v3>;
    	vqmmc-supply = <&vdd_3v3>;
    	bus-width = <8>;
    	non-removable;
    	no-1-8-v;
    };
    
    &sata {
    	status = "okay";
    };
    
    &usb2_phy1 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb2_phy2 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb1 {
    	dr_mode = "host";
    };
    
    &omap_dwc3_2 {
    	extcon = <&extcon_usb2>;
    };
    
    &usb2 {
    	/*
    	 * Stand alone usage is peripheral only.
    	 * However, with some resistor modifications
    	 * this port can be used via expansion connectors
    	 * as "host" or "dual-role". If so, provide
    	 * the necessary dr_mode override in the expansion
    	 * board's DT.
    	 */
    	dr_mode = "peripheral";
    };
    
    &cpu_trips {
    cpu_alert1: cpu_alert1 {
    		    temperature = <50000>; /* millicelsius */
    		    hysteresis = <2000>; /* millicelsius */
    		    type = "active";
    	    };
    };
    
    &cpu_cooling_maps {
    	map1 {
    		trip = <&cpu_alert1>;
    		cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    	};
    };
    
    &thermal_zones {
    board_thermal: board_thermal {
    		       polling-delay-passive = <1250>; /* milliseconds */
    		       polling-delay = <1500>; /* milliseconds */
    
    		       /* sensor       ID */
    		       thermal-sensors = <&tmp102     0>;
    
    board_trips: trips {
    board_alert0: board_alert {
    		      temperature = <40000>; /* millicelsius */
    		      hysteresis = <2000>; /* millicelsius */
    		      type = "active";
    	      };
    
    board_crit: board_crit {
    		    temperature = <105000>; /* millicelsius */
    		    hysteresis = <0>; /* millicelsius */
    		    type = "critical";
    	    };
    	     };
    
    board_cooling_maps: cooling-maps {
    			    map0 {
    				    trip = <&board_alert0>;
    				    cooling-device =
    					    <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    			    };
    		    };
    	       };
    };
    
    &dss {
    	status = "okay";
    	vdda_video-supply = <&ldoln_reg>;
    	ports {
    #address-cells = <1>;
    #size-cells = <0>;
    
    		port {
    			reg = <0>;
    dpi_out: endpoint {
    		 data-lines = <24>;
    		 remote-endpoint = <&lcd_in>;
    	 };
    		};
    	};
    };
    
    
    &hdmi {
    	status = "okay";
    	vdda-supply = <&ldo4_reg>;
    
    	port {
    hdmi_out: endpoint {
    		  remote-endpoint = <&tpd12s015_in>;
    	  };
    	};
    };
    
    &pcie1_rc {
    	status = "okay";
    	gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
    };
    
    &mcasp3 {
    #sound-dai-cells = <0>;
    	assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
    	assigned-clock-parents = <&sys_clkin2>;
    	status = "okay";
    
    	op-mode = <0>;	/* MCASP_IIS_MODE */
    	tdm-slots = <2>;
    	/* 4 serializers */
    	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
    		1 2 0 0
    		>;
    	tx-num-evt = <32>;
    	rx-num-evt = <32>;
    };
    
    &ipu2 {
    	status = "okay";
    	memory-region = <&ipu2_memory_region>;
    };
    
    &ipu1 {
    	status = "okay";
    	memory-region = <&ipu1_memory_region>;
    };
    
    &dsp1 {
    	status = "okay";
    	memory-region = <&dsp1_memory_region>;
    };
    
    &dsp2 {
    	status = "okay";
    	memory-region = <&dsp2_memory_region>;
    };
    
    &pruss1_mdio {
    	status = "disabled";
    };
    
    &pruss2_mdio {
    	status = "disabled";
    };
    
    #include "dra7-ipu-common-early-boot.dtsi"

  • Vishal,

    Is this DTS working? I will have confer internally about where this would go and get back to you. Hopefully by Friday.

    You only added try to make the keypad work correct?

    keypad: keypad@4ae1c000 {
    		compatible = "ti,omap4-keypad";
    		reg = <0x4ae1c000 0x80>;
    		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
    		keypad,num-rows = <4>;
    		keypad,num-columns = <4>;
    		linux,keymap = <
    			0x00000041 0x00010042 0x00020043 0x00030044
    			0x01000045 0x01010046 0x01020047 0x01030048
    			0x02000049 0x0201004a 0x0202004b 0x0203004c
    			0x0300004d 0x0301004e 0x0302004f 0x03030050
    			>;
    		status="okay";
    	};

    Is there any other entries for this keypad in your DTS?

    -Josue

  • Josue, 

    Is this DTS working? I will have confer internally about where this would go and get back to you. Hopefully by Friday.

    Like I said the keypad driver probe function is getting failed even after doing the changes in the driver as per this link below:- 
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/634114/linux-am5728-keypad-driver-not-working?tisearch=e2e-sitesearch&keymatch=am5728%252525252520keypad%252525252520devashish%252525252520tiwari# 

    So DTS file is actually read. But may be the issue lies in DTS positioning / pinmux entry / may be missing DTS functionality . Don't know exactly where the issue lies.

    You only added try to make the keypad work correct?

    Yes

    Is there any other entries for this keypad in your DTS?

    Nope!

  • Vishal,

    Due to low bandwidth at the moment, I cannot help you at this time. I will try to revisit this next week.

    -Josue

  • Josue, 

    Ok, your response is awaited!

    -Vishal 

  • Vishal,

    Have you tried reading the clock using devmem? ()

    What happens when you do that? Have you tried the experiment from this post

    Can you please remind me how this keyboard is connected to your board?

    -Josue

  • Have you tried reading the clock using devmem? ()

    What happens when you do that? Have you tried the experiment from this post

    root@am57xx-evm:~# devmem2 0x4ae1c000 32
    /dev/mem opened.
    Memory mapped at address 0xb6f0f000.
    Illegal data type '3'.
    
    root@am57xx-evm:~# devmem2 0x4ae1c000
    /dev/mem opened.
    Memory mapped at address 0xb6fb2000.
    Read at address 0x4AE1C000 (0xb6fb2000): 0x5FFF2200
    
    

    Since I am not getting the error, it seems this isn't any clock issue ! Anything else that you need me to test?

     

    Can you please remind me how this keyboard is connected to your board?

    The keyboard (KBD) interface present on the SoC, which is configured as 4x4 matrix is used. 

  • Vishal,

    Can you also read 0x4AE0 7878?
    Are you able to see the module using lsmod?

    Did you load the modules after updating your linux image?

    Small devmem2 guide:

    devmem2 address [type]
    • address:
      This specifies the memory address to be read. It should be provided in hexadecimal format (e.g., 0x48004B48).
    • type (optional):
      This determines the access operation type, influencing how many bytes are read.
      • b: Read a byte (8 bits).
      • h: Read a half-word (16 bits).
      • w: Read a word (32 bits).
      • If type is omitted, devmem2 defaults to reading a word (32 bits).

    -Josue

  • Josue,

    Got caught up in some work.

    Can you also read 0x4AE0 7878?

    devmem2 0x4ae07878
    /dev/mem opened.
    Memory mapped at address 0xb6f36000.
    Read at address  0x4AE07878 (0xb6f36878): 0x00000002
    

    Are you able to see the module using lsmod?

    Did you load the modules after updating your linux image?

    The CONFIG_KEYBOARD_OMAP4 value is set to y in .config. So, the module loads automatically. But the probe fails as below.

    root@am57xx-evm:~# dmesg | grep keypad
    [ 0.327209] VM********************* File: drivers/input/keyboard/omap4-keypad.c, Line: 364, Function: omap4_keypad_probe ****************************
    [ 0.327239] omap4-keypad 4ae1c00000000080.keypad: no base address specified
    [ 0.327239] VM********************* File: drivers/input/keyboard/omap4-keypad.c, Line: 382, Function: omap4_keypad_probe ****************************
    [ 0.327239] omap4-keypad: probe of 4ae1c00000000080.keypad failed with error -22

    -Vishal

  • Thanks Vishal,

    I will get back up to speed and try to get back to you tomorrow.

    -Josue

  • Vishal,

    As i have discussed before, this keypad is not supported as part of our standard SDK and I currently do not have the bandwidth to help.

    I apologize.

    See  RE: AM5728: keypad 4x4 not showing as event in evtest 

    -Josue