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TDA4VH-Q1: TDA4VH PCIe: DMA and CPU transaction interleaving

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

Tool/software:

Hello,

 

Here is my question and the context:

 

The configuration: one TDA4VH (Root Complex) connected directly by PCIe 3.1 to an endpoint.

 

The use-case:

On TDA4VH, I want to send a big amount of data by PCIe using a DMA.

In parallel, I want to do a PCie I/O write by CPU.

All these transactions are in the same Virtual Channel ( imposed by the endpoint which has only one VC).

The need is to send the I/O write transaction as soon as possible.

 

 

The  question is:  can the I/O write transaction be output during the DMA run (between 2 PCIe write transactions initiated by the DMA), or it will be output only when the DMA is finished ? Is there a special configuration the guaranty the transaction interleaving?

 

Thanks for the response

JPH