TDA4VE-Q1: mcspi5 signals output on CLK pins

Hi Jiang,

Is this on a custom board or the J721S2 EVM board from TI? The TI EVM board has a GPIO mux that by default would not enable SPI5_CLK.

Regards,

Takuma

Hi Takuma,

  Thanks for your quick response!

  It is custom board, however, I configured it as GPIO output to verify hardware connection, when I toggled these pins, the output is what I expected.

Jiang Liu

Hi Jiang,

Understood. So when configured as GPIO, the pin works as a normal GPIO pin. But, the goal is to configure it as McSPI5, and when configured for SPI5, this is not working <- this is my understanding of the behavior you are observing.

What OS/software driver is in-use?

Regards,

Takuma

HI Takuma,

  the OS is FreeRTOS, Driver is TI PDK 9.2.0.30, however, MCSPI driver used 8.5.0.11 because 9.2.0.30 MCSPI driver does not work for us.

Jiang Liu

Hello,

If you pin mux it to GPIO it the PIN might work for GPIO but this doesn't confirm you configured GPIO Expander correctly for SPI5. For SPI5_CLK you need to do Mux Selection. Can you share us how you have configured GPIO exapander using I2C?

Jiang Liu said:

MCSPI driver used 8.5.0.11 because 9.2.0.30 MCSPI driver does not work for us.

SPI CLK has nothing to do with driver . SPI CLK is a direct connection in soc

If you do proper PIN Mux and GPIO Expander selection it is a direct hardware connection

Regards

Tarun Mukesh

Hi Tarun,

  Thanks for your response!

for SPI5 CLIK, I just did simple configure to mode 8, like SPI0 configure, below is SPI5 pins configure code, where is GPIO expander?(in the TDA4?), do you have document to explain how to configure it?

static pinmuxPerCfg_t gMain_spi5PinCfg[] = {
/* SPI5 -> SPI5_CLK -> T27 */ //8
{
PIN_MCASP0_AXR3, PIN_MODE(8) | \
((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION ))
},
/* SPI5 -> SPI5_CS0 -> Y27 */ //8
{
PIN_MCASP2_ACLKX, PIN_MODE(8) | \
((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION))
},
/* SPI5 -> SPI5_D0 -> R27 */ //8
{
PIN_MCAN1_RX, PIN_MODE(8) | \
((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION ))
},
/* SPI5 -> SPI5_D1 -> AD27 */ //11
{
PIN_MCASP0_AXR6, PIN_MODE(11) | \
((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
},
{PINMUX_END}
};

Jiang Liu

Hi Tarun,

By the way, we are using SPI5 as master, we see data on MOSI pin even no SPI5 clk, I do not see doc for I2C configure expender forSPI5 clk.

Jiang Liu

Hello,

Jiang Liu said:

  It is custom board,

You are mentioning it as custom board , so can you share the schematics of SPI5_CLK from soc where it is being driven to ?

Jiang Liu said:

By the way, we are using SPI5 as master, we see data on MOSI pin even no SPI5 clk, I do not see doc for I2C configure expender forSPI5 clk.

If spi_clk is not there then there is no such chance of data transfer on SPI. MOSI data  present implies SPI_CLK is available , the issue can be with probing out signal.

Regards

Tarun Mukesh