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PROCESSOR-SDK-AM62A: "I/O Only + DDR" Low Power Mode Support

nathan rolfes
Prodigy 50 points
Part Number: PROCESSOR-SDK-AM62A


Tool/software:

In the technical reference manual, a low-power mode is claimed to exist called "I/O Only + DDR" and it is mentioned multiple times (inbetween "Partial I/O" and "DeepSleep") but no details are given. This seems like the perfect low-power mode for my application, achieving the lowest possible power draw (lower than deep sleep) while still being able to wake up from a GPIO/UART interrupt and boot quickly from DDR. 

However, the low-power modes tutorial does not mention this mode at all. Is it officially supported by the processor SDK? If so, how would I enable it? What type of power draw improvements should I expect over DeepSleep? Are any more details provided in other documentation that I can't find?

I noticed from this TI Linux kernel commit that IO+ DDR support should exist in the processor SDK for the AM62A, but I don't know how it is able to be entered.

Thanks for the help.

  • 0
    TI__Guru**** 170051 points

    Hi Nathan,

    I am routing your query to our Power expert for comments.

  • 0 in reply to Bin Liu
    TI__Mastermind 18775 points

    Hi Nathan,

    I/O + DDR is still in development and is not in the Linux SDK yet. It is currently planned for SDK 11.1 release but will update you if this changes.

    Thanks,

    Anshu

  • 0
    Prodigy 50 points

    Hi   

    It appears that the TI processor SDK documentation for "I/O Only + DDR" mode has been updated, see here and in the GitHub documentation repo.

    I have been working with it today. I believe that the mode is being entered, as indicated by LED LD2 on the SK evaluation module (LED should turn off). Power draw is also much, much lower. 

    However, when waking up the board with a character on wkup_uart0, instead of performing the kernel resume process (like in deepsleep), it performs a complete cold boot, as seen here:

    root@am62axx-evm:~# devmem2 0x4084014 w 0x20050000
/dev/mem opened.
Memory mapped at address 0xffff9a40f000.
Read at address  0x04084014 (0xffff9a40f014): 0x00050000
Write at address 0x04084014 (0xffff9a40f014): 0x20050000, readback 0x20050000
root@am62axx-evm:~# devmem2 0x4084024 w 0x20050000
/dev/mem opened.
Memory mapped at address 0xffff9934e000.
Read at address  0x04084024 (0xffff9934e024): 0x00050000
Write at address 0x04084024 (0xffff9934e024): 0x20050000, readback 0x20050000
root@am62axx-evm:~# echo disabled > /sys/class/rtc/rtc0/device/power/wakeup
root@am62axx-evm:~# echo disabled > /sys/devices/platform/bus@f0000/f900000.dwc3-usb/power/wakeup
root@am62axx-evm:~# echo disabled > /sys/devices/platform/bus@f0000/f910000.dwc3-usb/power/wakeup
root@am62axx-evm:~# i2cset -f -y -m 0xFF -r -a 0 0x48 0x86 0x1
Value 0x01 written, readback matched
root@am62axx-evm:~# echo mem > /sys/power/state
[  126.765180] PM: suspend entry (deep)
[  126.777964] Filesystems sync: 0.009 seconds
[  126.792539] Freezing user space processes
[  126.798248] Freezing user space processes completed (elapsed 0.001 seconds)
[  126.805243] OOM killer disabled.
[  126.808460] Freezing remaining freezable tasks
[  126.814168] Freezing remaining freezable tasks completed (elapsed 0.001 seconds)
[  126.821575] printk: Suspending console(s) (use no_console_suspend to debug)

U-Boot SPL 2024.04-ti-ga970f6e51043 (Nov 13 2024 - 14:26:23 +0000)
SYSFW ABI: 4.0 (firmware rev 0x000a '10.1.8--v10.01.08 (Fiery Fox)')
SPL initial stack usage: 13568 bytes
Trying to boot from MMC2
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Starting ATF on ARM64 core...


    Is this intended behavior? I thought the point of maintaining DDR context was that the kernel could resume from RAM as it does in deepsleep.
    Does this mode work for you all?
    I am using the most recent TI Linux kernel from the processor SDK.

    Thanks for the help.

  • 0 in reply to nathan rolfes
    Prodigy 50 points

    Any resolution on the above issue?

    Thanks,

    Nathan

  • 0 in reply to nathan rolfes
    Prodigy 50 points

    I have read this previous forum post that has shed some more light, I believe I am in the same situation as Alok where:
    "Currently, if I forcefully write 0x01 to register 0x86 and drive GPIO3 low, the system enters sleep mode. When I drive GPIO3 high, the system wakes up, but instead of resuming the previous session, it reboots from the base U-Boot."

     have you experimented with IO Only + DDR?

  • 0 in reply to nathan rolfes
    TI__Mastermind 18775 points

    Hi Nathan,

    I was out of office and returning today. Please allow some time for me to review the thread and get back to you.

    Thanks,

    Anshu

  • 0 in reply to Anshu Madwesh
    Prodigy 50 points

     any updates on this topic? Thanks