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Original question:

[FAQ] AM62L: DDR4 guidelines for impedance values

AM625: DDR4 Trace Impedance and Drive Strength

Brendan O'Brien
Prodigy 40 points
Part Number: AM625
Other Parts Discussed in Thread: AM62L, SYSCONFIG

Tool/software:

I would like to confirm that - for point-to-point routing from the AM6254 to a single DDR4 part - 50Ω single-ended trace impedance is acceptable.
We would prefer to route with 50Ω traces because they are thinner than the 40Ω traces recommended by the DDR design guidelines. The thinner 50Ω traces will be easier to route with adequate trace-to-trace spacing.
We believe this approach is technically sound for several reasons:
  • Our implemented Micron x16 dual-die DDR4 part supports a 48Ω drive strength for use with 50Ω trace impedance.
  • A recent E2E AM62L post confirmed 50Ω trace impedance as acceptable for DDR4 point-to-point routing. Both the AM62L and AM6254 reference the same TI DDR design guidelines.
We would appreciate confirmation because the DDR guidelines only mention 40Ω/80Ω trace impedance.
What limitations or tradeoffs should we be aware of when using 50Ω/100Ω trace impedance instead of 40Ω/80Ω?
Please let us know if you need further details about our implementation.
  • +1
    TI__Guru* 87090 points

    Hi Brendan,

    yes, for lightly loaded signals (ie, point to point), 50ohm single ended (100ohm differential) trace impedance is acceptable, controller does support 48ohm drive strength setting.  Just watch out for manufacturer tolerances which can be as much as +/- 10%, and some manufactures have difficulty with the thinner traces.

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 40 points

    Thanks! Are you aware of what trade-offs we might see from running at 50Ω trace impedance / 48Ω drive strength instead of 40Ω? For example, is this expected to have a detrimental effect on signal integrity or other characteristics?

  • 0 in reply to Brendan O'Brien
    TI__Guru* 87090 points

    You should be able to achieve good signal integrity with 50ohm as long as you handle the impedance matching and trace to trace spacing correctly.  I would recommend board sims to get better confidence in the signal integrity.   Our EVM team just mentioned the main trade off is the manufacturability of the trace widths.

    Regards,

    James

  • 0 in reply to JJD
    Intellectual 375 points

    Hi JJD,

    What parameters we need to modify in the DDR4 SysConfig settings for the 50 Ω trace impedance?

    Below are the default settings of the SysConfig DDR Configuration 0.10.32:

  • 0 in reply to Kris Ganev
    TI__Guru* 87090 points

    You would focus on the driver impedance and ODT settings. for both controller and DRAM.  Most likely you would set those to 48ohm each, but you may have to tweak those based on manufacturing tolerances.

    Regards,

    James