Tool/software:
I would like to replace the DDR component D2516ECMDXGJDI-U with the JSR364G168NHR-L.. Both appear to follow JEDEC standards and seem pin-to-pin compatible, but I’d appreciate any insight TI may have on this potential swap — particularly on the software validation front.
Would you be able to recommend:
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Any specific software-level stress tests (including edge cases) we should run?
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Known compatibility flags or errata to be aware of for DDR3L with this processor?
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Any TI documentation or application notes that cover DDR validation practices or tools?
- Would this part require new ODT settings?
I want to make sure we perform a thorough validation from both a hardware and firmware perspective.
Thank you, I appreciate your advice.