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AM62L: MIPI or RGB Display output possible in sleep modes?

Wolfgang Wendler TI
Intellectual 2310 points
Part Number: AM62L


Tool/software:

Team,

Asking on behalf of my customer:

Can AM62L continue to output MIPI or RGB display data while in sleep modes, and if so which ones?

While in deep-sleep I assume no display output is possible, correct?

Is there any possibility to have a 10Hz display refresh rate over MIPI at device average power consumption of 80mW or less?

Thanks,

/ Wolfgang

  • 0
    TI__Genius 9520 points

    Looking into it internally, please expect a response by end of this week.

  • 0 in reply to Divyansh Mittal
    TI__Genius 9520 points

    Hi Wolfgang,
    Out of the 4 low power modes: RTC only | RTC only + DDR self refresh | DeepSleep | Standby,
    Only standby mode may be used for something similar to what you are proposing.

    We have internally tested DSI in standby/OS idle mode with ballpark power consumption around 270mW.
    There is an Application Note in the pipeline on how this was done, please wait for it if further information is needed.

  • 0 in reply to Divyansh Mittal
    TI__Intellectual 2310 points

    Hi Divyansh,

    Thank you for the reply. My customer came back asking:

    Do you see any chance reducing it to 80mW by switching off many devices (domains)?

    They are hard limited because of EU Ecodesign rules for device standby.

    If the DSI output only needs to update a clock (time of day) display at 10Hz refresh, would it be possible to reduce average consumption by cycling between sleep modes? No application needs to run as product is in standby mode, waking up only on an external RTC interrupt to update the time display.

    Thanks

    / Wolfgang

  • 0 in reply to Wolfgang Wendler TI
    TI__Genius 9520 points

    Hi Wolfgang,
    I have assigned the thread to the relevant expert, please await their reply.

  • 0 in reply to Divyansh Mittal
    TI__Intellectual 2310 points

    Team,

    6 days and still waiting on feedback to my question.

    Let me re-phrase:

    Can AM62L output MIPI-DSI to a display autonomously without CPU interaction, e.g. through DMA or similar mechanism?

    Image on display is static, only updates once every 60 seconds when time of day changes, while MIPI-DSI framerate is 10fps.

    Image data is updated in memory by the linux CPU once every 60 seconds followed by CPU going back to sleep/suspend, not idle mode. Wake up/resume is triggered by external GPIO pin (external RTC).

    Is this possible with an average power consumption below 80mW?

    This information is critical for this customer project and required for continued development with TI MPU and not competitor.

    Regards,

    / Wolfgang

  • 0 in reply to Wolfgang Wendler TI
    TI__Guru* 84415 points

    Hello Wolfgang

    Thanks for the additional information.  A typical optimized OS IDLE mode with static display + clock running is anywhere in the 220- 300 mW range from our initial assessment. If this was coupled with doing deep sleep that is in the range of ~11  mW range ( SOC + LPDDR4) with some on/off duty cycle - say 55 sec deep sleep + 5 sec OS IDLE, the SoC + DDR power consumption could be in the range of ~ 50-60 mW (leaving some budget for other onboard components). *however* using a low power mode like deep sleep will mean there is no display while the SOC is in deep sleep. This may not be acceptable for the application. 

    Regards

    Mukul