Tool/software:
HDMI Project with AM3354 + ADV7513
Hardware Context
SoC: AM3354 (TI Sitara)
HDMI Encoder: ADV7513
Interface: RGB (16-bit – LCD_DATA[0:15] pins) + control signals (PCLK, HSYNC, VSYNC, DE)
Topology:
SOM module with AM3354
Baseboard connected to an HDMI module via board-to-board connector
7" display with 1024x600 resolution
Current Status
ADV7513 Driver:
The kernel correctly detects the ADV7513 (via I²C at address 0x39)
The DRM driver is successfully probed
Device Tree configurations are correctly applied
DRM / Framebuffer:
/dev/fb0 is created and active
HDMI-A-1 connector is recognized as connected
Valid modes are listed (1024x600, 800x600, etc.)
The desired resolution, 1024x600@60Hz, is forced via bootarg:
video=HDMI-A-1:1024x600@60e
Current Issue
No video output on HDMI
ADV7513 input signals (RGB + HSYNC/VSYNC/DE/PCLK) are present and have correct timing (verified with oscilloscope)
TMDS output signals (CLK+/−, D0/D1/D2+/−) from the ADV7513 are not present — no transitions observed
HDMI monitor enters standby mode, indicating lack of video synchronization
EDID is not functional, but this seems to be a secondary issue, as static panel-timing is being used
Tests, Logs, and Files
Tested both the intended 7" 1024x600 display (datasheet and configurations attached)
Also tested with a Dell Full HD monitor, hoping it would auto-adjust even if not officially supported — unsuccessful
DTSI
// SPDX-License-Identifier: GPL-2.0-only
/*
* ADV7513 HDMI AM3354 modo fixo 1024x600
*/
#include <dt-bindings/interrupt-controller/irq.h>
&am33xx_pinmux {
adv7513_pins: pinmux_adv7513_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
>;
};
};
&lcdc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&adv7513_pins>;
port {
lcdc_out: endpoint {
remote-endpoint = <&adv7513_in>;
};
};
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
hdmi: hdmi@39 {
compatible = "adi,adv7513";
reg = <0x39>, <0x66>;
reg-names = "main", "edid";
status = "okay";
avdd-supply = <&ldo3_reg>;
dvdd-supply = <&ldo3_reg>;
pvdd-supply = <&ldo3_reg>;
dvdd-3v-supply = <&ldo2_reg>;
bgvdd-supply = <&ldo3_reg>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,clock-delay = <0>;
adi,input-style = <1>;
adi,input-justification = "right";
adi,input-id = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7513_in: endpoint {
remote-endpoint = <&lcdc_out>;
};
};
port@1 {
reg = <1>;
adv7513_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
};
/ {
panel {
compatible = "panel-simple";
status = "okay";
panel-timing {
clock-frequency = <51250000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <160>;
hback-porch = <120>;
hsync-len = <40>;
vfront-porch = <3>;
vback-porch = <12>;
vsync-len = <10>;
hsync-active = <0>; // -hsync
vsync-active = <1>; // +vsync
de-active = <1>;
pixelclk-active = <0>;
data-mapping = "rgb565";
bits-per-pixel = <16>;
};
port {
panel_in: endpoint {
remote-endpoint = <&adv7513_out>;
};
};
};
};
DRM LOG
root@modSmartCD300 ~ # dmesg | grep drm [ 1.416686] [drm:drm_core_init] Initialized [ 1.416972] [drm:omap_drm_init] init [ 1.417612] [drm:tilcdc_drm_init] init [ 1.795674] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 1.795741] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 1.795762] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 1.795779] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 2.116786] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 2.116852] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 2.116873] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 2.116889] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 2.159324] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 2.159398] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 2.159419] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 2.159436] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 2.166331] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 2.166407] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 2.166429] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 2.166445] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 2.187870] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 2.187937] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 2.187954] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 2.187968] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 2.193421] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 2.193491] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 2.193510] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 2.193523] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 2.282304] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 2.282430] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 2.282480] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 2.282522] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 13.797464] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 13.797536] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 13.797554] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 13.797568] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 14.479718] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 14.479790] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 14.479808] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 14.479822] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 15.270622] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 15.270692] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 15.270711] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 15.270725] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 19.288379] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 19.288449] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 19.288466] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 19.288480] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 19.713365] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 19.713437] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 19.713456] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 19.713470] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 19.722098] [drm:tilcdc_init.constprop.0] Blue and red wiring '' unknown, use legacy mode [ 19.722167] [drm:tilcdc_init.constprop.0] Maximum Bandwidth Value 78643200 [ 19.722184] [drm:tilcdc_init.constprop.0] Maximum Horizontal Pixel Width Value 2048pixels [ 19.722198] [drm:tilcdc_init.constprop.0] Maximum Pixel Clock Value 126000KHz [ 19.809248] [drm] forcing HDMI-A-1 connector on [ 19.809286] [drm:drm_connector_init] cmdline mode for connector HDMI-A-1 1024x600@60Hz [ 19.809746] [drm:drm_minor_register] [ 19.809779] [drm:drm_minor_register] [ 19.810292] [drm:drm_minor_register] new minor registered 0 [ 19.810461] [drm:drm_sysfs_connector_add] adding "HDMI-A-1" to sysfs [ 19.810518] [drm:drm_sysfs_hotplug_event] generating hotplug event [ 19.810566] [drm] Initialized tilcdc 1.0.0 20121205 for 4830e000.lcdc on minor 0 [ 19.810595] [drm:drm_client_modeset_probe] [ 19.810614] [drm:drm_mode_object_get] OBJ ID: 34 (2) [ 19.810637] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:34:HDMI-A-1] [ 19.810666] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:34:HDMI-A-1] status updated from unknown to connected [ 20.219099] [drm:tilcdc_crtc_mode_valid] Processing mode 640x480@60 with pixel clock 25175 [ 20.219172] [drm:tilcdc_crtc_mode_valid] Processing mode 800x600@56 with pixel clock 36000 [ 20.219306] [drm:tilcdc_crtc_mode_valid] Processing mode 800x600@60 with pixel clock 40000 [ 20.219383] [drm:tilcdc_crtc_mode_valid] Processing mode 848x480@60 with pixel clock 33750 [ 20.219459] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x768@60 with pixel clock 65000 [ 20.219534] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@60 with pixel clock 48924 [ 20.219615] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:34:HDMI-A-1] probed modes : [ 20.219645] [drm:drm_mode_debug_printmodeline] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 20.219681] [drm:drm_mode_debug_printmodeline] Modeline "1024x600": 60 48924 1024 1064 1168 1312 600 601 604 622 0x20 0x6 [ 20.219703] [drm:drm_mode_debug_printmodeline] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 20.219725] [drm:drm_mode_debug_printmodeline] Modeline "800x600": 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [ 20.219746] [drm:drm_mode_debug_printmodeline] Modeline "848x480": 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5 [ 20.219768] [drm:drm_mode_debug_printmodeline] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 20.219791] [drm:drm_client_modeset_probe] connector 34 enabled? yes [ 20.219818] [drm:drm_client_modeset_probe] Not using firmware configuration [ 20.219834] [drm:drm_client_modeset_probe] looking for cmdline mode on connector 34 [ 20.219847] [drm:drm_client_modeset_probe] found mode 1024x600 [ 20.219858] [drm:drm_client_modeset_probe] picking CRTCs for 2048x2048 config [ 20.219877] [drm:drm_client_modeset_probe] desired mode 1024x600 set on crtc 32 (0,0) [ 20.219892] [drm:drm_mode_object_get] OBJ ID: 34 (2) [ 20.219911] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (3) [ 20.219936] tilcdc 4830e000.lcdc: [drm:__drm_fb_helper_initial_config_and_unlock] test CRTC 0 primary plane [ 20.219976] tilcdc 4830e000.lcdc: [drm:drm_fb_helper_generic_probe] surface width(1024), height(600) and bpp(16) [ 20.222072] [drm:drm_mode_addfb2] [FB:35] [ 20.222126] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (2) [ 20.247912] [drm:drm_atomic_state_init] Allocated atomic state 137282e5 [ 20.247981] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-0] d006a60c state to 137282e5 [ 20.248006] [drm:drm_atomic_get_crtc_state] Added [CRTC:32:tilcdc crtc] 94ac4242 state to 137282e5 [ 20.248045] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1024x600] for [CRTC:32:tilcdc crtc] state 94ac4242 [ 20.248069] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_plane] Link [PLANE:31:plane-0] state d006a60c to [CRTC:32:tilcdc crtc] [ 20.248090] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:31:plane-0] state d006a60c [ 20.248104] [drm:drm_mode_object_get] OBJ ID: 35 (1) [ 20.248122] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:32:tilcdc crtc] to 137282e5 [ 20.248148] [drm:drm_mode_object_get] OBJ ID: 34 (2) [ 20.248159] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34:HDMI-A-1] d03cddeb state to 137282e5 [ 20.248174] [drm:drm_mode_object_get] OBJ ID: 34 (3) [ 20.248186] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state d03cddeb to [CRTC:32:tilcdc crtc] [ 20.248203] [drm:drm_atomic_check_only] checking 137282e5 [ 20.248222] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] mode changed [ 20.248238] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] enable changed [ 20.248248] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] active changed [ 20.248263] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 20.248276] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] using [ENCODER:33:None-33] on [CRTC:32:tilcdc crtc] [ 20.248290] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] needs all connectors, enable: y, active: y [ 20.248303] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:32:tilcdc crtc] to 137282e5 [ 20.248319] [drm:drm_atomic_add_affected_planes] Adding all current planes for [CRTC:32:tilcdc crtc] to 137282e5 [ 20.248334] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to 137282e5 [ 20.248352] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@60 with pixel clock 48924 [ 20.248389] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] mode changed [ 20.248400] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] enable changed [ 20.248409] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] active changed [ 20.248420] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 20.248431] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 20.248445] [drm:drm_atomic_helper_check_modeset] [CRTC:32:tilcdc crtc] needs all connectors, enable: y, active: y [ 20.248457] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:32:tilcdc crtc] to 137282e5 [ 20.248472] [drm:drm_atomic_add_affected_planes] Adding all current planes for [CRTC:32:tilcdc crtc] to 137282e5 [ 20.248485] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to 137282e5 [ 20.248498] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@60 with pixel clock 48924 [ 20.248514] [drm:drm_atomic_commit] committing 137282e5 [ 20.248557] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: hwmode: htotal 1312, vtotal 622, vdisplay 600 [ 20.248584] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: clock 48924 kHz framedur 16680238 linedur 26817 [ 20.248601] [drm:drm_atomic_helper_commit_modeset_disables] modeset on [ENCODER:33:None-33] [ 20.248635] [drm:drm_atomic_helper_commit_modeset_enables] enabling [CRTC:32:tilcdc crtc] [ 20.275739] [drm:tilcdc_crtc_enable] 1024x600, hbp=144, hfp=40, hsw=104, vbp=18, vfp=1, vsw=3 [ 20.277096] [drm:tilcdc_crtc_set_clk] lcd_clk=97846154, mode clock=48924, div=2 [ 20.295796] tilcdc 4830e000.lcdc: [drm:drm_crtc_vblank_on] crtc 0, vblank enabled 0, inmodeset 1 [ 20.295874] [drm:drm_atomic_helper_commit_modeset_enables] enabling [ENCODER:33:None-33] [ 20.303410] tilcdc 4830e000.lcdc: [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 [ 20.303479] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1, diff=0, hw=0 hw_last=0 [ 20.312447] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1, diff=1, hw=0 hw_last=0 [ 20.312582] [drm:drm_atomic_state_default_clear] Clearing atomic state 137282e5 [ 20.312626] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (4) [ 20.312647] [drm:__drm_atomic_state_free] Freeing atomic state 137282e5 [ 20.313015] [drm:drm_atomic_state_init] Allocated atomic state 7a3ce092 [ 20.313041] [drm:drm_mode_object_get] OBJ ID: 35 (2) [ 20.313054] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-0] 619bc50a state to 7a3ce092 [ 20.313074] [drm:drm_mode_object_get] OBJ ID: 36 (1) [ 20.313085] [drm:drm_atomic_get_crtc_state] Added [CRTC:32:tilcdc crtc] 449ea27e state to 7a3ce092 [ 20.313113] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:31:plane-0] state 619bc50a [ 20.313134] [drm:drm_mode_object_get] OBJ ID: 35 (3) [ 20.313144] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4) [ 20.313157] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:32:tilcdc crtc] to 7a3ce092 [ 20.313181] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 20.313192] [drm:drm_mode_object_get] OBJ ID: 34 (5) [ 20.313200] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34:HDMI-A-1] 238f4049 state to 7a3ce092 [ 20.313217] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (5) [ 20.313229] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state 238f4049 to [NOCRTC] [ 20.313245] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 20.313256] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state 238f4049 to [CRTC:32:tilcdc crtc] [ 20.313272] [drm:drm_atomic_check_only] checking 7a3ce092 [ 20.313300] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 20.313318] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 20.313335] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to 7a3ce092 [ 20.313350] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to 7a3ce092 [ 20.313378] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 20.313388] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 20.313401] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to 7a3ce092 [ 20.313415] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to 7a3ce092 [ 20.313430] [drm:drm_atomic_commit] committing 7a3ce092 [ 20.313478] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: hwmode: htotal 1312, vtotal 622, vdisplay 600 [ 20.313502] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: clock 48924 kHz framedur 16680238 linedur 26817 [ 20.329135] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=2, diff=1, hw=0 hw_last=0 [ 20.329337] [drm:drm_atomic_state_default_clear] Clearing atomic state 7a3ce092 [ 20.329382] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (5) [ 20.329396] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (4) [ 20.329408] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (2) [ 20.329422] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3) [ 20.329434] [drm:__drm_atomic_state_free] Freeing atomic state 7a3ce092 [ 20.333187] tilcdc 4830e000.lcdc: [drm] fb0: tilcdcdrmfb frame buffer device [ 20.345809] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=3, diff=1, hw=0 hw_last=0 [ 20.362498] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=4, diff=1, hw=0 hw_last=0 [ 20.379177] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=5, diff=1, hw=0 hw_last=0 [ 20.395852] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=6, diff=1, hw=0 hw_last=0 ... ... ... [ 22.130633] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=110, diff=1, hw=0 hw_last=0 [ 22.147314] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=111, diff=1, hw=0 hw_last=0 [ 22.163988] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=112, diff=1, hw=0 hw_last=0 [ 22.177763] [drm:drm_atomic_state_init] Allocated atomic state be4a2d3c [ 22.177833] [drm:drm_mode_object_get] OBJ ID: 35 (2) [ 22.177851] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-0] 2cbdb05e state to be4a2d3c [ 22.177875] [drm:drm_mode_object_get] OBJ ID: 36 (1) [ 22.177886] [drm:drm_atomic_get_crtc_state] Added [CRTC:32:tilcdc crtc] ddfa9bd9 state to be4a2d3c [ 22.177919] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:31:plane-0] state 2cbdb05e [ 22.177940] [drm:drm_mode_object_get] OBJ ID: 35 (3) [ 22.177951] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4) [ 22.177965] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:32:tilcdc crtc] to be4a2d3c [ 22.177990] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 22.178000] [drm:drm_mode_object_get] OBJ ID: 34 (5) [ 22.178009] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34:HDMI-A-1] d2ab4705 state to be4a2d3c [ 22.178026] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (5) [ 22.178039] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state d2ab4705 to [NOCRTC] [ 22.178055] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 22.178067] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state d2ab4705 to [CRTC:32:tilcdc crtc] [ 22.178083] [drm:drm_atomic_check_only] checking be4a2d3c [ 22.178111] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 22.178131] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 22.178148] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to be4a2d3c [ 22.178164] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to be4a2d3c [ 22.178193] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 22.178204] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 22.178217] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to be4a2d3c [ 22.178232] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to be4a2d3c [ 22.178247] [drm:drm_atomic_commit] committing be4a2d3c [ 22.178297] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: hwmode: htotal 1312, vtotal 622, vdisplay 600 [ 22.178324] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: clock 48924 kHz framedur 16680238 linedur 26817 [ 22.180670] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=113, diff=1, hw=0 hw_last=0 [ 22.184687] [drm:drm_atomic_state_default_clear] Clearing atomic state be4a2d3c [ 22.184763] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (5) [ 22.184788] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (4) [ 22.184801] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (2) [ 22.184814] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3) [ 22.184826] [drm:__drm_atomic_state_free] Freeing atomic state be4a2d3c [ 22.197352] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=114, diff=1, hw=0 hw_last=0 [ 22.214031] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=115, diff=1, hw=0 hw_last=0 [ 22.230706] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=116, diff=1, hw=0 hw_last=0 ... ... ... [ 27.168157] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=412, diff=1, hw=0 hw_last=0 [ 27.184841] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=413, diff=1, hw=0 hw_last=0 [ 27.201518] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=414, diff=1, hw=0 hw_last=0 [ 27.205656] tilcdc 4830e000.lcdc: [drm:vblank_disable_fn] disabling vblank on crtc 0 [ 27.205727] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=415, diff=0, hw=0 hw_last=0 [ 29.925886] [drm:drm_sysfs_hotplug_event] generating hotplug event [ 29.926085] tilcdc 4830e000.lcdc: [drm:drm_fb_helper_hotplug_event.part.0] [ 29.926106] [drm:drm_client_modeset_probe] [ 29.926123] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 29.926148] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:34:HDMI-A-1] [ 29.959675] tilcdc 4830e000.lcdc: [drm:connector_bad_edid] HDMI-A-1: EDID is invalid: [ 29.963121] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@60 with pixel clock 48924 [ 29.963294] [drm:tilcdc_crtc_mode_valid] Processing mode 800x600@60 with pixel clock 40000 [ 29.963373] [drm:tilcdc_crtc_mode_valid] Processing mode 800x600@56 with pixel clock 36000 [ 29.963449] [drm:tilcdc_crtc_mode_valid] Processing mode 848x480@60 with pixel clock 33750 [ 29.963523] [drm:tilcdc_crtc_mode_valid] Processing mode 640x480@60 with pixel clock 25175 [ 29.963540] [drm:drm_mode_debug_printmodeline] Modeline "1024x768": 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [ 29.963577] [drm:drm_mode_prune_invalid] Not using 1024x768 mode: VIRTUAL_Y [ 29.963597] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:34:HDMI-A-1] probed modes : [ 29.963624] [drm:drm_mode_debug_printmodeline] Modeline "1024x600": 60 48924 1024 1064 1168 1312 600 601 604 622 0x20 0x6 [ 29.963647] [drm:drm_mode_debug_printmodeline] Modeline "800x600": 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [ 29.963669] [drm:drm_mode_debug_printmodeline] Modeline "800x600": 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [ 29.963691] [drm:drm_mode_debug_printmodeline] Modeline "848x480": 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5 [ 29.963712] [drm:drm_mode_debug_printmodeline] Modeline "640x480": 60 25175 640 656 752 800 480 490 492 525 0x40 0xa [ 29.963736] [drm:drm_client_modeset_probe] connector 34 enabled? yes [ 29.963763] [drm:drm_client_modeset_probe] Not using firmware configuration [ 29.963777] [drm:drm_client_modeset_probe] looking for cmdline mode on connector 34 [ 29.963792] [drm:drm_client_modeset_probe] found mode 1024x600 [ 29.963803] [drm:drm_client_modeset_probe] picking CRTCs for 1024x600 config [ 29.963821] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (4) [ 29.963841] [drm:drm_client_modeset_probe] desired mode 1024x600 set on crtc 32 (0,0) [ 29.963855] [drm:drm_mode_object_get] OBJ ID: 34 (3) [ 29.963868] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (4) [ 29.963894] [drm:drm_atomic_state_init] Allocated atomic state ad8ac474 [ 29.963928] [drm:drm_mode_object_get] OBJ ID: 35 (2) [ 29.963941] [drm:drm_atomic_get_plane_state] Added [PLANE:31:plane-0] a6263796 state to ad8ac474 [ 29.963964] [drm:drm_mode_object_get] OBJ ID: 36 (1) [ 29.963976] [drm:drm_atomic_get_crtc_state] Added [CRTC:32:tilcdc crtc] 046f4e63 state to ad8ac474 [ 29.964007] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:31:plane-0] state a6263796 [ 29.964026] [drm:drm_mode_object_get] OBJ ID: 35 (3) [ 29.964038] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4) [ 29.964054] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:32:tilcdc crtc] to ad8ac474 [ 29.964076] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 29.964087] [drm:drm_mode_object_get] OBJ ID: 34 (5) [ 29.964098] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:34:HDMI-A-1] 85b83196 state to ad8ac474 [ 29.964116] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (5) [ 29.964130] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state 85b83196 to [NOCRTC] [ 29.964149] [drm:drm_mode_object_get] OBJ ID: 34 (4) [ 29.964162] tilcdc 4830e000.lcdc: [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:34:HDMI-A-1] state 85b83196 to [CRTC:32:tilcdc crtc] [ 29.964181] [drm:drm_atomic_check_only] checking ad8ac474 [ 29.964208] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 29.964227] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 29.964245] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to ad8ac474 [ 29.964263] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to ad8ac474 [ 29.964294] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:34:HDMI-A-1] [ 29.964308] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:34:HDMI-A-1] keeps [ENCODER:33:None-33], now on [CRTC:32:tilcdc crtc] [ 29.964323] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to ad8ac474 [ 29.964339] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:33:None-33] to ad8ac474 [ 29.964356] [drm:drm_atomic_commit] committing ad8ac474 [ 29.964407] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: hwmode: htotal 1312, vtotal 622, vdisplay 600 [ 29.964437] tilcdc 4830e000.lcdc: [drm:drm_calc_timestamping_constants] crtc 32: clock 48924 kHz framedur 16680238 linedur 26817 [ 29.964478] tilcdc 4830e000.lcdc: [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 [ 29.964503] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=415, diff=0, hw=0 hw_last=0 [ 29.970484] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=415, diff=1, hw=0 hw_last=0 [ 29.972543] [drm:drm_atomic_state_default_clear] Clearing atomic state ad8ac474 [ 29.972623] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (5) [ 29.972649] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (4) [ 29.972663] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (2) [ 29.972678] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3) [ 29.972691] [drm:__drm_atomic_state_free] Freeing atomic state ad8ac474 [ 29.972722] tilcdc 4830e000.lcdc: [drm:drm_client_dev_hotplug] fbdev: ret=0 [ 29.987173] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=416, diff=1, hw=0 hw_last=0 [ 30.003862] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=417, diff=1, hw=0 hw_last=0 ... ... ... [ 35.008017] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=717, diff=1, hw=0 hw_last=0 [ 35.024703] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=718, diff=1, hw=0 hw_last=0 [ 35.041378] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=719, diff=1, hw=0 hw_last=0 [ 35.045664] tilcdc 4830e000.lcdc: [drm:vblank_disable_fn] disabling vblank on crtc 0 [ 35.045714] tilcdc 4830e000.lcdc: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=720, diff=0, hw=0 hw_last=0
LOGS
root@modSmartCD300 ~ # ls /sys/bus/i2c/devices/1-0039/ consumer:platform:panel of_node supplier:regulator:regulator.6 driver power supplier:regulator:regulator.7 modalias subsystem uevent name supplier:i2c:0-0024 root@modSmartCD300 ~ # cat /sys/bus/i2c/devices/1-0039/name adv7513 root@modSmartCD300 ~ # modinfo adv7511 filename: /lib/modules/5.15.43/kernel/drivers/gpu/drm/bridge/adv7511/adv7511.ko license: GPL description: ADV7511 HDMI transmitter driver author: Lars-Peter Clausen <lars@metafoo.de> alias: i2c:adv7535 alias: i2c:adv7533 alias: i2c:adv7513 alias: i2c:adv7511w alias: i2c:adv7511 alias: of:N*T*Cadi,adv7535C* alias: of:N*T*Cadi,adv7535 alias: of:N*T*Cadi,adv7533C* alias: of:N*T*Cadi,adv7533 alias: of:N*T*Cadi,adv7513C* alias: of:N*T*Cadi,adv7513 alias: of:N*T*Cadi,adv7511wC* alias: of:N*T*Cadi,adv7511w alias: of:N*T*Cadi,adv7511C* alias: of:N*T*Cadi,adv7511 depends: intree: Y name: adv7511 vermagic: 5.15.43 SMP mod_unload ARMv7 p2v8 root@modSmartCD300 ~ # cat /sys/class/drm/card0/*/modes 1024x600 800x600 800x600 848x480 640x480 root@modSmartCD300 ~ # cat /sys/class/graphics/fb0/virtual_size 1024,600 root@modSmartCD300 ~ # cat /sys/class/graphics/fb0/bits_per_pixel 16 root@modSmartCD300 ~ # cat /sys/class/graphics/fb0/stride 2048 root@modSmartCD300 ~ # modetest -M tilcdc -c Connectors: id encoder status name size (mm) modes encoders 34 33 connected HDMI-A-1 0x0 6 33 modes: index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot #0 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver #1 1024x600 59.95 1024 1064 1168 1312 600 601 604 622 48924 flags: nhsync, pvsync; type: userdef #2 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver #3 800x600 56.25 800 824 896 1024 600 601 603 625 36000 flags: phsync, pvsync; type: driver #4 848x480 60.00 848 864 976 1088 480 486 494 517 33750 flags: phsync, pvsync; type: driver #5 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver props: 1 EDID: flags: immutable blob blobs: value: 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 0 5 link-status: flags: enum enums: Good=0 Bad=1 value: 0 6 non-desktop: flags: immutable range values: 0 1 value: 0 4 TILE: flags: immutable blob blobs: value: root@modSmartCD300 ~ # ls /dev/fb* /dev/fb0
DSP0_VSYNC
DSP0_HSYNC
DSP0_DE
DSP0_CLK
HPD
