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AM625: QSPI boot up

Part Number: AM625

Tool/software:

Hi:

When we test QSPI boot ,the bootrom send 6B(qspi read) command ,but some spi nor flash don't enable QSPI mode when boot up.

For some spi nand flash, before reading parameter page, the bootrom will send B0 resgiter as 0x50,which will enable ECC.But some spi nand flash need disable ECC before reading parameter page.

Can you update bootrom?

  • Hi Tom, sending this to a colleague, please give him a day or two to come back to you.

    thank you,

    Paula

  • Hi Tom,

    I understand from the e2e description of the question, that you want a customized ROM code which adapts to the flash which you are using.

    Currently, the ROM code updates cannot be made. Rather any customization can be done on application/bootloader level, which is using the MCU+ SDK kit. So the current suggestion is to read TRM on how booting happens and what commands are sent, based on which the flash is decided.

    Also take into account the following: 

    Many QSPI Flashes requires has QE bit, or the Quad Enable Bit. This is an important factor to consider as ROM does not set the QE bit.

    One more thing to take care of is, in QSPI bootmode 3 byte address is required to be sent out and not 4 byte. Same follows for SPI bootmode.

    So, suppose you are at application level and currently your flash is operating in 3 byte addressing mode. At a certain point if it is made to work in 4 byte addressing mode, then when you exit the application the flash might be left in 4 byte addressing mode.

    And then when you try to boot from this same flash the next time, it will not boot, as 3 byte addressing is required but the flash was previously left in 4 byte addressing.

    So, a good practise, is to make sure before booting, we need to make sure flash is in 3 byte addressing mode.

    Thanks,

    Vaibhav