SK-AM62-LP: LPM UART AWAKE in SK-AM62-LP sample

Hello,

Does this also occur with using RTC as the wakeup source?

Please share any changes made to the device tree and the MCU IPC firmware.

MCU UART wakeup is handled by the MCU IPC firmware.

Thanks,

Anshu

Hi, There is no changes, the binary is original download from TI website. Currently, i'm only using prebuild image and binary. How to make RTC as the wakeup source. Is it like the example LPM DMTimer Wakeup?

Hi Anshu,

I found some guideline for RTC as wakeup source and the result is in the picture below. It still not wake up and reset the system after around 2-3min.

Any advises

Hi Anshu, 

Can you provide this file k3-am625-sk-lpmdemo.dtb ?

Thanks,
CWL

Hi Anshu,

Alternative way, can you please provide me all the required .appimage (m4, r5, a53, linux), either methods load by uart_bootloder.py python script or flash NOR/NAND by uart_uniflash.py) python script into SK-AM62-LP and linux command to make either deep-sleep or mcu-only LPM mode to work?

Please advise or suggest alternative way if you have any ideas. Thanks.

Best Regards,
CWL

hi Anshu,

I'm also trying to graceful shutdown of remote core from Linux. But it seems the remote core M4 is not response to the echo stop > /sys/class/remoteproc/remoteproc0/state command from Linux. Log as below. Do you have any hints to help?

Hello,

CWL said:

I found some guideline for RTC as wakeup source and the result is in the picture below. It still not wake up and reset the system after around 2-3min.

This information is from an old SDK version. Please use the SDK documentation for your version: https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/11_00_09_04/exports/docs/linux/Foundational_Components/Power_Management/pm_low_power_modes.html

CWL said:

Currently, i'm only using prebuild image and binary

Which Image are you using? The default image or something else?

Can you clarify you are using SBL or SPL boot? LPMs are not support with SBL boot.

Thanks,

Anshu

Hi Anshu,

Is there any expected current consumption for all the available low power mode of SK-am62-lP?

Hi Anshu, 

Currently my evk is a GP devices. As following the link provided above, there is a limitation in GP devices.


But I have a FATAL response as picture below. Any advise ?

Hello,

I'm not sure if LPMs have been tested with GP devices. I'll need to check internally and get back to you.

Please refer to the AM62x Power Consumption App Note for information about power consumption: https://www.ti.com/lit/an/spradg1/spradg1.pdf

Partial I/O mode will be < 1mW power consumption. 

Thanks,

Anshu

Hello,

The latest SDKs don't support GP silicon anymore so we haven't tested LPMs with GP silicon.

There was a known bug with LPMs with GP silicon a few years ago that was patched with this commit: https://github.com/OP-TEE/optee_os/commit/31b38740db7f78bcd11b62e19a16fb4fcab64b03

You can try adding this patch and re-building the OPTEE but there is limited support we can provide.

Thanks,

Anshu

Hi Anshu,

Ok, thanks for the verifications. But I don't have the capability to build linux here. Can you help to do the patching and give me the binary for SPL boot?

What is secure stub as showing in picture below, is it TIFS?

Hello,

Yes, the secure stub is the TIFS stub.

For GP silicon, I don't have a proper way to check if its working on my end. I'll need to look into it and get back to you in a few days.

Thanks,

Anshu

Hi Anshu, 

Ok thanks.

On the other hands, it seems another question thread of mine is locked maybe because long time no update. Actually, I still have some question from there.

As mentioned from that question thread, my final objective is to develop low power mode test by using bare metal code running in the R5 core only. From the sample code study, I have put the dm_stub code under TCM memory regions. But I noticed the code stucked (not able to read/write certain register mentioned by the code) somewhere when the code stucked somewhere in disable_main_lpsc() code, where psc_raw_lpsc_set_state is trying to set certain lpsc into disable mode. 

Some background of the bare metal as below:
1) Receive and respond test command via UART.
2) From command received in UART, I will trigger Sciclient_service() for TISCI_MSG_PREPARE_SLEEP first and TISCI_MSG_ENTER_SLEEP afterward.

My current focus is to achieve mW power consumption in our testing sample first, only afterward consider how to wake it up.

Do you see this is viable? 

Please let me know if you need further explanation, I would like to have meeting if you are available.

Hello,

Just to keep expectations clear, a baremetal implementation of low power modes is beyond the support scope of the TI E2E forums.

The existing DM code is created with the assumption that the A53 cores are running Linux and Linux will be the initiator for low power mode entry.

Regarding the other query, GP silicon has not been tested with low power modes in any recent SDK revisions. You can try to use the tiboot3.bin binary used for GP silicon. It already comes with the .wic image.

Best Regards,

Anshu

Hi Anshu,

Yes, I understand my study and approach is not something provided as a sample from TI. I believe this is also an unknown area for TI also whether this approach can work or not.

From the theory, if device manager dm_stub can enter and exit lpm mode, R5 itself should be able to trigger itself to enter and exit sleep without another core as power initiator (with some fixed definition in R5 core code). I just hope can get some guidance to make this test work, or until I get a straight 100% reason that this approach or this direction is not going to work (like without sci, the a53 and mcu m4 core will not shut down properly). So far, I just getting answer like it should or might be working. Like in this thread: AM625: Low Power Mode - Bosch Sitara MPU Forum - Bosch - TI Automotive Processors - TI E2E support forums

From our custom code, we are also using SBL boot from EMMC. But we didnt boot up the a53 and mcu code, so it should stay in power up state only without initialise, the r5 core alone should be able to power off the power sleep controller of all other cores. Correct me if I'm wrong.

I renamed and tested the tiboot3.bin that provided from .wic image, it is not working as mentioned above in this ticket. Nevermind, I will stop checking on the GP device and do more test in another AM62x HS-FS versions. 

Thanks for the answering. 

Best Regards,
CWL

Hi CWL,

CWL said:

But we didnt boot up the a53 and mcu code, so it should stay in power up state only without initialise, the r5 core alone should be able to power off the power sleep controller of all other cores.

This is possibly true, but it has not been validated by TI.

Thanks,

Anshu