Tool/software:
I am currently using our company's custom board. Now I need to debug the LVDS panel. At first, I had already debugged it in SDK 11.00.00.08. However, the customer requested to use SDK 10.00.00.08. But I found that the same DSS configuration would cause problems.
[ 1.161559] tidss 30200000.dss: failed to init OLDI: -517
[ 1.202241] davinci_mdio 8000f00.mdio: davinci mdio revision 17.7, bus freq 1000000
[ 1.210891] davinci_mdio 8000f00.mdio: phy[0]: device 8000f00.mdio:00, driver unknown
[ 1.218767] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA01903, cpsw version 0x6BA81903 Ports: 3 quirks:00000006
[ 1.231740] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.5
[ 1.238867] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512
[ 1.245348] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010d, freq:500000000, add_val:1 pps:0
[ 1.258772] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 19
[ 1.269083] input: pwm-beeper as /devices/platform/pwm-beeper/input/input0
[ 1.277592] mmc0: CQHCI version 5.10
[ 1.277869] mmc1: CQHCI version 5.10
[ 1.291777] tidss 30200000.dss: failed to init OLDI: -517
[ 1.300354] tidss 30200000.dss: failed to init OLDI: -517
[ 1.308382] tidss 30200000.dss: failed to init OLDI: -517
[ 1.314758] debugfs: Directory 'pd:244' with parent 'pm_genpd' already present!
[ 1.321241] mmc0: SDHCI controller on fa10000.mmc [fa10000.mmc] using ADMA 64-bit
[ 1.323309] debugfs: Directory 'pd:182' with parent 'pm_genpd' already present!
[ 1.329549] mmc1: SDHCI controller on fa00000.mmc [fa00000.mmc] using ADMA 64-bit
[ 1.336838] debugfs: Directory 'pd:182' with parent 'pm_genpd' already present!
[ 1.338529] power_cut_probe sucess !
[ 1.344991] tidss 30200000.dss: failed to init OLDI: -517
[ 1.351925] clk: Disabling unused clocks
[ 1.358281] tidss 30200000.dss: failed to init OLDI: -517
Then I discovered that the functions in the driver were different. In SDK 10.00.00.08, the following function was problematic.
drm_of_find_panel_or_bridge(child, OLDI_OURPUT_PORT, -1,&panel, &bridge);
And in 11.00.00.08, the following function is used.
devm_drm_of_get_bridge(tidss->dev, child,OLDI_OURPUT_PORT, 0);
So I would like to know how I should configure it at 10.00.00.08?
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree file for the J722S EVM
* Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
*
* Schematics: https://www.ti.com/lit/zip/sprr495
*/
/dts-v1/;
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy.h>
#include "k3-j722s.dtsi"
#include "k3-serdes.h"
/ {
compatible = "ti,j722s-evm", "ti,j722s";
model = "6K15";
aliases {
serial0 = &wkup_uart0;
serial2 = &main_uart0;
serial3 = &main_uart5;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
};
chosen {
stdout-path = &main_uart0;
};
memory@80000000 {
/* 8G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000001 0x80000000>;
device_type = "memory";
bootph-all;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global cma region */
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x00 0x38000000>;
linux,cma-default;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1000000 0x00 0x100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1100000 0x00 0xf00000>;
no-map;
};
main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2100000 0x00 0xf00000>;
no-map;
};
c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3000000 0x00 0x100000>;
no-map;
};
c7x_0_memory_region: c7x-memory@a3100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3100000 0x00 0xf00000>;
no-map;
};
c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa4000000 0x00 0x100000>;
no-map;
};
c7x_1_memory_region: c7x-memory@a4100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa4100000 0x00 0xf00000>;
no-map;
};
rtos_ipc_memory_region: ipc-memories@a5000000 {
reg = <0x00 0xa5000000 0x00 0x1c00000>;
alignment = <0x1000>;
no-map;
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vsys_5v0: regulator-vsys5v0 {
/* Output of LM5140 */
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: regulator-mmc1 {
/* TPS22918DBVR */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
//gpio = <&exp1 15 GPIO_ACTIVE_HIGH>;
bootph-all;
};
vdd_sd_dv: regulator-TLV71033 {
compatible = "regulator-gpio";
regulator-name = "tlv71033";
//pinctrl-names = "default";
//pinctrl-0 = <&vdd_sd_dv_pins_default>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
vin-supply = <&vsys_5v0>;
//gpios = <&main_gpio0 70 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
};
vcc_3v3_aud: regulator-vcc3v3 {
/* Output of LM5140 */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vsys_io_1v8: regulator-vsys-io-1v8 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vsys_io_1v2: regulator-vsys-io-1v2 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
leds: leds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&run_led_pins_default>;
compatible = "gpio-leds";
run {
label = "run";
gpios = <&main_gpio1 49 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
pwm-beeper {
status = "okay";
compatible = "pwm-beeper";
pwms = <&epwm0 0 100000 0>;
amp-supply = <&vsys_5v0>;
beeper-hz = <100000>;
};
power_cut {
status = "okay";
compatible = "cotrust,power";
pinctrl-names = "default";
pinctrl-0 = <&pwr_pins_default>;
irq = <&main_gpio1 31 GPIO_ACTIVE_LOW>;
};
lvds_backlight: lvds_backlight {
status = "disabled";
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&lvds_bl_en_pins_default>;
pwms = <&epwm1 0 1000000 1000000>;
brightness-levels = <0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>;
default-brightness-level = <20>;
enable-gpios = <&main_gpio1 7 GPIO_ACTIVE_HIGH>;
};
edp_backlight: edp_backlight {
status = "okay";
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&edp_bl_en_pins_default>;
pwms = <&epwm2 0 1000000 1000000>;
brightness-levels = <0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>;
default-brightness-level = <20>;
enable-gpios = <&main_gpio0 43 GPIO_ACTIVE_HIGH>;
};
display {
compatible = "ct,inc15", "panel-simple";
backlight = <&edp_backlight>;
/*
* Note that the OLDI TX 0 transmits the odd set of pixels
* while the OLDI TX 1 transmits the even set. This is a
* fixed configuration in the IP integration and is not
* changeable. The properties, "dual-lvds-odd-pixels" and
* "dual-lvds-even-pixels" have been used to merely
* identify if a Dual Link configuration is required.
* Swapping them will cause an error in the dss oldi driver.
*/
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-odd-pixels;
lcd_in0: endpoint {
remote-endpoint = <&oldi0_dss0_out>;
};
};
port@1 {
reg = <1>;
dual-lvds-even-pixels;
lcd_in1: endpoint {
remote-endpoint = <&oldi1_dss0_out>;
};
};
};
};
// hdmi0: connector-hdmi {
// compatible = "hdmi-connector";
// label = "hdmi";
// type = "a";
// port {
// hdmi_connector_in: endpoint {
// remote-endpoint = <&sii9022_out>;
// };
// };
// };
// transceiver0: can-phy0 {
// compatible = "ti,tcan1042";
// #phy-cells = <0>;
// max-bitrate = <5000000>;
// pinctrl-names = "default";
// pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
// standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>;
// };
// transceiver1: can-phy1 {
// compatible = "ti,tcan1042";
// #phy-cells = <0>;
// max-bitrate = <5000000>;
// };
// transceiver2: can-phy2 {
// compatible = "ti,tcan1042";
// #phy-cells = <0>;
// max-bitrate = <5000000>;
// standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>;
// };
// codec_audio: sound {
// compatible = "simple-audio-card";
// simple-audio-card,name = "J722S-EVM";
// simple-audio-card,widgets =
// "Headphone", "Headphone Jack",
// "Line", "Line In",
// "Microphone", "Microphone Jack";
// simple-audio-card,routing =
// "Headphone Jack", "HPLOUT",
// "Headphone Jack", "HPROUT",
// "LINE1L", "Line In",
// "LINE1R", "Line In",
// "MIC3R", "Microphone Jack",
// "Microphone Jack", "Mic Bias";
// simple-audio-card,format = "dsp_b";
// simple-audio-card,bitclock-master = <&sound_master>;
// simple-audio-card,frame-master = <&sound_master>;
// simple-audio-card,bitclock-inversion;
// simple-audio-card,cpu {
// sound-dai = <&mcasp1>;
// };
// sound_master: simple-audio-card,codec {
// sound-dai = <&tlv320aic3106>;
// clocks = <&audio_refclk1>;
// };
// };
};
&main_pmx0 {
/delete-property/ interrupts;
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
>;
bootph-all;
};
main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */
>;
bootph-all;
};
main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
>;
bootph-all;
};
// main_uart5_pins_default: main-uart5-default-pins {
// pinctrl-single,pins = <
// J722S_IOPAD(0x0108, PIN_INPUT, 3) /* (J27) UART5_RXD */
// J722S_IOPAD(0x010c, PIN_OUTPUT, 3) /* (H27) UART5_TXD */
// >;
// };
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
>;
bootph-all;
};
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
>;
bootph-all;
};
mdio_pins_default: mdio-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>;
};
rgmii1_pins_default: rgmii1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */
J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */
J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */
J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */
J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */
J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */
J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */
J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */
J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
>;
};
main_usb1_pins_default: main-usb1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0258, PIN_INPUT, 0) /* (B27) USB1_DRVVBUS */
>;
};
main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0110, PIN_INPUT, 7) /* (G27) MMC2_DAT1.GPIO0_67 */
>;
};
main_dpi_pins_default: main-dpi-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AB23) VOUT0_VSYNC */
J722S_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
J722S_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC26) VOUT0_PCLK */
J722S_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (AC27) VOUT0_DE */
J722S_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (W27) VOUT0_DATA0 */
J722S_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA1 */
J722S_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA2 */
J722S_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W23) VOUT0_DATA3 */
J722S_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA4 */
J722S_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA5 */
J722S_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y26) VOUT0_DATA6 */
J722S_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (Y27) VOUT0_DATA7 */
J722S_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA8 */
J722S_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (AA27) VOUT0_DATA9 */
J722S_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA10 */
J722S_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA11 */
J722S_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA12 */
J722S_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA22) VOUT0_DATA13 */
J722S_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AB26) VOUT0_DATA14 */
J722S_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AB27) VOUT0_DATA15 */
J722S_IOPAD(0x005c, PIN_OUTPUT, 1) /* (U27) GPMC0_AD8.VOUT0_DATA16 */
J722S_IOPAD(0x0060, PIN_OUTPUT, 1) /* (U26) GPMC0_AD9.VOUT0_DATA17 */
J722S_IOPAD(0x0064, PIN_OUTPUT, 1) /* (V27) GPMC0_AD10.VOUT0_DATA18 */
J722S_IOPAD(0x0068, PIN_OUTPUT, 1) /* (V25) GPMC0_AD11.VOUT0_DATA19 */
J722S_IOPAD(0x006c, PIN_OUTPUT, 1) /* (V26) GPMC0_AD12.VOUT0_DATA20 */
J722S_IOPAD(0x0070, PIN_OUTPUT, 1) /* (V24) GPMC0_AD13.VOUT0_DATA21 */
J722S_IOPAD(0x0074, PIN_OUTPUT, 1) /* (V22) GPMC0_AD14.VOUT0_DATA22 */
J722S_IOPAD(0x0078, PIN_OUTPUT, 1) /* (V23) GPMC0_AD15.VOUT0_DATA23 */
J722S_IOPAD(0x009c, PIN_OUTPUT, 1) /* (W26) GPMC0_WAIT1.VOUT0_EXTPCLKIN */
>;
};
main_mcan0_pins_default: main-mcan0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x1dc, PIN_INPUT, 0) /* (C22) MCAN0_RX */
J722S_IOPAD(0x1d8, PIN_OUTPUT, 0) /*(D22) MCAN0_TX */
>;
};
main_mcasp1_pins_default: main-mcasp1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */
J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */
J722S_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */
J722S_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */
>;
};
audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (N24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */
>;
};
run_led_pins_default: run-led-pins-default {
pinctrl-single,pins = <
J722S_IOPAD(0x0244, PIN_INPUT, 7) /* (A24) MMC1_SDWP.GPIO1_49 */
>;
};
epwm0_pins_defaults: epwm0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0108, PIN_OUTPUT, 4) /* (J27) MMC2_DAT3.EHRPWM0_A */
>;
};
pwr_pins_default: pwr-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x01f4, PIN_INPUT, 7) /* (D16) EXTINTn.GPIO1_31 */
>;
};
lvds_bl_en_pins_default: lvds_bl_en_pins_default{
pinctrl-sissngle,pins = <
J722S_IOPAD(0x0194, PIN_OUTPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */
>;
};
lvds_bl_epwm1_pins_default: lvds_bl_epwm1_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x0110, PIN_OUTPUT, 4) /* (G27) MMC2_DAT1.EHRPWM1_A */
>;
};
edp_bl_en_pins_default: edp_bl_en_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x00b0, PIN_OUTPUT, 7) /* (P22) GPMC0_CSn2.GPIO0_43 */
>;
};
edp_bl_epwm2_pins_default: edp_bl_epwm2_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x0124, PIN_INPUT, 4) /* (F26) MMC2_SDCD.EHRPWM2_A */
>;
};
oldi0_pins_default: oldi0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AF23) OLDI0_A0N */
J722S_IOPAD(0x025c, PIN_OUTPUT, 0) /* (AG24) OLDI0_A0P */
J722S_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AG22) OLDI0_A1N */
J722S_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AG23) OLDI0_A1P */
J722S_IOPAD(0x0270, PIN_OUTPUT, 0) /* (AB20) OLDI0_A2N */
J722S_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AB21) OLDI0_A2P */
J722S_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AG20) OLDI0_A3N */
J722S_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AG21) OLDI0_A3P */
J722S_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AD21) OLDI0_A4N */
J722S_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC21) OLDI0_A4P */
J722S_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AF19) OLDI0_A5N */
J722S_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AF18) OLDI0_A5P */
J722S_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AG17) OLDI0_A6N */
J722S_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AG18) OLDI0_A6P */
J722S_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AB19) OLDI0_A7N */
J722S_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AA20) OLDI0_A7P */
J722S_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AF21) OLDI0_CLK0N */
J722S_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE20) OLDI0_CLK0P */
J722S_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AD20) OLDI0_CLK1N */
J722S_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AE19) OLDI0_CLK1P */
>;
};
};
&cpsw3g {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins_default>;
};
&cpsw3g_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw_port2 {
status = "disabled";
};
&main_gpio1 {
status = "okay";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
status = "okay";
bootph-all;
};
&main_uart5 {
// pinctrl-names = "default";
// pinctrl-0 = <&main_uart5_pins_default>;
status = "reserved";
};
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */
J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */
J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */
J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */
>;
bootph-all;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (C7) WKUP_I2C0_SCL */
J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_I2C1_SDA */
>;
bootph-all;
};
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */
J722S_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (B2) MCU_MCAN0_TX */
>;
};
mcu_mcan1_pins_default: mcu-mcan1-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */
J722S_MCU_IOPAD(0x03C, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */
>;
};
mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x0030, PIN_OUTPUT, 7) /* (C3) MCU_GPIO0_12 */
>;
};
mcu_lt8911ex_pins_default: mcu-lt8911ex-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x004c, PIN_OUTPUT, 7) /* (B9) WKUP_I2C0_SCL.MCU_GPIO0_19 */
>;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by Device Manager firmware */
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
status = "reserved";
bootph-all;
};
&wkup_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
status = "disabled";
bootph-all;
};
&k3_clks {
/* Configure AUDIO_EXT_REFCLK1 pin as output */
pinctrl-names = "default";
pinctrl-0 = <&audio_ext_refclk1_pins_default>;
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default
&mcu_lt8911ex_pins_default>;
clock-frequency = <400000>;
status = "okay";
bootph-all;
lt8911ex@29 {
compatible = "lontium,lt8911ex";
reg = <0x29>;
//power-gpio = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>;
reset-gpio = <&mcu_gpio0 19 GPIO_ACTIVE_HIGH>;
lontium,pclk = <148500000>;
lontium,hact = <1920>;
lontium,vact = <1080>;
lontium,hbp = <192>;
lontium,hfp = <48>;
lontium,vbp = <71>;
lontium,vfp = <3>;
lontium,hs = <32>;
lontium,vs = <6>;
lontium,mipi_lane = <4>;
lontium,lane_cnt = <2>;
lontium,color = <1>; //Color Depth 0:6bit 1:8bit
lontium,test = <0>;
};
rtc0: rtc-pcf8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
#clock-cells = <0>;
};
};
&main_i2c1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <100000>;
// sii9022: bridge-hdmi@3b {
// compatible = "sil,sii9022";
// reg = <0x3b>;
// interrupt-parent = <&exp2>;
// interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
// #sound-dai-cells = <0>;
// sil,i2s-data-lanes = < 0 >;
// hdmi_tx_ports: ports {
// #address-cells = <1>;
// #size-cells = <0>;
// /*
// * HDMI can be serviced with 3 potential VPs -
// * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1).
// * For now, we will service it with DSS1 VP0.
// */
// port@0 {
// reg = <0>;
// sii9022_in: endpoint {
// remote-endpoint = <&dss1_dpi0_out>;
// };
// };
// port@1 {
// reg = <1>;
// sii9022_out: endpoint {
// remote-endpoint = <&hdmi_connector_in>;
// };
// };
// };
// };
};
&main_i2c2 {
status = "disabled";
clock-frequency = <400000>;
};
&ospi0 {
status = "disabled";
};
&sdhci0 {
disable-wp;
bootph-all;
ti,driver-strength-ohm = <50>;
status = "okay";
};
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
status = "okay";
bootph-all;
};
&mailbox0_cluster0 {
status = "okay";
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
status = "okay";
mbox_mcu_r5_0: mbox-mcu-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster2 {
status = "okay";
mbox_c7x_0: mbox-c7x-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster3 {
status = "okay";
mbox_main_r5_0: mbox-main-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
mbox_c7x_1: mbox-c7x-1 {
ti,mbox-rx = <2 0 0>;
ti,mbox-tx = <3 0 0>;
};
};
&main_timer0 {
status = "reserved";
};
&main_timer1 {
status = "reserved";
};
&main_timer2 {
status = "reserved";
};
&wkup_r5fss0 {
status = "okay";
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_r5fss0 {
status = "okay";
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&main_r5fss0 {
status = "okay";
};
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&c7x_0 {
status = "okay";
mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
memory-region = <&c7x_0_dma_memory_region>,
<&c7x_0_memory_region>;
};
&c7x_1 {
status = "okay";
mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
memory-region = <&c7x_1_dma_memory_region>,
<&c7x_1_memory_region>;
};
&serdes_ln_ctrl {
idle-states = <J722S_SERDES0_LANE0_USB>,
<J722S_SERDES1_LANE0_PCIE0_LANE0>;
};
&serdes0 {
status = "okay";
serdes0_usb_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
resets = <&serdes_wiz0 1>;
};
};
&serdes1 {
serdes1_pcie_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz1 1>;
};
};
&usbss0 {
ti,vbus-divider;
status = "okay";
};
&usb0 {
dr_mode = "otg";
usb-role-switch;
};
&usbss1 {
pinctrl-names = "default";
pinctrl-0 = <&main_usb1_pins_default>;
ti,vbus-divider;
status = "okay";
};
&usb1 {
dr_mode = "host";
maximum-speed = "super-speed";
phys = <&serdes0_usb_link>;
phy-names = "cdns3,usb3-phy";
};
&pcie0_rc {
status = "disabled";
// reset-gpios = <&exp1 18 GPIO_ACTIVE_HIGH>;
// phys = <&serdes1_pcie_link>;
// phy-names = "pcie-phy";
};
&dss1 {
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&main_dpi_pins_default>;
// clocks = <&k3_clks 232 8>,
// <&k3_clks 232 0>,
// <&k3_clks 232 4>;
// assigned-clocks = <&k3_clks 241 0>, /* DSS1-VP0 */
// <&k3_clks 240 0>, /* DSS1-VP1 */
// <&k3_clks 245 0>; /* DPI Output */
// assigned-clock-parents = <&k3_clks 241 2>, /* PLL 17 HDMI */
// <&k3_clks 240 1>, /* PLL 18 DSI */
// <&k3_clks 245 2>; /* DSS1-DPI0 */
};
&dss1_ports {
// /* DSS1-VP0: DPI/HDMI Output */
// port@0 {
// reg = <0>;
// // dss1_dpi0_out: endpoint {
// // remote-endpoint = <&sii9022_in>;
// // };
// };
};
&mcu_mcan0 {
status = "disabled";
// pinctrl-names = "default";
// pinctrl-0 = <&mcu_mcan0_pins_default>;
// phys = <&transceiver0>;
};
&mcu_mcan1 {
status = "disabled";
// pinctrl-names = "default";
// pinctrl-0 = <&mcu_mcan1_pins_default>;
// phys = <&transceiver1>;
};
&main_mcan0 {
status = "disabled";
// pinctrl-names = "default";
// pinctrl-0 = <&main_mcan0_pins_default>;
// phys = <&transceiver2>;
};
&mcu_gpio0 {
status = "okay";
};
&mcasp1 {
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcasp1_pins_default>;
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 2 0
0 0 0 0
0 0 0 0
0 0 0 0
>;
};
&main_conf {
audio_refclk1: clock@82e4 {
compatible = "ti,am62-audio-refclk";
reg = <0x82e4 0x4>;
clocks = <&k3_clks 157 18>;
assigned-clocks = <&k3_clks 157 18>;
assigned-clock-parents = <&k3_clks 157 33>;
#clock-cells = <0>;
};
};
&epwm0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&epwm0_pins_defaults>;
};
&dss0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&oldi0_pins_default>;
};
&oldi0_dss0 {
status = "okay";
};
&oldi1_dss0 {
status = "okay";
};
&oldi0_dss0_ports {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi0_dss0_in: endpoint {
remote-endpoint = <&dss0_dpi0_out0>;
};
};
port@1 {
reg = <1>;
oldi0_dss0_out: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
};
&oldi1_dss0_ports {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi1_dss0_in: endpoint {
remote-endpoint = <&dss0_dpi0_out1>;
};
};
port@1 {
reg = <1>;
oldi1_dss0_out: endpoint {
remote-endpoint = <&lcd_in1>;
};
};
};
&dss0_ports {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* VP1: Output to OLDI */
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dss0_dpi0_out0: endpoint@0 {
reg = <0>;
remote-endpoint = <&oldi0_dss0_in>;
};
dss0_dpi0_out1: endpoint@1 {
reg = <1>;
remote-endpoint = <&oldi1_dss0_in>;
};
};
};
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree file for the J722S EVM
* Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
*
* Schematics: https://www.ti.com/lit/zip/sprr495
*/
/dts-v1/;
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy.h>
#include "k3-j722s.dtsi"
#include "k3-serdes.h"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "ti,j722s-evm", "ti,j722s";
model = "6K15";
aliases {
serial0 = &wkup_uart0;
serial2 = &main_uart0;
serial3 = &main_uart5;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
usb0 = &usb0;
usb1 = &usb1;
};
chosen {
stdout-path = &main_uart0;
};
memory@80000000 {
/* 8G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000001 0x80000000>;
device_type = "memory";
bootph-pre-ram;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global cma region */
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x00 0x38000000>;
linux,cma-default;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1000000 0x00 0x100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1100000 0x00 0xf00000>;
no-map;
};
main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2100000 0x00 0xf00000>;
no-map;
};
c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3000000 0x00 0x100000>;
no-map;
};
c7x_0_memory_region: c7x-memory@a3100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3100000 0x00 0xf00000>;
no-map;
};
c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa4000000 0x00 0x100000>;
no-map;
};
c7x_1_memory_region: c7x-memory@a4100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa4100000 0x00 0xf00000>;
no-map;
};
rtos_ipc_memory_region: ipc-memories@a5000000 {
reg = <0x00 0xa5000000 0x00 0x1c00000>;
alignment = <0x1000>;
no-map;
};
};
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vsys_5v0: regulator-vsys5v0 {
/* Output of LM5140 */
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vmain_pd>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: regulator-mmc1 {
/* TPS22918DBVR */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
bootph-all;
};
vdd_sd_dv: regulator-TLV71033 {
compatible = "regulator-gpio";
regulator-name = "tlv71033";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
vin-supply = <&vsys_5v0>;
states = <1800000 0x0>,
<3300000 0x1>;
};
vsys_io_3v3: regulator-vsys-io-3v3 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vsys_io_1v8: regulator-vsys-io-1v8 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vsys_io_1v2: regulator-vsys-io-1v2 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
leds: leds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&run_led_pins_default
&main_usb0_pins_default
&main_usb1_pins_default
&mcu_usb1_reset_pins_default
&wifi_en_pins_default
&mcu_eqep1_led_pins_default>;
compatible = "gpio-leds";
run {
label = "run";
gpios = <&main_gpio1 49 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
usb0-drvvbus {
label = "usb0-drvvbus";
gpios = <&main_gpio1 50 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
usb1-drvvbus {
label = "usb1-drvvbus";
gpios = <&main_gpio1 51 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
usb1-rst {
label = "usb1-rst";
gpios = <&mcu_gpio0 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
wifi-en {
label = "wifi-en";
gpios = <&mcu_gpio0 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
blue {
label = "blue";
gpios = <&mcu_gpio0 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
green {
label = "green";
gpios = <&mcu_gpio0 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
red {
label = "red";
gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
default-state = "on";
};
};
// codec_audio: sound {
// compatible = "simple-audio-card";
// simple-audio-card,name = "J722S-EVM";
// simple-audio-card,widgets =
// "Headphone", "Headphone Jack",
// "Line", "Line In",
// "Microphone", "Microphone Jack";
// simple-audio-card,routing =
// "Headphone Jack", "HPLOUT",
// "Headphone Jack", "HPROUT",
// "LINE1L", "Line In",
// "LINE1R", "Line In",
// "MIC3R", "Microphone Jack",
// "Microphone Jack", "Mic Bias";
// simple-audio-card,format = "dsp_b";
// simple-audio-card,bitclock-master = <&sound_master>;
// simple-audio-card,frame-master = <&sound_master>;
// simple-audio-card,bitclock-inversion;
// simple-audio-card,cpu {
// sound-dai = <&mcasp1>;
// };
// sound_master: simple-audio-card,codec {
// sound-dai = <&tlv320aic3106>;
// clocks = <&audio_refclk1>;
// };
// };
// transceiver0: can-phy0 {
// compatible = "ti,tcan1042";
// #phy-cells = <0>;
// max-bitrate = <5000000>;
// pinctrl-names = "default";
// pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
// standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>;
// };
// transceiver1: can-phy1 {
// compatible = "ti,tcan1042";
// #phy-cells = <0>;
// max-bitrate = <5000000>;
// };
// transceiver2: can-phy2 {
// compatible = "ti,tcan1042";
// #phy-cells = <0>;
// max-bitrate = <5000000>;
// standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>;
// };
// hdmi0: connector-hdmi {
// compatible = "hdmi-connector";
// label = "hdmi";
// type = "a";
// port {
// hdmi_connector_in: endpoint {
// remote-endpoint = <&sii9022_out>;
// };
// };
// };
lvds_backlight: lvds_backlight {
status = "disabled";
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&lvds_bl_en_pins_default>;
pwms = <&epwm1 0 1000000 1000000>;
brightness-levels = <0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>;
default-brightness-level = <20>;
enable-gpios = <&main_gpio1 7 GPIO_ACTIVE_HIGH>;
};
edp_backlight: edp_backlight {
status = "okay";
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&edp_bl_en_pins_default>;
pwms = <&epwm2 0 1000000 1000000>;
brightness-levels = <0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>;
default-brightness-level = <20>;
enable-gpios = <&main_gpio0 43 GPIO_ACTIVE_HIGH>;
};
display {
compatible = "ct,inc15";
backlight = <&edp_backlight>;
/*
* Note that the OLDI TX 0 transmits the odd set of pixels
* while the OLDI TX 1 transmits the even set. This is a
* fixed configuration in the IP integration and is not
* changeable. The properties, "dual-lvds-odd-pixels" and
* "dual-lvds-even-pixels" have been used to merely
* identify if a Dual Link configuration is required.
* Swapping them will cause an error in the dss oldi driver.
*/
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-odd-pixels;
lcd_in0: endpoint {
remote-endpoint = <&oldi0_dss0_out>;
};
};
port@1 {
reg = <1>;
dual-lvds-even-pixels;
lcd_in1: endpoint {
remote-endpoint = <&oldi1_dss0_out>;
};
};
};
};
pwm-beeper {
status = "okay";
compatible = "pwm-beeper";
pwms = <&epwm0 0 100000 0>;
amp-supply = <&vsys_5v0>;
beeper-hz = <100000>;
};
power_cut {
status = "okay";
compatible = "cotrust,power";
pinctrl-names = "default";
pinctrl-0 = <&pwr_pins_default>;
irq = <&main_gpio1 31 GPIO_ACTIVE_LOW>;
};
matrix_keyboard: matrix_keyboard0 {
compatible = "gpio-matrix-keypad";
pinctrl-names = "default";
pinctrl-0 = <&gpio_matrix_keypad_pins_default>;
debounce-delay-ms = <10>;
col-scan-delay-us = <20>;
drive-inactive-cols;
gpio-activelow;
/* row input */
row-gpios = <
&main_gpio0 40 GPIO_ACTIVE_LOW /* (N25) GPMC0_DIR.GPIO0_40 */ /* KEYL0 */
&main_gpio0 72 GPIO_ACTIVE_LOW /* (H21) MMC2_SDWP.GPIO0_72 */ /* KEYL1 */
&main_gpio0 68 GPIO_ACTIVE_LOW /* (G26) MMC2_DAT0.GPIO0_68 */ /* KEYL2 */
&main_gpio0 66 GPIO_ACTIVE_LOW /* (H27) MMC2_DAT2.GPIO0_66 */ /* KEYL3 */
&main_gpio0 52 GPIO_ACTIVE_LOW /* (Y27) VOUT0_DATA7.GPIO0_52 */ /* KEYL4 */
&main_gpio0 51 GPIO_ACTIVE_LOW /* (Y26) VOUT0_DATA6.GPIO0_51 */ /* KEYL5 */
&main_gpio0 50 GPIO_ACTIVE_LOW /* (W21) VOUT0_DATA5.GPIO0_50 */ /* KEYL6 */
&main_gpio0 49 GPIO_ACTIVE_LOW /* (W22) VOUT0_DATA4.GPIO0_49 */ /* KEYL7 */
&main_gpio0 47 GPIO_ACTIVE_LOW /* (W24) VOUT0_DATA2.GPIO0_47 */ /* KEYL8 */
>;
/* col output */
col-gpios = <
&main_gpio0 0 GPIO_ACTIVE_LOW /* (L24) OSPI0_CLK.GPIO0_0 */ /* KEYR0 */
&main_gpio0 2 GPIO_ACTIVE_LOW /* (L22) OSPI0_DQS.GPIO0_2 */ /* KEYR1 */
&main_gpio0 3 GPIO_ACTIVE_LOW /* (K27) OSPI0_D0.GPIO0_3 */ /* KEYR2 */
&main_gpio0 4 GPIO_ACTIVE_LOW /* (L27) OSPI0_D1.GPIO0_4 */ /* KEYR3 */
&main_gpio0 5 GPIO_ACTIVE_LOW /* (L26) OSPI0_D2.GPIO0_5 */ /* KEYR4 */
&main_gpio0 6 GPIO_ACTIVE_LOW /* (L25) OSPI0_D3.GPIO0_6 */ /* KEYR5 */
&main_gpio0 11 GPIO_ACTIVE_LOW /* (K26) OSPI0_CSn0.GPIO0_11 */ /* KEYR6 */
&main_gpio0 12 GPIO_ACTIVE_LOW /* (K23) OSPI0_CSn1.GPIO0_12 */ /* KEYR7 */
&main_gpio0 31 GPIO_ACTIVE_LOW /* (T23) GPMC0_CLK.GPIO0_31 */ /* KEYR8 */
&main_gpio0 33 GPIO_ACTIVE_LOW /* (N22) GPMC0_OEn_REn.GPIO0_33 */ /* KEYR9 */
&main_gpio0 36 GPIO_ACTIVE_LOW /* (P26) GPMC0_BE1n.GPIO0_36 */ /* KEYR10 */
&main_gpio0 38 GPIO_ACTIVE_LOW /* (W26) GPMC0_WAIT1.GPIO0_38 */ /* KEYR11 */
&main_gpio0 39 GPIO_ACTIVE_LOW /* (N24) GPMC0_WPn.GPIO0_39 */ /* KEYR12 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x00, KEY_RESERVED)
MATRIX_KEY(0x00, 0x01, KEY_RESERVED)
MATRIX_KEY(0x00, 0x02, KEY_RESERVED)
MATRIX_KEY(0x00, 0x03, KEY_RESERVED)
MATRIX_KEY(0x00, 0x04, KEY_RESERVED)
MATRIX_KEY(0x00, 0x05, KEY_RESERVED)
MATRIX_KEY(0x00, 0x06, KEY_RESERVED)
MATRIX_KEY(0x00, 0x07, KEY_RESERVED)
MATRIX_KEY(0x00, 0x08, KEY_RESERVED)
MATRIX_KEY(0x00, 0x09, KEY_RESERVED)
MATRIX_KEY(0x00, 0x0a, KEY_RESERVED)
MATRIX_KEY(0x00, 0x0b, KEY_RESERVED)
MATRIX_KEY(0x00, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x01, 0x00, KEY_RESERVED)
MATRIX_KEY(0x01, 0x01, KEY_RESERVED)
MATRIX_KEY(0x01, 0x02, KEY_RESERVED)
MATRIX_KEY(0x01, 0x03, KEY_RESERVED)
MATRIX_KEY(0x01, 0x04, KEY_RESERVED)
MATRIX_KEY(0x01, 0x05, KEY_RESERVED)
MATRIX_KEY(0x01, 0x06, KEY_RESERVED)
MATRIX_KEY(0x01, 0x07, KEY_RESERVED)
MATRIX_KEY(0x01, 0x08, KEY_RESERVED)
MATRIX_KEY(0x01, 0x09, KEY_RESERVED)
MATRIX_KEY(0x01, 0x0a, KEY_RESERVED)
MATRIX_KEY(0x01, 0x0b, KEY_RESERVED)
MATRIX_KEY(0x01, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x02, 0x00, KEY_RESERVED)
MATRIX_KEY(0x02, 0x01, KEY_RESERVED)
MATRIX_KEY(0x02, 0x02, KEY_RESERVED)
MATRIX_KEY(0x02, 0x03, KEY_RESERVED)
MATRIX_KEY(0x02, 0x04, KEY_RESERVED)
MATRIX_KEY(0x02, 0x05, KEY_RESERVED)
MATRIX_KEY(0x02, 0x06, KEY_RESERVED)
MATRIX_KEY(0x02, 0x07, KEY_RESERVED)
MATRIX_KEY(0x02, 0x08, KEY_RESERVED)
MATRIX_KEY(0x02, 0x09, KEY_RESERVED)
MATRIX_KEY(0x02, 0x0a, KEY_RESERVED)
MATRIX_KEY(0x02, 0x0b, KEY_RESERVED)
MATRIX_KEY(0x02, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x03, 0x00, KEY_RESERVED)
MATRIX_KEY(0x03, 0x01, KEY_RESERVED)
MATRIX_KEY(0x03, 0x02, KEY_RESERVED)
MATRIX_KEY(0x03, 0x03, KEY_RESERVED)
MATRIX_KEY(0x03, 0x04, KEY_RESERVED)
MATRIX_KEY(0x03, 0x05, KEY_RESERVED)
MATRIX_KEY(0x03, 0x06, KEY_RESERVED)
MATRIX_KEY(0x03, 0x07, KEY_MUTE)
MATRIX_KEY(0x03, 0x08, KEY_SETUP)
MATRIX_KEY(0x03, 0x09, KEY_CANCEL)
MATRIX_KEY(0x03, 0x0a, KEY_PROGRAM)
MATRIX_KEY(0x03, 0x0b, KEY_CHANNELUP)
MATRIX_KEY(0x03, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x04, 0x00, KEY_RESERVED)
MATRIX_KEY(0x04, 0x01, KEY_RESERVED)
MATRIX_KEY(0x04, 0x02, KEY_RESERVED)
MATRIX_KEY(0x04, 0x03, KEY_RESERVED)
MATRIX_KEY(0x04, 0x04, KEY_RESERVED)
MATRIX_KEY(0x04, 0x05, KEY_RESERVED)
MATRIX_KEY(0x04, 0x06, KEY_RESERVED)
MATRIX_KEY(0x04, 0x07, KEY_VOLUMEDOWN)
MATRIX_KEY(0x04, 0x08, KEY_RECORD)
MATRIX_KEY(0x04, 0x09, KEY_MICMUTE)
MATRIX_KEY(0x04, 0x0a, KEY_CALENDAR)
MATRIX_KEY(0x04, 0x0b, KEY_CHANNELDOWN)
MATRIX_KEY(0x04, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x05, 0x00, KEY_RESERVED)
MATRIX_KEY(0x05, 0x01, KEY_RESERVED)
MATRIX_KEY(0x05, 0x02, KEY_RESERVED)
MATRIX_KEY(0x05, 0x03, KEY_RESERVED)
MATRIX_KEY(0x05, 0x04, KEY_RESERVED)
MATRIX_KEY(0x05, 0x05, KEY_RESERVED)
MATRIX_KEY(0x05, 0x06, KEY_RESERVED)
MATRIX_KEY(0x05, 0x07, KEY_VOLUMEUP)
MATRIX_KEY(0x05, 0x08, KEY_REWIND)
MATRIX_KEY(0x05, 0x09, KEY_SELECT)
MATRIX_KEY(0x05, 0x0a, KEY_RED)
MATRIX_KEY(0x05, 0x0b, KEY_TOUCHPAD_TOGGLE)
MATRIX_KEY(0x05, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x06, 0x00, KEY_RESERVED)
MATRIX_KEY(0x06, 0x01, KEY_RESERVED)
MATRIX_KEY(0x06, 0x02, KEY_RESERVED)
MATRIX_KEY(0x06, 0x03, KEY_RESERVED)
MATRIX_KEY(0x06, 0x04, KEY_RESERVED)
MATRIX_KEY(0x06, 0x05, KEY_RESERVED)
MATRIX_KEY(0x06, 0x06, KEY_RESERVED)
MATRIX_KEY(0x06, 0x07, KEY_POWER)
MATRIX_KEY(0x06, 0x08, KEY_PLAYPAUSE)
MATRIX_KEY(0x06, 0x09, KEY_CLEAR)
MATRIX_KEY(0x06, 0x0a, KEY_GREEN)
MATRIX_KEY(0x06, 0x0b, KEY_TOUCHPAD_ON)
MATRIX_KEY(0x06, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x07, 0x00, KEY_RESERVED)
MATRIX_KEY(0x07, 0x01, KEY_RESERVED)
MATRIX_KEY(0x07, 0x02, KEY_RESERVED)
MATRIX_KEY(0x07, 0x03, KEY_RESERVED)
MATRIX_KEY(0x07, 0x04, KEY_RESERVED)
MATRIX_KEY(0x07, 0x05, KEY_RESERVED)
MATRIX_KEY(0x07, 0x06, KEY_RESERVED)
MATRIX_KEY(0x07, 0x07, KEY_PAUSE)
MATRIX_KEY(0x07, 0x08, KEY_PLAY)
MATRIX_KEY(0x07, 0x09, KEY_EXIT)
MATRIX_KEY(0x07, 0x0a, KEY_YELLOW)
MATRIX_KEY(0x07, 0x0b, KEY_TOUCHPAD_OFF)
MATRIX_KEY(0x07, 0x0c, KEY_RESERVED)
MATRIX_KEY(0x08, 0x00, KEY_RESERVED)
MATRIX_KEY(0x08, 0x01, KEY_RESERVED)
MATRIX_KEY(0x08, 0x02, KEY_RESERVED)
MATRIX_KEY(0x08, 0x03, KEY_RESERVED)
MATRIX_KEY(0x08, 0x04, KEY_RESERVED)
MATRIX_KEY(0x08, 0x05, KEY_RESERVED)
MATRIX_KEY(0x08, 0x06, KEY_RESERVED)
MATRIX_KEY(0x08, 0x07, KEY_STOP)
MATRIX_KEY(0x08, 0x08, KEY_FASTFORWARD)
MATRIX_KEY(0x08, 0x09, KEY_INFO)
MATRIX_KEY(0x08, 0x0a, KEY_BLUE)
MATRIX_KEY(0x08, 0x0b, KEY_SLEEP)
MATRIX_KEY(0x08, 0x0c, KEY_RESERVED)
>;
};
};
&main_pmx0 {
eqep1_pins_default: eqep1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01a4, PIN_INPUT, 8) /* (D25) MCASP0_ACLKX.EQEP1_A */
J722S_IOPAD(0x01a8, PIN_INPUT, 8) /* (C26) MCASP0_AFSX.EQEP1_B */
J722S_IOPAD(0x01b0, PIN_INPUT, 8) /* (F24) MCASP0_ACLKR.EQEP1_I */
J722S_IOPAD(0x01ac, PIN_INPUT, 8) /* (C27) MCASP0_AFSR.EQEP1_S */
>;
};
gpio_matrix_keypad_pins_default: gpio_matrix_keypad-pins-default {
pinctrl-single,pins = <
/* col output R */
J722S_IOPAD(0x0000, PIN_OUTPUT, 7) /* (L24) OSPI0_CLK.GPIO0_0 */
J722S_IOPAD(0x0008, PIN_OUTPUT, 7) /* (L22) OSPI0_DQS.GPIO0_2 */
J722S_IOPAD(0x000c, PIN_OUTPUT, 7) /* (K27) OSPI0_D0.GPIO0_3 */
J722S_IOPAD(0x0010, PIN_OUTPUT, 7) /* (L27) OSPI0_D1.GPIO0_4 */
J722S_IOPAD(0x0014, PIN_OUTPUT, 7) /* (L26) OSPI0_D2.GPIO0_5 */
J722S_IOPAD(0x0018, PIN_OUTPUT, 7) /* (L25) OSPI0_D3.GPIO0_6 */
J722S_IOPAD(0x002c, PIN_OUTPUT, 7) /* (K26) OSPI0_CSn0.GPIO0_11 */
J722S_IOPAD(0x0030, PIN_OUTPUT, 7) /* (K23) OSPI0_CSn1.GPIO0_12 */
J722S_IOPAD(0x007c, PIN_OUTPUT, 7) /* (T23) GPMC0_CLK.GPIO0_31 */
J722S_IOPAD(0x0088, PIN_OUTPUT, 7) /* (N22) GPMC0_OEn_REn.GPIO0_33 */
J722S_IOPAD(0x0094, PIN_OUTPUT, 7) /* (P26) GPMC0_BE1n.GPIO0_36 */
J722S_IOPAD(0x009c, PIN_OUTPUT, 7) /* (W26) GPMC0_WAIT1.GPIO0_38 */
J722S_IOPAD(0x00a0, PIN_OUTPUT, 7) /* (N24) GPMC0_WPn.GPIO0_39 */
/* row input L*/
J722S_IOPAD(0x00a4, PIN_INPUT, 7) /* (N25) GPMC0_DIR.GPIO0_40 */
J722S_IOPAD(0x0128, PIN_INPUT, 7) /* (H21) MMC2_SDWP.GPIO0_72 */
J722S_IOPAD(0x0114, PIN_INPUT, 7) /* (G26) MMC2_DAT0.GPIO0_68 */
J722S_IOPAD(0x010c, PIN_INPUT, 7) /* (H27) MMC2_DAT2.GPIO0_66 */
J722S_IOPAD(0x00d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */
J722S_IOPAD(0x00d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */
J722S_IOPAD(0x00cc, PIN_INPUT, 7) /* (W21) VOUT0_DATA5.GPIO0_50 */
J722S_IOPAD(0x00c8, PIN_INPUT, 7) /* (W22) VOUT0_DATA4.GPIO0_49 */
J722S_IOPAD(0x00c0, PIN_INPUT, 7) /* (W24) VOUT0_DATA2.GPIO0_47 */
>;
};
pwr_pins_default: pwr-pins-default {
pinctrl-single,pins = <
J722S_IOPAD(0x01f4, PIN_INPUT, 7) /* (B23) EXTINTn.GPIO1_31 */
>;
};
epwm0_pins_defaults: epwm0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0108, PIN_OUTPUT, 4) /* (J27) MMC2_DAT3.EHRPWM0_A */
>;
};
lvds_bl_en_pins_default: lvds_bl_en_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x0194, PIN_OUTPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */
>;
};
lvds_bl_epwm1_pins_default: lvds_bl_epwm1_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x0110, PIN_OUTPUT, 4) /* (G27) MMC2_DAT1.EHRPWM1_A */
>;
};
edp_bl_en_pins_default: edp_bl_en_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x00b0, PIN_OUTPUT, 7) /* (P22) GPMC0_CSn2.GPIO0_43 */
>;
};
edp_bl_epwm2_pins_default: edp_bl_epwm2_pins_default{
pinctrl-single,pins = <
J722S_IOPAD(0x0124, PIN_INPUT, 4) /* (F26) MMC2_SDCD.EHRPWM2_A */
>;
};
oldi0_pins_default: oldi0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AF23) OLDI0_A0N */
J722S_IOPAD(0x025c, PIN_OUTPUT, 0) /* (AG24) OLDI0_A0P */
J722S_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AG22) OLDI0_A1N */
J722S_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AG23) OLDI0_A1P */
J722S_IOPAD(0x0270, PIN_OUTPUT, 0) /* (AB20) OLDI0_A2N */
J722S_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AB21) OLDI0_A2P */
J722S_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AG20) OLDI0_A3N */
J722S_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AG21) OLDI0_A3P */
J722S_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AD21) OLDI0_A4N */
J722S_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC21) OLDI0_A4P */
J722S_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AF19) OLDI0_A5N */
J722S_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AF18) OLDI0_A5P */
J722S_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AG17) OLDI0_A6N */
J722S_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AG18) OLDI0_A6P */
J722S_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AB19) OLDI0_A7N */
J722S_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AA20) OLDI0_A7P */
J722S_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AF21) OLDI0_CLK0N */
J722S_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE20) OLDI0_CLK0P */
J722S_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AD20) OLDI0_CLK1N */
J722S_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AE19) OLDI0_CLK1P */
>;
};
spi0_pins_default: spi0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (D20) SPI0_CLK */
J722S_IOPAD(0x01b4, PIN_OUTPUT, 0) /* (B20) SPI0_CS0 */
J722S_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C20) SPI0_CS1 */
J722S_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (E19) SPI0_D0 */
J722S_IOPAD(0x01c4, PIN_INPUT, 0) /* (E20) SPI0_D1 */
>;
};
run_led_pins_default: run-led-pins-default {
pinctrl-single,pins = <
J722S_IOPAD(0x0244, PIN_INPUT, 7) /* (A24) MMC1_SDWP.GPIO1_49 */
>;
};
main_mcan0_pins_default: main-mcan0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x1dc, PIN_INPUT, 0) /* (C22) MCAN0_RX */
J722S_IOPAD(0x1d8, PIN_OUTPUT, 0) /*(D22) MCAN0_TX */
>;
};
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
>;
bootph-all;
};
main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */
>;
bootph-all;
};
main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
>;
bootph-all;
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */
>;
bootph-all;
};
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */
>;
bootph-all;
};
mdio_pins_default: mdio-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>;
bootph-all;
};
rmii1_pins_default: rmii1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0130, PIN_INPUT, 1) /* (AG26) RGMII1_TXC.RMII1_CRS_DV */
J722S_IOPAD(0x0148, PIN_INPUT, 1) /* (AE27) RGMII1_RXC.RMII1_REF_CLK */
J722S_IOPAD(0x014c, PIN_INPUT, 1) /* (AC25) RGMII1_RD0.RMII1_RXD0 */
J722S_IOPAD(0x0150, PIN_INPUT, 1) /* (AD27) RGMII1_RD1.RMII1_RXD1 */
/* J722S_IOPAD(0x0144, PIN_INPUT, 1) /* (AD23) RGMII1_RX_CTL.RMII1_RX_ER */
J722S_IOPAD(0x0134, PIN_OUTPUT, 1) /* (AF27) RGMII1_TD0.RMII1_TXD0 */
J722S_IOPAD(0x0138, PIN_OUTPUT, 1) /* (AE23) RGMII1_TD1.RMII1_TXD1 */
J722S_IOPAD(0x012c, PIN_OUTPUT, 1) /* (AF25) RGMII1_TX_CTL.RMII1_TX_EN */
>;
};
rgmii2_pins_default: rgmii2-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x00f8, PIN_INPUT, 2) /* (AB24) VOUT0_HSYNC.RGMII2_RD0 */
J722S_IOPAD(0x00fc, PIN_INPUT, 2) /* (AC27) VOUT0_DE.RGMII2_RD1 */
J722S_IOPAD(0x0100, PIN_INPUT, 2) /* (AB23) VOUT0_VSYNC.RGMII2_RD2 */
J722S_IOPAD(0x0104, PIN_INPUT, 2) /* (AC26) VOUT0_PCLK.RGMII2_RD3 */
J722S_IOPAD(0x00f4, PIN_INPUT, 2) /* (AB27) VOUT0_DATA15.RGMII2_RXC */
J722S_IOPAD(0x00f0, PIN_INPUT, 2) /* (AB26) VOUT0_DATA14.RGMII2_RX_CTL */
J722S_IOPAD(0x00e0, PIN_OUTPUT, 2) /* (AA25) VOUT0_DATA10.RGMII2_TD0 */
J722S_IOPAD(0x00e4, PIN_OUTPUT, 2) /* (AB25) VOUT0_DATA11.RGMII2_TD1 */
J722S_IOPAD(0x00e8, PIN_OUTPUT, 2) /* (AA23) VOUT0_DATA12.RGMII2_TD2 */
J722S_IOPAD(0x00ec, PIN_OUTPUT, 2) /* (AA22) VOUT0_DATA13.RGMII2_TD3 */
J722S_IOPAD(0x00dc, PIN_OUTPUT, 2) /* (AA27) VOUT0_DATA9.RGMII2_TXC */
J722S_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AA24) VOUT0_DATA8.RGMII2_TX_CTL */
>;
};
rmii1_rst_pins_default: rmii1_rst-pins-default {
pinctrl-single,pins = <
J722S_IOPAD(0x00b4, PIN_OUTPUT, 7) /* (P23) GPMC0_CSn3.GPIO0_44 */
>;
};
rmii2_rst_pins_default: rmii2_rst-pins-default {
pinctrl-single,pins = <
J722S_IOPAD(0x01f0, PIN_OUTPUT, 7) /* (A23) EXT_REFCLK1.GPIO1_30 */
>;
};
main_usb0_pins_default: main-usb0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */
>;
};
main_usb1_pins_default: main-usb1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0258, PIN_OUTPUT, 7) /* (B27) USB1_DRVVBUS.GPIO1_51 */
>;
};
main_mcasp1_pins_default: main-mcasp1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (P27) GPMC0_BE0n_CLE.MCASP1_ACLKX */
J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (V21) GPMC0_WAIT0.MCASP1_AFSX */
J722S_IOPAD(0x008c, PIN_OUTPUT, 2) /* (N23) GPMC0_WEn.MCASP1_AXR0 */
J722S_IOPAD(0x0084, PIN_INPUT, 2) /* (N21) GPMC0_ADVn_ALE.MCASP1_AXR2 */
>;
};
pmic_irq_pins_default: pmic-irq-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x030, PIN_INPUT, 7) /* (K23) GPIO0_12 */
>;
};
};
&cpsw3g {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rmii1_pins_default
&rgmii2_pins_default
&rmii1_rst_pins_default
&rmii2_rst_pins_default>;
rmii1-reset-gpios = <&main_gpio0 44 GPIO_ACTIVE_HIGH>;
rmii2-reset-gpios = <&main_gpio1 30 GPIO_ACTIVE_HIGH>;
};
&cpsw3g_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
};
cpsw3g_phy1: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
&cpsw_port1 {
phy-mode = "rmii";
phy-handle = <&cpsw3g_phy1>;
status = "okay";
rmii-clock-ext;
};
&cpsw_port2 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&cpsw3g_phy0>;
};
&main_gpio1 {
status = "okay";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
status = "okay";
bootph-all;
};
&main_uart5 {
/* MAIN UART 5 is used by System firmware */
//pinctrl-names = "default";
//pinctrl-0 = <&main_uart5_pins_default>;
status = "disabled";
};
&mcu_pmx0 {
mcu_usb1_reset_pins_default: mcu-usb1-reset-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x0080, PIN_OUTPUT, 7) /* (A8) PMIC_LPM_EN0.MCU_GPIO0_22 */
>;
};
wifi_en_pins_default: wifi_en-pins-default {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x0084, PIN_OUTPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */
>;
};
mcu_eqep1_led_pins_default: mcu-eqep-led-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x0028, PIN_OUTPUT, 7) /* (C8) WKUP_UART0_TXD.MCU_GPIO0_10 */
J722S_MCU_IOPAD(0x002c, PIN_OUTPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */
J722S_MCU_IOPAD(0x0030, PIN_OUTPUT, 7) /* (C3) WKUP_UART0_RTSn.MCU_GPIO0_12 */
>;
};
mcu_lt8911ex_pins_default: mcu-lt8911ex-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x004c, PIN_OUTPUT, 7) /* (B9) WKUP_I2C0_SCL.MCU_GPIO0_19 */
>;
};
mcu_i2c0_pins_default: mcu-i2c0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x048, PIN_INPUT, 0) /* (E11) MCU_I2C0_SDA */
J722S_MCU_IOPAD(0x044, PIN_INPUT, 0) /* (B13) MCU_I2C0_SCL */
>;
};
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */
J722S_MCU_IOPAD(0x034, PIN_OUTPUT, 0) /* (B2) MCU_MCAN0_TX */
>;
};
mcu_mcan1_pins_default: mcu-mcan1-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x040, PIN_INPUT, 0) /* (B1) MCU_MCAN1_RX */
J722S_MCU_IOPAD(0x03C, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */
>;
};
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */
J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */
J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */
J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */
>;
bootph-all;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (C7) WKUP_I2C0_SCL */
J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_I2C1_SDA */
>;
bootph-all;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by Device Manager firmware */
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
status = "reserved";
bootph-all;
};
&wkup_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
status = "disabled";
bootph-all;
tps65224: pmic@48 {
compatible = "ti,tps65224-q1";
reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins_default>;
interrupt-parent = <&main_gpio0>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
ti,primary-pmic;
gpio-controller;
#gpio-cells = <2>;
buck12-supply = <&vsys_io_3v3>;
buck3-supply = <&vsys_io_3v3>;
buck4-supply = <&vsys_io_3v3>;
ldo1-supply = <&vsys_io_3v3>;
ldo2-supply = <&vsys_io_3v3>;
ldo3-supply = <&vsys_io_3v3>;
regulators {
buck1: buck1 {
regulator-name = "vcc1v8_io_buck1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
bootph-all;
};
buck2: buck2 {
regulator-name = "vcc1v1_ddr_buck2";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
};
buck3: buck3 {
regulator-name = "vcc0v85_ram_buck3";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-boot-on;
regulator-always-on;
};
buck4: buck4 {
regulator-name = "vcc0v75_ioret_buck4";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-boot-on;
regulator-always-on;
};
ldo1: ldo1 {
regulator-name = "vdda1v8_pll_ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo2: ldo2 {
regulator-name = "dvdd3v3_ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo3: ldo3 {
regulator-name = "vdd1v85_phy_ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&k3_clks {
/* Configure AUDIO_EXT_REFCLK1 pin as output */
//pinctrl-names = "default";
//pinctrl-0 = <&audio_ext_refclk1_pins_default>;
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default
&mcu_lt8911ex_pins_default>;
clock-frequency = <400000>;
status = "okay";
bootph-all;
lt8911ex@29 {
compatible = "lontium,lt8911ex";
reg = <0x29>;
//power-gpio = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>;
reset-gpio = <&mcu_gpio0 19 GPIO_ACTIVE_HIGH>;
lontium,pclk = <148500000>;
lontium,hact = <1920>;
lontium,vact = <1080>;
lontium,hbp = <192>;
lontium,hfp = <48>;
lontium,vbp = <71>;
lontium,vfp = <3>;
lontium,hs = <32>;
lontium,vs = <6>;
lontium,mipi_lane = <4>;
lontium,lane_cnt = <2>;
lontium,color = <1>; //Color Depth 0:6bit 1:8bit
lontium,test = <0>;
};
rtc0: rtc-pcf8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
#clock-cells = <0>;
};
// tlv320aic3106: audio-codec@1b {
// #sound-dai-cells = <0>;
// compatible = "ti,tlv320aic3106";
// reg = <0x1b>;
// ai3x-micbias-vg = <1>; /* 2.0V */
// AVDD-supply = <&vsys_io_3v3>;
// IOVDD-supply = <&vsys_io_3v3>;
// DRVDD-supply = <&vsys_io_3v3>;
// DVDD-supply = <&vsys_io_1v8>;
// };
};
&main_i2c1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <100000>;
// exp2: gpio@20 {
// compatible = "ti,tca6416";
// reg = <0x20>;
// gpio-controller;
// #gpio-cells = <2>;
// gpio-line-names = "DSI_Mux_SEL_2", "GPIO_eDP_ENABLE",
// "DP0_PWR_SW_EN", "GPIO_OLDI_RSTn",
// "GPIO_HDMI_RSTn", "HDMI_LS_OE",
// "", "",
// "DSI_GPIO0", "DSI_GPIO1",
// "DSI_EDID", "IO_eDP_IRQ",
// "OLDI_INT#", "HDMI_INTn",
// "", "";
// interrupt-parent = <&main_gpio0>;
// interrupts = <67 IRQ_TYPE_EDGE_FALLING>;
// interrupt-controller;
// #interrupt-cells = <2>;
// pinctrl-names = "default";
// pinctrl-0 = <&main_gpio0_ioexp_intr_pins_default>;
// bootph-all;
// p04-hog {
// /* P04 - GPIO_HDMI_RSTn */
// gpio-hog;
// gpios = <4 GPIO_ACTIVE_LOW>;
// output-low;
// line-name = "GPIO_HDMI_RSTn";
// };
// p03-hog {
// /* P03 - GPIO_OLDI_RSTn */
// gpio-hog;
// gpios = <3 GPIO_ACTIVE_LOW>;
// output-low;
// line-name = "GPIO_OLDI_RSTn";
// };
// p05-hog {
// /* P05 - HDMI_LS_OE */
// gpio-hog;
// gpios = <5 GPIO_ACTIVE_HIGH>;
// output-high;
// line-name = "HDMI_LS_OE";
// };
// };
// sii9022: bridge-hdmi@3b {
// compatible = "sil,sii9022";
// reg = <0x3b>;
// interrupt-parent = <&exp2>;
// interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
// #sound-dai-cells = <0>;
// sil,i2s-data-lanes = < 0 >;
// hdmi_tx_ports: ports {
// #address-cells = <1>;
// #size-cells = <0>;
// /*
// * HDMI can be serviced with 3 potential VPs -
// * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1).
// * For now, we will service it with DSS1 VP0.
// */
// port@0 {
// reg = <0>;
// sii9022_in: endpoint {
// remote-endpoint = <&dss1_dpi0_out>;
// };
// };
// port@1 {
// reg = <1>;
// sii9022_out: endpoint {
// remote-endpoint = <&hdmi_connector_in>;
// };
// };
// };
// };
};
&main_i2c2 {
status = "disabled";
};
&ospi0 {
status = "disabled";
};
&sdhci0 {
disable-wp;
bootph-all;
ti,driver-strength-ohm = <50>;
status = "okay";
};
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
ti,driver-strength-ohm = <50>;
disable-wp;
sdhci-caps-mask = <0x00000003 0x00000000>;
status = "okay";
bootph-all;
};
&mailbox0_cluster0 {
status = "okay";
mbox_wkup_r5_0: mbox-wkup-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
status = "okay";
mbox_mcu_r5_0: mbox-mcu-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster2 {
status = "okay";
mbox_c7x_0: mbox-c7x-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster3 {
status = "okay";
mbox_main_r5_0: mbox-main-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
mbox_c7x_1: mbox-c7x-1 {
ti,mbox-rx = <2 0 0>;
ti,mbox-tx = <3 0 0>;
};
};
/* Timers are used by Remoteproc firmware */
&main_timer0 {
status = "reserved";
};
&main_timer1 {
status = "reserved";
};
&main_timer2 {
status = "reserved";
};
&wkup_r5fss0 {
status = "okay";
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_r5fss0 {
status = "okay";
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&main_r5fss0 {
status = "okay";
};
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&c7x_0 {
mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
memory-region = <&c7x_0_dma_memory_region>,
<&c7x_0_memory_region>;
status = "okay";
};
&c7x_1 {
mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
memory-region = <&c7x_1_dma_memory_region>,
<&c7x_1_memory_region>;
status = "okay";
};
&serdes_ln_ctrl {
idle-states = <J722S_SERDES0_LANE0_USB>,
<J722S_SERDES1_LANE0_PCIE0_LANE0>;
};
&serdes0 {
status = "okay";
serdes0_usb_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
resets = <&serdes_wiz0 1>;
};
};
&serdes1 {
status = "okay";
serdes1_pcie_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz1 1>;
};
};
// &pcie0_rc {
// reset-gpios = <&exp1 18 GPIO_ACTIVE_HIGH>;
// phys = <&serdes1_pcie_link>;
// phy-names = "pcie-phy";
// status = "okay";
// };
&usbss0 {
ti,vbus-divider;
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&usbss1 {
ti,vbus-divider;
status = "okay";
};
&usb1 {
status = "okay";
dr_mode = "host";
maximum-speed = "super-speed";
phys = <&serdes0_usb_link>;
phy-names = "cdns3,usb3-phy";
};
&mcasp1 {
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_mcasp1_pins_default>;
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 2 0
0 0 0 0
0 0 0 0
0 0 0 0
>;
};
// &mcu_mcan0 {
// pinctrl-names = "default";
// pinctrl-0 = <&mcu_mcan0_pins_default>;
// phys = <&transceiver0>;
// status = "okay";
// };
// &mcu_mcan1 {
// pinctrl-names = "default";
// pinctrl-0 = <&mcu_mcan1_pins_default>;
// phys = <&transceiver1>;
// status = "okay";
// };
// &main_mcan0 {
// pinctrl-names = "default";
// pinctrl-0 = <&main_mcan0_pins_default>;
// phys = <&transceiver2>;
// status = "okay";
// };
&mcu_gpio0 {
status = "okay";
};
&mcu_i2c0 {
status = "disabled";
};
&dss1 {
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&main_dpi_pins_default>;
// clocks = <&k3_clks 232 8>,
// <&k3_clks 232 0>,
// <&k3_clks 232 4>;
// assigned-clocks = <&k3_clks 241 0>, /* DSS1-VP0 */
// <&k3_clks 240 0>, /* DSS1-VP1 */
// <&k3_clks 245 0>; /* DPI Output */
// assigned-clock-parents = <&k3_clks 241 2>, /* PLL 17 HDMI */
// <&k3_clks 240 1>, /* PLL 18 DSI */
// <&k3_clks 245 2>; /* DSS1-DPI0 */
};
&dss1_ports {
/* DSS1-VP0: DPI/HDMI Output */
// port@0 {
// reg = <0>;
// dss1_dpi0_out: endpoint {
// remote-endpoint = <&sii9022_in>;
// };
// };
};
&mcu_rti0 {
assigned-clock-parents = <&k3_clks 131 4>;
};
&main_rti0 {
assigned-clock-parents = <&k3_clks 125 4>;
};
&main_rti1 {
assigned-clock-parents = <&k3_clks 126 4>;
};
&main_rti2 {
assigned-clock-parents = <&k3_clks 127 4>;
};
&main_rti3 {
assigned-clock-parents = <&k3_clks 128 4>;
};
&main_spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_default>;
ti,pindir-d0-out-d1-in;
ti,spi-num-cs = <2>;
hc595: gpio_spi@0 {
status = "okay";
compatible = "fairchild,74hc595";
reg = <0>;
#gpio-cells = <2>;
registers-number = <3>;
spi-max-frequency = <100000>;
};
rfid: rfid@1 {
status = "okay";
compatible = "rohm,dh2228fv";
reg = <1>;
spi-max-frequency = <24000000>;
};
};
&dss0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&oldi0_pins_default>;
};
&oldi0_dss0 {
status = "okay";
};
&oldi1_dss0 {
status = "okay";
};
&oldi0_dss0_ports {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi0_dss0_in: endpoint {
remote-endpoint = <&dss0_dpi0_out0>;
};
};
port@1 {
reg = <1>;
oldi0_dss0_out: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
};
&oldi1_dss0_ports {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi1_dss0_in: endpoint {
remote-endpoint = <&dss0_dpi0_out1>;
};
};
port@1 {
reg = <1>;
oldi1_dss0_out: endpoint {
remote-endpoint = <&lcd_in1>;
};
};
};
&dss0_ports {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* VP1: Output to OLDI */
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dss0_dpi0_out0: endpoint@0 {
reg = <0>;
remote-endpoint = <&oldi0_dss0_in>;
};
dss0_dpi0_out1: endpoint@1 {
reg = <1>;
remote-endpoint = <&oldi1_dss0_in>;
};
};
};
&epwm0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&epwm0_pins_defaults>;
};
&epwm1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lvds_bl_epwm1_pins_default>;
};
&epwm2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&edp_bl_epwm2_pins_default>;
};
&eqep1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&eqep1_pins_default>;
};