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TDA4VEN-Q1: Problems encountered during compilation and simulation

Ylinly Yi
Prodigy 40 points

Part Number: TDA4VEN-Q1

Tool/software:

Hi,

SOC: j722s

RTOS: 11_00_06_00

edgeai-tidl-tools: 11_00_06_00

We encountered some issues when compiling and simulating on the PC! Although compilation and simulation run normally, inference using edgeai-tidl-tools with ['TIDLExecutionProvider', 'CPUExecutionProvider'] is extremely time-consuming, taking about 20 seconds for a single inference.

========================= [Model Compilation Started] =========================

Model compilation will perform the following stages:
1. Parsing
2. Graph Optimization
3. Quantization & Calibration
4. Memory Planning

============================== [Version Summary] ==============================

-------------------------------------------------------------------------------
|          TIDL Tools Version          |              11_00_06_00             |
-------------------------------------------------------------------------------
|         C7x Firmware Version         |              11_00_00_00             |
-------------------------------------------------------------------------------

ONNX model (Proto) file      : /home/root/models/public/best_iketest23.onnx  
TIDL network file            : /home/root/emulationOnPC/tidl_net.bin  
TIDL IO info file            : /home/root/emulationOnPC/tidl_io_buff  
Current ONNX OpSet version   : 11  
============================ [Optimization started] ============================

----------------------------- Optimization Summary -----------------------------
---------------------------------------------------------------------------------
|          Layer         | Nodes before optimization | Nodes after optimization |
---------------------------------------------------------------------------------
| TIDL_BatchNormLayer    |                         0 |                       87 |
| TIDL_InnerProductLayer |                         2 |                        2 |
| TIDL_SoftMaxLayer      |                         2 |                        2 |
| TIDL_ResizeLayer       |                         2 |                        2 |
| TIDL_TransposeLayer    |                         4 |                        3 |
| TIDL_SliceLayer        |                        13 |                       23 |
| TIDL_ConvolutionLayer  |                        97 |                       97 |
| TIDL_EltWiseLayer      |                       100 |                       97 |
| TIDL_SigmoidLayer      |                        85 |                        0 |
| TIDL_ConcatLayer       |                        23 |                       23 |
| TIDL_PoolingLayer      |                         4 |                        4 |
---------------------------------------------------------------------------------

Total nodes in subgraph: 352

=========================== [Optimization completed] ===========================


-------- Running Calibration in Float Mode to Collect Tensor Statistics --------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [1 / 1]: ------------------
[=============================================================================] 100 %

==================== [Quantization & Calibration Completed] ====================

========================== [Memory Planning Started] ==========================


------------------------- Network Compiler Traces ------------------------------
Successful Memory Allocation
Successful Workload Creation

========================= [Memory Planning Completed] =========================

Rerunning network compiler...
========================== [Memory Planning Started] ==========================


------------------------- Network Compiler Traces ------------------------------
Successful Memory Allocation
Successful Workload Creation

========================= [Memory Planning Completed] =========================

======================== Subgraph Compiled Successfully ========================



Processing config file #0 : /home/root/emulationOnPC/config 
 ----------------------- TIDL Process with REF_ONLY FLOW------------------------ 

#    0 . .. T   21023.96  .... ..... ...
 A :   895, 0.0000, 0.0000,  5043 .... ......

Subsequently, when we used TI_DEVICE_armv8_test_dl_algo_host_rt.out for inference on the J722s, the process got stuck. I'm not quite sure where the error occurred.

root@j722s-evm:/opt/tidl_test# ./TI_DEVICE_armv8_test_dl_algo_host_rt.out s:$WORKDIR/config \
> --netBinFile $WORKDIR/tidl_net.bin \
> --ioConfigFile $WORKDIR/tidl_io_buff1.bin \
> --inData $WORKDIR/in_data_list.txt --inFileFormat 2 \
> --outData $WORKDIR/jet_tidl_out.bin --postProcType 1

Processing config file #0 : /home/root/emulationOnPC/config 
APP: Init ... !!!
    56.762727 s: MEM: Init ... !!!
    56.762826 s: MEM: Initialized DMA HEAP (fd=5) !!!
    56.763085 s: MEM: Init ... Done !!!
    56.763106 s: IPC: Init ... !!!
    56.817257 s: IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
    56.830122 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
    56.840790 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
    56.840870 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
    56.840883 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
    56.842355 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
    56.842575 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
    56.842737 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
    56.842864 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
    56.842880 s:  VX_ZONE_INFO: [tivxInitLocal:202] Initialization Done !!!
    56.842899 s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO

# NETWORK_INIT_TIME =   522.10 (in ms, c7x @1GHz)
peg file read not supported. Only BMP file read is supported in target 
 ----------------------- TIDL Process with TARGET DATA FLOW ------------------------
[C7x_1 ]     58.196232 s: A0 =0xa5a5a5a5a5a5a5a5 A1 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196286 s: A2 =0xa5a5a5a5a5a5a5a5 A3 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196336 s: A4 =0xa5a5a5a5a5a5a5a5 A5 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196383 s: A6 =0xa5a5a5a5a5a5a5a5 A7 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196428 s: A8 =0xa5a5a5a5a5a5a5a5 A9 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196473 s: A10=0xa5a5a5a5a5a5a5a5 A11=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196517 s: A12=0xa5a5a5a5a5a5a5a5 A13=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196562 s: A14=0xa5a5a5a5a5a5a5a5 A15=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196607 s: D0 =0xa5a5a5a5a5a5a5a5 D1 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196652 s: D2 =0xa5a5a5a5a5a5a5a5 D3 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196696 s: D4 =0xa5a5a5a5a5a5a5a5 D5 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196741 s: D6 =0xa5a5a5a5a5a5a5a5 D7 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196787 s: D8 =0xa5a5a5a5a5a5a5a5 D9 =0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196831 s: D10=0xa5a5a5a5a5a5a5a5 D11=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196877 s: D12=0xa5a5a5a5a5a5a5a5 D13=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196922 s: D14=0xa5a5a5a5a5a5a5a5 D15=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.196968 s: AM0=0xa5a5a5a5a5a5a5a5 AM1=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197013 s: AM2=0xa5a5a5a5a5a5a5a5 AM3=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197058 s: AM4=0xa5a5a5a5a5a5a5a5 AM5=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197102 s: AM6=0xa5a5a5a5a5a5a5a5 AM7=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197148 s: AL0=0xa5a5a5a5a5a5a5a5 AL1=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197193 s: AL2=0xa5a5a5a5a5a5a5a5 AL3=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197236 s: AL4=0xa5a5a5a5a5a5a5a5 AL5=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197281 s: AL6=0xa5a5a5a5a5a5a5a5 AL7=0xa5a5a5a5a5a5a5a5
[C7x_1 ]     58.197311 s: P0=0x0000000000000000 P1=0x00000000000fffff
[C7x_1 ]     58.197345 s: P2=0x00000000230b205e P3=0x00000000e1c8742d
[C7x_1 ]     58.197378 s: P4=0x000000003000a3e2 P5=0x000000000544bccf
[C7x_1 ]     58.197411 s: P6=0x00000000552c11cf P7=0x0000000054b6c4de
[C7x_1 ]     58.197443 s: FPCR=0x0000000000000010 FSR=0x0000000010101012
[C7x_1 ]     58.197476 s: GFPGFR=0x000000000700001d GPLY=0x0000000000000000
[C7x_1 ]     58.197494 s: 
[C7x_1 ]     58.197539 s: VBM0=0xa5a5a5a5a5a5a5a5 [0]    VBM1=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.197594 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.197645 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.197695 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.197745 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.197794 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.197841 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.197891 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.197911 s:     
[C7x_1 ]     58.197953 s: VBM2=0xa5a5a5a5a5a5a5a5 [0]    VBM3=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.198005 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.198054 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.198102 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.198150 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.198199 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.198246 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.198293 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.198312 s:     
[C7x_1 ]     58.198353 s: VBM4=0xa5a5a5a5a5a5a5a5 [0]    VBM5=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.198402 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.198451 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.198499 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.198547 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.198597 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.198645 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.198692 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.198712 s:     
[C7x_1 ]     58.198747 s: VBM6=0xa5a5a5a5a5a5a5a5 [0]    VBM7=0x000000010c002100 [0]
[C7x_1 ]     58.198790 s:     0xa5a5a5a5a5a5a5a5 [1]        0x0000000007b6dd85 [1]
[C7x_1 ]     58.198832 s:     0xa5a5a5a5a5a5a5a5 [2]        0x0000000120000000 [2]
[C7x_1 ]     58.198873 s:     0xa5a5a5a5a5a5a5a5 [3]        0x0000000000000001 [3]
[C7x_1 ]     58.198912 s:     0xa5a5a5a5a5a5a5a5 [4]        0x0000000000000000 [4]
[C7x_1 ]     58.198951 s:     0xa5a5a5a5a5a5a5a5 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.198991 s:     0xa5a5a5a5a5a5a5a5 [6]        0x0000000000000000 [6]
[C7x_1 ]     58.199040 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.199060 s:     
[C7x_1 ]     58.199098 s: VBL0=0xffffffffffffffff [0]    VBL1=0x0000000780000000 [0]
[C7x_1 ]     58.199138 s:     0x00000000adb928e8 [1]        0x0000000780000000 [1]
[C7x_1 ]     58.199172 s:     0x0000000000000000 [2]        0x0000000780000000 [2]
[C7x_1 ]     58.199209 s:     0x000000007e1f8780 [3]        0x0000000118000000 [3]
[C7x_1 ]     58.199243 s:     0x0000000000000000 [4]        0x0000000104000000 [4]
[C7x_1 ]     58.199282 s:     0xfffffffffffffffe [5]        0x000000000260b62e [5]
[C7x_1 ]     58.199317 s:     0x000000010c002100 [6]        0x0000000000000000 [6]
[C7x_1 ]     58.199350 s:     0x000000000806dd00 [7]        0x0000000000000000 [7]
[C7x_1 ]     58.199368 s:     
[C7x_1 ]     58.199404 s: VBL2=0x0000000114000000 [0]    VBL3=0x8cebb57776fe75cf [0]
[C7x_1 ]     58.199448 s:     0x0000000780000000 [1]        0xfec5eaebcf0b7bdb [1]
[C7x_1 ]     58.199483 s:     0x000000010c000000 [2]        0x0000000000000003 [2]
[C7x_1 ]     58.199518 s:     0x0000000780000000 [3]        0x0000000000000000 [3]
[C7x_1 ]     58.199551 s:     0x000000011c000000 [4]        0x0000000000000000 [4]
[C7x_1 ]     58.199583 s:     0x0000000000000000 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.199618 s:     0x000000007e000000 [6]        0x0000000000000000 [6]
[C7x_1 ]     58.199655 s:     0x0000000108000000 [7]        0x00000000ad72a2e0 [7]
[C7x_1 ]     58.199673 s:     
[C7x_1 ]     58.199700 s: VBL4=0x0000000000000fc0 [0]    VBL5=0x0000000000000000 [0]
[C7x_1 ]     58.199733 s:     0x0000000000000000 [1]        0x0000000000000000 [1]
[C7x_1 ]     58.199766 s:     0x0000000000000000 [2]        0x0000000000000000 [2]
[C7x_1 ]     58.199803 s:     0x0000000000000010 [3]        0x00000000add9b9b8 [3]
[C7x_1 ]     58.199834 s:     0x0000000000000001 [4]        0x0000000000000001 [4]
[C7x_1 ]     58.199868 s:     0x0000000000000000 [5]        0x00000000add86d68 [5]
[C7x_1 ]     58.199906 s:     0x0000000000000000 [6]        0xd284c82527ed03b9 [6]
[C7x_1 ]     58.199946 s:     0x2422a1757ff6b4fe [7]        0x0000000000000fa0 [7]
[C7x_1 ]     58.199965 s:     
[C7x_1 ]     58.199992 s: VBL6=0x0000000000000000 [0]    VBL7=0x0000000100000000 [0]
[C7x_1 ]     58.200034 s:     0x0000000000000001 [1]        0xffff0000ffff0004 [1]
[C7x_1 ]     58.200068 s:     0x0000000000000000 [2]        0x000000010801abb0 [2]
[C7x_1 ]     58.200102 s:     0x0000000000000001 [3]        0x000000010c001d20 [3]
[C7x_1 ]     58.200139 s:     0x0000000000000000 [4]        0x003ce34c002ca248 [4]
[C7x_1 ]     58.200178 s:     0x0000000000000000 [5]        0x005d6554004d2450 [5]
[C7x_1 ]     58.200216 s:     0x0000000000000000 [6]        0x007de75c006da658 [6]
[C7x_1 ]     58.200248 s:     0x0000000000000000 [7]        0x0000000000000000 [7]
[C7x_1 ]     58.200265 s:     
[C7x_1 ]     58.200307 s: VB0=0xa5a5a5a5a5a5a5a5 [0]    VB1=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.200356 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.200405 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.200452 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.200499 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.200546 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.200594 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.200643 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.200661 s:     
[C7x_1 ]     58.200702 s: VB2=0xa5a5a5a5a5a5a5a5 [0]    VB3=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.200752 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.200799 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.200846 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.200895 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.200942 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.200990 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.201039 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.201060 s:     
[C7x_1 ]     58.201101 s: VB4=0xa5a5a5a5a5a5a5a5 [0]    VB5=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.201151 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.201198 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.201244 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.201292 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.201340 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.201388 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.201436 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.201455 s:     
[C7x_1 ]     58.201496 s: VB6=0xa5a5a5a5a5a5a5a5 [0]    VB7=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.201544 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.201593 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.201639 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.201686 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.201733 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.201782 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.201830 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.201848 s:     
[C7x_1 ]     58.201891 s: VB8=0xa5a5a5a5a5a5a5a5 [0]    VB9=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.201939 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.201987 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.202037 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.202084 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.202130 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.202177 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.202226 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.202246 s:     
[C7x_1 ]     58.202288 s: VB10=0xa5a5a5a5a5a5a5a5 [0]    VB11=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.202338 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.202387 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.202434 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.202484 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.202532 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.202578 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.202626 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.202645 s:     
[C7x_1 ]     58.202687 s: VB12=0xa5a5a5a5a5a5a5a5 [0]    VB13=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.202736 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.202783 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.202831 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.202878 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.202926 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.202974 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.203020 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.203038 s:     
[C7x_1 ]     58.203081 s: VB14=0xa5a5a5a5a5a5a5a5 [0]    VB15=0xa5a5a5a5a5a5a5a5 [0]
[C7x_1 ]     58.203131 s:     0xa5a5a5a5a5a5a5a5 [1]        0xa5a5a5a5a5a5a5a5 [1]
[C7x_1 ]     58.203178 s:     0xa5a5a5a5a5a5a5a5 [2]        0xa5a5a5a5a5a5a5a5 [2]
[C7x_1 ]     58.203226 s:     0xa5a5a5a5a5a5a5a5 [3]        0xa5a5a5a5a5a5a5a5 [3]
[C7x_1 ]     58.203275 s:     0xa5a5a5a5a5a5a5a5 [4]        0xa5a5a5a5a5a5a5a5 [4]
[C7x_1 ]     58.203322 s:     0xa5a5a5a5a5a5a5a5 [5]        0xa5a5a5a5a5a5a5a5 [5]
[C7x_1 ]     58.203370 s:     0xa5a5a5a5a5a5a5a5 [6]        0xa5a5a5a5a5a5a5a5 [6]
[C7x_1 ]     58.203417 s:     0xa5a5a5a5a5a5a5a5 [7]        0xa5a5a5a5a5a5a5a5 [7]
[C7x_1 ]     58.203435 s:     
[C7x_1 ]     58.203477 s: CUCR0=0x65af9f260dc298ec [0]    CUCR1=0x589bfb751bad536e [0]
[C7x_1 ]     58.203526 s:     0x0372078802109001 [1]        0x980008d1a25d4211 [1]
[C7x_1 ]     58.203575 s:     0x08881294281a9004 [2]        0x0e8bb810a78b230a [2]
[C7x_1 ]     58.203607 s:     0x0000000000000000 [3]        0x0000000000000c40 [3]
[C7x_1 ]     58.203655 s:     0xd2c8ce7e97ad736f [4]        0xb306fead44ca3bfa [4]
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[C7x_1 ]     58.203749 s:     0xc85c05c667860400 [6]        0xc48800511630c197 [6]
[C7x_1 ]     58.203782 s:     0x0000000000000000 [7]        0x0000000000000001 [7]
[C7x_1 ]     58.203801 s:     
[C7x_1 ]     58.203843 s: CUCR2=0x513468f259e45ffe [0]    CUCR3=0x4666efd3f6e1dde3 [0]
[C7x_1 ]     58.203893 s:     0xfafc12d4c4312a2d [1]        0x9512322c2d289702 [1]
[C7x_1 ]     58.203941 s:     0x2ca3710160ac3902 [2]        0x9431230b2782d45b [2]
[C7x_1 ]     58.203976 s:     0x0000000000000001 [3]        0x00000000ffffffff [3]
[C7x_1 ]     58.204023 s:     0x3c4ee1f89ec21ffd [4]        0xc05e2453bb207313 [4]
[C7x_1 ]     58.204069 s:     0xb5b14389a8022086 [5]        0x1bb0220319a15903 [5]
[C7x_1 ]     58.204115 s:     0x60898d20c4840c42 [6]        0x0376337004cdc060 [6]
[C7x_1 ]     58.204148 s:     0x0000000000000000 [7]        0x000000000000015d [7]
[C7x_1 ]     58.204167 s:     
[C7x_1 ]     58.204196 s: SE0_0=0x0000000000000000 [0]    SE0_1=0x000000007e062000 [0]
[C7x_1 ]     58.204233 s:     0x0000000000000000 [1]        0x000000007e062000 [1]
[C7x_1 ]     58.204264 s:     0x0000000000000000 [2]        0x0000000000000000 [2]
[C7x_1 ]     58.204300 s:     0x000000007e062000 [3]        0x0000000000000000 [3]
[C7x_1 ]     58.204334 s:     0x000000007e062000 [4]        0x0000000000000000 [4]
[C7x_1 ]     58.204368 s:     0x000000007e062000 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.204404 s:     0x000000007e062000 [6]        0x0000002000000080 [6]
[C7x_1 ]     58.204443 s:     0x000000007e062000 [7]        0x00005fc000005fc0 [7]
[C7x_1 ]     58.204460 s:     
[C7x_1 ]     58.204491 s: SE0_2=0x0000000000000000 [0]    SE0_3=0x0000180000000000 [0]
[C7x_1 ]     58.204524 s:     0x0000000000000000 [1]        0x0000000000000000 [1]
[C7x_1 ]     58.204565 s:     0x0000000000000000 [2]        0x2182000005005000 [2]
[C7x_1 ]     58.204599 s:     0x0000002000000020 [3]        0x0000000000000000 [3]
[C7x_1 ]     58.204636 s:     0x0000001100000004 [4]        0x0000000000000000 [4]
[C7x_1 ]     58.204671 s:     0x0000000100000004 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.204710 s:     0x00005fc000000080 [6]        0x0000000000000000 [6]
[C7x_1 ]     58.204747 s:     0x00000020000000c0 [7]        0x0000000000000000 [7]
[C7x_1 ]     58.204764 s:     
[C7x_1 ]     58.204794 s: SE1_0=0x0000000000000000 [0]    SE1_1=0x0000001100000004 [0]
[C7x_1 ]     58.204829 s:     0x0000000000000000 [1]        0x0000000000000004 [1]
[C7x_1 ]     58.204865 s:     0x0000000000000000 [2]        0x0000022000000060 [2]
[C7x_1 ]     58.204903 s:     0x0000002000000c40 [3]        0x0000003800000001 [3]
[C7x_1 ]     58.204942 s:     0x0001880000000020 [4]        0x00000020000006c0 [4]
[C7x_1 ]     58.204979 s:     0x0006200000000000 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.205024 s:     0x0062600004405000 [6]        0x219400000d005000 [6]
[C7x_1 ]     58.205061 s:     0x0000002000000020 [7]        0x0000000100000020 [7]
[C7x_1 ]     58.205078 s:     
[C7x_1 ]     58.205116 s: SE1_2=0x0000008000000001 [0]    SE1_3=0xc4308070a80c90d2 [0]
[C7x_1 ]     58.205160 s:     0x0000000400000011 [1]        0x1053b6206f7dfc90 [1]
[C7x_1 ]     58.205202 s:     0x0000003800000220 [2]        0x567cca94578b4c92 [2]
[C7x_1 ]     58.205234 s:     0x0000000000000000 [3]        0x0000000000000808 [3]
[C7x_1 ]     58.205281 s:     0x089a00242201a120 [4]        0xac2ce3e2404d108a [4]
[C7x_1 ]     58.205327 s:     0x328516c4efc0f892 [5]        0x01656818744a12b0 [5]
[C7x_1 ]     58.205374 s:     0x444c5201a02bd481 [6]        0x54db0a100b466e0a [6]
[C7x_1 ]     58.205407 s:     0x0000000000000800 [7]        0x0000000000000001 [7]
[C7x_1 ]     58.205425 s:     
[C7x_1 ]     58.205466 s: SA0CR=0x6f48daef7de7e1ee [0]    SA1CR=0xffffff0004200000 [0]
[C7x_1 ]     58.205510 s:     0x05c00015aa0cdb9e [1]        0x000000ffffffffff [1]
[C7x_1 ]     58.205556 s:     0x121f107024810137 [2]        0x0004000000000000 [2]
[C7x_1 ]     58.205597 s:     0x4db9a935bd6a7b7d [3]        0x0000000000000001 [3]
[C7x_1 ]     58.205646 s:     0x4410dfeafdd78f45 [4]        0x841af775cd84ed2e [4]
[C7x_1 ]     58.205693 s:     0x25404417a2402fab [5]        0x0c424322ac58b92a [5]
[C7x_1 ]     58.205740 s:     0x0e4dd0ba8036de8f [6]        0x002b505d2480c884 [6]
[C7x_1 ]     58.205783 s:     0x000000007f000a20 [7]        0xe0ff4815843d427f [7]
[C7x_1 ]     58.205802 s:     
[C7x_1 ]     58.205837 s: SA2CR=0x0000000000000000 [0]    SA3CR=0x248502c072572002 [0]
[C7x_1 ]     58.205880 s:     0x0000000000000000 [1]        0x3d48430cb65b40e0 [1]
[C7x_1 ]     58.205921 s:     0x0000000000000000 [2]        0x6490d080e1a63ad4 [2]
[C7x_1 ]     58.205952 s:     0x0000000000000001 [3]        0x0000000000000000 [3]
[C7x_1 ]     58.205983 s:     0x0000000000000000 [4]        0x0000000000000000 [4]
[C7x_1 ]     58.206014 s:     0x0000000000000000 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.206046 s:     0x0000000000000000 [6]        0x0000000000000000 [6]
[C7x_1 ]     58.206086 s:     0x0000000000000000 [7]        0xffffffffffffffff [7]
[C7x_1 ]     58.206104 s:     
[C7x_1 ]     58.206147 s: SA0CNTR0=0xd284c82527ed03b9 [0]    SA1CNTR0=0xce35ecdf4e1fb40f [0]
[C7x_1 ]     58.206197 s:     0x8c710040a90960b0 [1]        0xcee71e00ceaded3f [1]
[C7x_1 ]     58.206245 s:     0xd1c8020340614100 [2]        0xce38dff84e80c282 [2]
[C7x_1 ]     58.206286 s:     0x0000000000000000 [3]        0xffffffffffffffff [3]
[C7x_1 ]     58.206326 s:     0x0000000000000000 [4]        0x01c9025a3926ffad [4]
[C7x_1 ]     58.206365 s:     0x0000000000000000 [5]        0x140cc28840620902 [5]
[C7x_1 ]     58.206405 s:     0x0000000000000000 [6]        0x0c93de01dc81a760 [6]
[C7x_1 ]     58.206441 s:     0x000000003fd00000 [7]        0x000000000806dd00 [7]
[C7x_1 ]     58.206459 s:     
[C7x_1 ]     58.206494 s: SA2CNTR0=0x0000000000000000 [0]    SA3CNTR0=0xc6ce1ad2ebdac5f7 [0]
[C7x_1 ]     58.206536 s:     0x0000000000000000 [1]        0x40e48407b70b9d85 [1]
[C7x_1 ]     58.206575 s:     0x0000000000000080 [2]        0x3650403310ea9827 [2]
[C7x_1 ]     58.206607 s:     0x0000000000000000 [3]        0x0000000000000020 [3]
[C7x_1 ]     58.206645 s:     0x0001880000000020 [4]        0x0000000000000000 [4]
[C7x_1 ]     58.206684 s:     0x0006200000000000 [5]        0x0000000000000000 [5]
[C7x_1 ]     58.206727 s:     0x0062600004405000 [6]        0x0001000001003000 [6]
[C7x_1 ]     58.206762 s:     0x0000000000000000 [7]        0x0000000400000020 [7]
[C7x_1 ]     58.206780 s:     
[C7x_1 ]     58.206803 s: Exception at 0x00000000adca19e0
[C7x_1 ]     58.206834 s: TSR at time of exception: 0x000000000100ff03
[C7x_1 ]     58.206853 s: Page fault:
[C7x_1 ]     58.206876 s:   IERR=0x0000000000000001
[C7x_1 ]     58.206898 s:   IEAR=0x0000000120000000
[C7x_1 ]     58.206916 s:   IESR=0x0000000000010846
[C7x_1 ]     58.206934 s:   Page fault exception:
[C7x_1 ]     58.206961 s:     .D1 or .D2 uTLB lookup fault, Non-speculative load
[C7x_1 ]     58.206986 s:     utlb_rstatus=0x846

  • 0
    TI__Expert 8361 points

    Hi;

    Thank you for the question!

    By looking at your post, I am not sure which model you were using. Could you share your model and steps that you have used to get these result? So we can look into it.   

    I picked the model "cl-ort-resnet18-v1" and run it on PC. I posted my results here. You should get similar results. If not, you will have to look into your model/setup.

    Following are two steps and commands I have used. Two log files are the results from these two steps (compiling and inference) 

    1.

    python3 onnxrt_ep.py -c -m cl-ort-resnet18-v1

    2.

    python3 onnxrt_ep.py -m cl-ort-resnet18-v1

    Best regards

    Wen Li

    Fullscreen model_c_m_cl-ort-resnet18-v1.log Download 
    root@fa12de916cc0:/home/root/examples/osrt_python/ort# python3 onnxrt_ep.py -c -m cl-ort-resnet18-v1
Available execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']

Running 1 Models - ['cl-ort-resnet18-v1']


Running_Model :  cl-ort-resnet18-v1  


Running shape inference on model ../../../models/public/resnet18_opset9.onnx 

========================= [Model Compilation Started] =========================

Model compilation will perform the following stages:
1. Parsing
2. Graph Optimization
3. Quantization & Calibration
4. Memory Planning

============================== [Version Summary] ==============================

-------------------------------------------------------------------------------
|          TIDL Tools Version          |              11_00_06_00             |
-------------------------------------------------------------------------------
|         C7x Firmware Version         |              11_00_00_00             |
-------------------------------------------------------------------------------
|            Runtime Version           |                1.15.0                |
-------------------------------------------------------------------------------
|          Model Opset Version         |                   9                  |
-------------------------------------------------------------------------------

============================== [Parsing Started] ==============================

[TIDL Import] [PARSER] WARNING: Network not identified as Object Detection network : (1) Ignore if network is not Object Detection network (2) If network is Object Detection network, please specify "model_type":"OD" as part of OSRT compilation options

------------------------- Subgraph Information Summary -------------------------
-------------------------------------------------------------------------------
|          Core           |      No. of Nodes       |   Number of Subgraphs   |
-------------------------------------------------------------------------------
| C7x                     |                      52 |                       1 |
| CPU                     |                       0 |                       x |
-------------------------------------------------------------------------------
============================= [Parsing Completed] =============================

==================== [Optimization for subgraph_0 Started] ====================

----------------------------- Optimization Summary -----------------------------
---------------------------------------------------------------------------------
|          Layer         | Nodes before optimization | Nodes after optimization |
---------------------------------------------------------------------------------
| TIDL_ReLULayer         |                        17 |                        0 |
| TIDL_FlattenLayer      |                         1 |                        0 |
| TIDL_ConvolutionLayer  |                        20 |                       20 |
| TIDL_EltWiseLayer      |                        10 |                        8 |
| TIDL_InnerProductLayer |                         1 |                        1 |
| TIDL_CastLayer         |                         1 |                        0 |
| TIDL_PoolingLayer      |                         2 |                        2 |
---------------------------------------------------------------------------------

Total nodes in subgraph: 36

=================== [Optimization for subgraph_0 Completed] ===================

The soft limit is 10240
The hard limit is 10240
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
 0.4s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
 0.5s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
 0.102s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-1
 0.116s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-2
 0.709s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
 0.734s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
 0.755s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
 0.776s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
 0.794s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1 
 0.812s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_2 
 0.826s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_3 
 0.842s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_4 
 0.860s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_5 
 0.877s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_6 
 0.893s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_7 
 0.908s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_8 
 0.927s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2 
 0.944s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_2 
 0.964s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_3 
 0.982s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_4 
 0.997s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_5 
 0.1018s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_6 
 0.1033s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_7 
 0.1050s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_8 
 0.1073s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU2-0 
 0.1088s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_LDC1 
 0.1105s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC1 
 0.1125s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC2 
 0.1139s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_VISS1 
 0.1159s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE1 
 0.1177s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE2 
 0.1192s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE3 
 0.1209s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE4 
 0.1226s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY1 
 0.1241s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY2 
 0.1254s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX 
 0.1271s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX2 
 0.1284s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_SDE 
 0.1298s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_DOF 
 0.1320s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_FC 
 0.1337s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU1-0 
 0.1339s:  VX_ZONE_INFO: [tivxInit:152] Initialization Done !!!
 0.1342s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
============= [Quantization & Calibration for subgraph_0 Started] =============


-------- Running Calibration in Float Mode to Collect Tensor Statistics --------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [1 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [2 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [3 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [4 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [5 / 5]: ------------------
[=============================================================================] 100 %

==================== [Quantization & Calibration Completed] ====================

========================== [Memory Planning Started] ==========================


------------------------- Network Compiler Traces ------------------------------
Successful Memory Allocation
Successful Workload Creation

========================= [Memory Planning Completed] =========================

Rerunning network compiler...
========================== [Memory Planning Started] ==========================


------------------------- Network Compiler Traces ------------------------------
Successful Memory Allocation
Successful Workload Creation

========================= [Memory Planning Completed] =========================

======================== Subgraph Compiled Successfully ========================




 
Completed_Model :     1, Name : cl-ort-resnet18-v1                                , Total time :    7555.52, Offload Time :     937.17 , DDR RW MBs : 0, Output Image File : py_out_cl-ort-resnet18-v1_ADE_val_00001801.jpg, Output Bin File : py_out_cl-ort-resnet18-v1_ADE_val_00001801.bin
 
 
MEM: Deinit ... !!!
MEM: Alloc's: 26 alloc's of 142376929 bytes 
MEM: Free's : 26 free's  of 142376929 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!
root@fa12de916cc0:/home/root/examples/osrt_python/ort#
    Fullscreen model_m_cl-ort-resnet18-v1.log Download 
    root@fa12de916cc0:/home/root/examples/osrt_python/ort# python3 onnxrt_ep.py -m cl-ort-resnet18-v1
Available execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']

Running 1 Models - ['cl-ort-resnet18-v1']


Running_Model :  cl-ort-resnet18-v1  

libtidl_onnxrt_EP loaded 0x5678b42e1b30 
Final number of subgraphs created are : 1, - Offloaded Nodes - 52, Total Nodes - 52 
The soft limit is 10240
The hard limit is 10240
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
 0.5s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
 0.6s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
 0.107s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-1
 0.120s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-2
 0.743s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
 0.772s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
 0.818s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
 0.835s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
 0.851s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1 
 0.873s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_2 
 0.890s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_3 
 0.922s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_4 
 0.948s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_5 
 0.983s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_6 
 0.1002s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_7 
 0.1019s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_8 
 0.1046s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2 
 0.1065s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_2 
 0.1080s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_3 
 0.1095s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_4 
 0.1116s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_5 
 0.1133s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_6 
 0.1150s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_7 
 0.1171s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_8 
 0.1188s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU2-0 
 0.1205s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_LDC1 
 0.1242s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC1 
 0.1260s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC2 
 0.1280s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_VISS1 
 0.1310s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE1 
 0.1330s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE2 
 0.1344s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE3 
 0.1361s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE4 
 0.1375s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY1 
 0.1390s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY2 
 0.1407s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX 
 0.1421s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX2 
 0.1436s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_SDE 
 0.1456s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_DOF 
 0.1476s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_FC 
 0.1641s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU1-0 
 0.1659s:  VX_ZONE_INFO: [tivxInit:152] Initialization Done !!!
 0.1667s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO

 ,  0  23.847309  warplane, military plane ,,  1  22.507572  aircraft carrier, carrier, flattop, attack aircraft carrier ,,  2  19.024258  projectile, missile ,,  3  18.756310  missile ,,  4  15.808890  airliner ,

Saving image to  ../../../output_images/

Saving output tensor to  ../../../output_binaries/

 
Completed_Model :     1, Name : cl-ort-resnet18-v1                                , Total time :    1225.43, Offload Time :    1225.36 , DDR RW MBs : 0, Output Image File : py_out_cl-ort-resnet18-v1_airshow.jpg, Output Bin File : py_out_cl-ort-resnet18-v1_airshow.bin
 
 
MEM: Deinit ... !!!
MEM: Alloc's: 26 alloc's of 52881277 bytes 
MEM: Free's : 26 free's  of 52881277 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!
root@fa12de916cc0:/home/root/examples/osrt_python/ort#

  • 0 in reply to Wen Li
    Prodigy 40 points

    Hi, 

    Thank you very much for your reply. I'm attaching the log file from onnxrt_ep.py for compilation and inference, along with the model. Thank you very much for your reply!

    root@4fbd1b8898cf:/home/root# ./scripts/run_j722s.sh 
=== [python3 onnxrt_ep.py -c] ===
Skipping import of model optimizer
Available execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']
Multi-Processing Mode

Running_Model :  best_iketest23  

Model optimizer not found, -o flag has no effect

Running shape inference on model ../../../models/public/best_iketest23.onnx 

========================= [Model Compilation Started] =========================

Model compilation will perform the following stages:
1. Parsing
2. Graph Optimization
3. Quantization & Calibration
4. Memory Planning

============================== [Version Summary] ==============================

-------------------------------------------------------------------------------
|          TIDL Tools Version          |              11_00_06_00             |
-------------------------------------------------------------------------------
|         C7x Firmware Version         |              11_00_00_00             |
-------------------------------------------------------------------------------
|            Runtime Version           |                1.15.0                |
-------------------------------------------------------------------------------
|          Model Opset Version         |                  11                  |
-------------------------------------------------------------------------------

============================== [Parsing Started] ==============================

[TIDL Import]  WARNING: 'meta_layers_names_list' is not provided - running OD post processing in ARM mode
Number of OD backbone nodes = 343 

------------------------- Subgraph Information Summary -------------------------
-------------------------------------------------------------------------------
|          Core           |      No. of Nodes       |   Number of Subgraphs   |
-------------------------------------------------------------------------------
| C7x                     |                     343 |                       1 |
| CPU                     |                       0 |                       x |
-------------------------------------------------------------------------------
============================= [Parsing Completed] =============================

 =======================================================================
 ====> Input nodes name: images
 ====> Output nodes name: output
 ====> Output nodes shape: [1, 22, 4116]
 =======================================================================
==================== [Optimization for subgraph_0 Started] ====================

----------------------------- Optimization Summary -----------------------------
---------------------------------------------------------------------------------
|          Layer         | Nodes before optimization | Nodes after optimization |
---------------------------------------------------------------------------------
| TIDL_TransposeLayer    |                         4 |                        3 |
| TIDL_BatchNormLayer    |                         0 |                       87 |
| TIDL_SigmoidLayer      |                        85 |                        0 |
| TIDL_EltWiseLayer      |                       100 |                       97 |
| TIDL_ConcatLayer       |                        23 |                       23 |
| TIDL_ConvolutionLayer  |                        97 |                       97 |
| TIDL_InnerProductLayer |                         2 |                        2 |
| TIDL_PoolingLayer      |                         4 |                        4 |
| TIDL_ResizeLayer       |                         2 |                        2 |
| TIDL_SoftMaxLayer      |                         2 |                        2 |
| TIDL_SliceLayer        |                        13 |                       23 |
---------------------------------------------------------------------------------

Total nodes in subgraph: 354

=================== [Optimization for subgraph_0 Completed] ===================

The soft limit is 10240
The hard limit is 10240
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
 0.20s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
 0.22s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
 0.176s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-1
 0.206s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-2
 0.955s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
 0.1017s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
 0.1072s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
 0.1138s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
 0.1199s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1 
 0.1292s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_2 
 0.1366s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_3 
 0.1487s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_4 
 0.1538s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_5 
 0.1646s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_6 
 0.1738s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_7 
 0.1832s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_8 
 0.1883s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2 
 0.1944s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_2 
 0.1985s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_3 
 0.2050s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_4 
 0.2171s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_5 
 0.2219s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_6 
 0.2276s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_7 
 0.2336s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_8 
 0.2406s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU2-0 
 0.2463s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_LDC1 
 0.2515s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC1 
 0.2594s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC2 
 0.2683s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_VISS1 
 0.2788s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE1 
 0.2899s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE2 
 0.2950s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE3 
 0.3011s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE4 
 0.3055s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY1 
 0.3108s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY2 
 0.3144s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX 
 0.3210s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX2 
 0.3273s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_SDE 
 0.3327s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_DOF 
 0.3376s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_FC 
 0.3427s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU1-0 
 0.3431s:  VX_ZONE_INFO: [tivxInit:152] Initialization Done !!!
 0.3434s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
============= [Quantization & Calibration for subgraph_0 Started] =============

Inference time:  9.45237684249878

-------- Running Calibration in Float Mode to Collect Tensor Statistics --------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [1 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [2 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [3 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [4 / 5]: ------------------
[=============================================================================] 100 %

------------------ Fixed-point Calibration Iteration [5 / 5]: ------------------
[=============================================================================] 100 %

==================== [Quantization & Calibration Completed] ====================

========================== [Memory Planning Started] ==========================


------------------------- Network Compiler Traces ------------------------------
Successful Memory Allocation
Successful Workload Creation

========================= [Memory Planning Completed] =========================

Rerunning network compiler...
========================== [Memory Planning Started] ==========================


------------------------- Network Compiler Traces ------------------------------
Successful Memory Allocation
Successful Workload Creation

========================= [Memory Planning Completed] =========================

======================== Subgraph Compiled Successfully ========================



Inference time:  225.00611782073975

 
Completed_Model :     1, Name : best_iketest23                                    , Total time :  117228.59, Offload Time :    6058.64 , DDR RW MBs : 0, Output Image File : py_out_best_iketest23_ADE_val_00001801.jpg, Output Bin File : py_out_best_iketest23_ADE_val_00001801.bin
 
 
MEM: Deinit ... !!!
MEM: Alloc's: 26 alloc's of 240763541 bytes 
MEM: Free's : 26 free's  of 240763541 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!
=== [python3 onnxrt_ep.py] ===
Skipping import of model optimizer
Available execution providers :  ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider']
Multi-Processing Mode

Running_Model :  best_iketest23  

libtidl_onnxrt_EP loaded 0x590cb79e5020 
Final number of subgraphs created are : 1, - Offloaded Nodes - 343, Total Nodes - 343 
The soft limit is 10240
The hard limit is 10240
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
 0.30s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
 0.33s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
 0.212s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-1
 0.245s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel vx_tutorial_graph.phase_rgb on target DSP_C7-2
 0.1314s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
 0.1417s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
 0.1497s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
 0.1578s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
 0.1632s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1 
 0.1707s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_2 
 0.1781s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_3 
 0.1852s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_4 
 0.1941s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_5 
 0.2016s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_6 
 0.2095s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_7 
 0.2167s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-1_PRI_8 
 0.2247s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2 
 0.2308s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_2 
 0.2366s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_3 
 0.2449s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_4 
 0.2509s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_5 
 0.2567s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_6 
 0.2625s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_7 
 0.2678s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DSP_C7-2_PRI_8 
 0.2743s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU2-0 
 0.2816s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_LDC1 
 0.2893s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC1 
 0.2959s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_MSC2 
 0.3018s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_VISS1 
 0.3102s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE1 
 0.3160s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE2 
 0.3218s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE3 
 0.3301s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CAPTURE4 
 0.3419s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY1 
 0.3496s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DISPLAY2 
 0.3560s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX 
 0.3628s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target CSITX2 
 0.3703s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_SDE 
 0.3768s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target DMPAC_DOF 
 0.3832s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target VPAC_FC 
 0.3939s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MCU1-0 
 0.3964s:  VX_ZONE_INFO: [tivxInit:152] Initialization Done !!!
 0.3983s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
 =======================================================================
 ====> Input nodes name: images
 ====> Output nodes name: output
 ====> Output nodes shape: [1, 22, 4116]
 =======================================================================
Inference time:  20.776163578033447
Inference time:  21.36379647254944
Inference time:  20.675129413604736
(1, 22, 4116)
[0.58593744 0.70312494 1.0546874  1.0546874  0.         0.
 0.         0.         0.         0.         0.         0.
 0.         0.         0.         0.         0.         0.
 0.         0.         0.         0.11718749]
(1, 22, 4116)
[ 5.697722    5.615829   13.124998   14.062498    0.          0.
  0.          0.          0.          0.          0.          0.
  0.          0.          0.          0.          0.          0.
  0.          0.          0.          0.11718749]
(0, 7)

Saving image to  ../../../output_images/

Saving output tensor to  ../../../output_binaries/

 
Completed_Model :     1, Name : best_iketest23                                    , Total time :   20937.94, Offload Time :   20937.82 , DDR RW MBs : 0, Output Image File : py_out_best_iketest23_yolo11_416.jpg, Output Bin File : py_out_best_iketest23_yolo11_416.bin
 
 
MEM: Deinit ... !!!
MEM: Alloc's: 26 alloc's of 75253886 bytes 
MEM: Free's : 26 free's  of 75253886 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!

    modified_best_iketest23.zip
    Everything seems to be going smoothly, but when we run it on the J722s using TI_DEVICE_armv8_test_dl_algo_host_rt.out, it gets stuck at some point.
    like:
    root@j722s-evm:/opt/tidl_test# ./TI_DEVICE_armv8_test_dl_algo_host_rt.out s:$WORKDIR/config \
> --netBinFile $WORKDIR/tidl_net.bin \
> --ioConfigFile $WORKDIR/tidl_io_buff1.bin \
> --inData $WORKDIR/in_data_list.txt --inFileFormat 2 \
> --outData $WORKDIR/jet_tidl_out.bin --postProcType 1

Processing config file #0 : /home/root/nfs/emulationOnPC/config 
APP: Init ... !!!
   214.428310 s: MEM: Init ... !!!
   214.428417 s: MEM: Initialized DMA HEAP (fd=5) !!!
   214.428631 s: MEM: Init ... Done !!!
   214.428654 s: IPC: Init ... !!!
   214.483148 s: IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
   214.489839 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
   214.490024 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
   214.490047 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
   214.490060 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
   214.491040 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-0 
   214.491451 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-1 
   214.491772 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-2 
   214.492136 s:  VX_ZONE_INFO: [tivxPlatformCreateTargetId:169] Added target MPU-3 
   214.492178 s:  VX_ZONE_INFO: [tivxInitLocal:202] Initialization Done !!!
   214.492205 s:  VX_ZONE_INFO: Globally Disabled VX_ZONE_INFO
[MCU2_0]      2.651430 s: CIO: Init ... Done !!!
[MCU2_0]      2.651483 s: APP: Init ... !!!
[MCU2_0]      2.651494 s: SCICLIENT: Init ... !!!
[MCU2_0]      2.651556 s: SCICLIENT: DMSC FW version [11.0.9--v11.00.09+ (Fancy Rat)]
[MCU2_0]      2.651572 s: SCICLIENT: DMSC FW revision 0xb  
[MCU2_0]      2.651587 s: SCICLIENT: DMSC FW ABI revision 4.0
[MCU2_0]      2.651600 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      2.651612 s: UDMA: Init ... !!!
[MCU2_0]      2.651790 s: UDMA: Init ... Done !!!
[MCU2_0]      2.651805 s: MEM: Init ... !!!
[MCU2_0]      2.651819 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ b5800000 of size 33554432 bytes !!!
[MCU2_0]      2.651846 s: MEM: Init ... Done !!!
[MCU2_0]      2.651858 s: IPC: Init ... !!!
[MCU2_0]      2.651870 s: IPC: 4 CPUs participating in IPC !!!
[MCU2_0]      2.652067 s: IPC: Waiting for HLOS to be ready ... !!!
[MCU2_0]     16.680389 s: IPC: HLOS is ready !!!
[MCU2_0]     16.680451 s: IPC: Init ... Done !!!
[MCU2_0]     16.680470 s: APP: Syncing with 3 CPUs ... !!!
[MCU2_0]     16.680487 s: APP: Syncing with 3 CPUs ... Done !!!
[MCU2_0]     16.680502 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]     16.681413 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]     16.681437 s: FVID2: Init ... !!!
[MCU2_0]     16.681462 s: FVID2: Init ... Done !!!
[MCU2_0]     16.681476 s: VHWA: VPAC Init ... !!!
[MCU2_0]     16.681487 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]     16.681572 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     16.681602 s: VHWA: LDC Init ... !!!
[MCU2_0]     16.681700 s: VHWA: LDC Init ... Done !!!
[MCU2_0]     16.681717 s: VHWA: MSC Init ... !!!
[MCU2_0]     16.682426 s: VHWA: MSC Init ... Done !!!
[MCU2_0]     16.682488 s: VHWA: VISS Init ... !!!
[MCU2_0]     16.683615 s: VHWA: VISS Init ... Done !!!
[MCU2_0]     16.683635 s: VHWA: FC Init ... !!!
[MCU2_0]     16.683673 s: VHWA: FC Init ... Done !!!
[MCU2_0]     16.683685 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]     16.683697 s: VHWA: DMPAC: Init ... !!!
[MCU2_0]     16.683708 s: SCICLIENT: Sciclient_pmSetModuleState module=277 state=2
[MCU2_0]     16.683795 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]     16.683808 s: VHWA: DOF Init ... !!!
[MCU2_0]     16.683911 s: VHWA: DOF Init ... Done !!!
[MCU2_0]     16.683926 s: VHWA: SDE Init ... !!!
[MCU2_0]     16.684164 s: VHWA: SDE Init ... Done !!!
[MCU2_0]     16.684178 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_0]     16.684208 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_ERROR
[MCU2_0]     16.684231 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_WARNING
[MCU2_0]     16.684248 s:  VX_ZONE_INFO: Globally Enabled VX_ZONE_INFO
[MCU2_0]     16.684488 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.test_kernels.cmd_timeout_test on target MCU2-0
[MCU2_0]     16.684555 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.test_kernels.tiovx_overhead on target MCU2-0
[MCU2_0]     16.684601 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.capture.scalar_sink on target MCU2-0
[MCU2_0]     16.684643 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.capture.scalar_source on target MCU2-0
[MCU2_0]     16.684685 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.capture.scalar_sink2 on target MCU2-0
[MCU2_0]     16.684728 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.capture.scalar_source2 on target MCU2-0
[MCU2_0]     16.684770 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.capture.scalar_intermediate on target MCU2-0
[MCU2_0]     16.684816 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.test_kernels.scalar_intermediate_2 on target MCU2-0
[MCU2_0]     16.684859 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.test_kernels.scalar_source_error on target MCU2-0
[MCU2_0]     16.684903 s:  VX_ZONE_INFO: [ownAddTargetKernelInternal:189] registered kernel com.ti.test_kernels.scalar_source_obj_array on target MCU2-0
[C7x_1 ]    128.210473 s:     0x000000007e062000 [3]        0x0000000000000000 [3]
  • 0 in reply to Ylinly Yi
    TI__Expert 8361 points

    Thank you for the zip file.

    Ok, I see; I will allocation  a J722s EVM and run the network on the targeted hardware. It may take me 1 or 2 days to get the board, since I don't have all the EVMs in my hand.

    Regards

    Wen Li  

  • 0 in reply to Wen Li
    Prodigy 40 points

    Thank you

  • 0 in reply to Ylinly Yi
    TI__Expert 8361 points

    Hi;

    Sorry for the delay

    I have allocated an EVM. But I could not run the inference on it correctly yet. I am working on it, once I have the update, I will post them here.

    Best regards

    Wen Li

  • 0 in reply to Wen Li
    TI__Expert 8361 points

    Hello;

    When you were generated your model artifact on PC, what is your import file? We will need that to generate the model artifact (.bin format) and then download it to EVM to do the inference. Could you provide your model import file (in text format) and the inference file (txt format) you used on EVM? Otherwise we could not replicate your problem. 

    If you used "onnxrt_ep.py" to compile, then please provide your "model_configs.py" and "common_utils.py" files. We can use that generate the artifact, but we we will still to look at your inference file. 

    Thanks and regards

    Wen Li