SK-AM62: How is RCNT/XCNT calculated?

Part Number: SK-AM62

Tool/software:

Hi Team,

I tried retrieving the XCNT value programmatically, but I’m not quite sure how the value is actually calculated.
Could someone explain the calculation method used to derive the XCNT value?

Here’s the environment I’m working with:

  • External AHCLKX: 24.5 MHz
  • Sampling frequency: 48,000 Hz
  • Frame period: 32 fs

I’m using the following code to read the XCNT value:

#define MCASP_XCLKCHK_OFFSET     0x00C8
volatile uint32_t *MCASP1_XCLKCHK   = (volatile uint32_t *)(CSL_MCASP1_CFG_BASE + MCASP_XCLKCHK_OFFSET);
#define XCKCHK_MAX 90
#define XCKCHK_MIN 70

void init_mcasp1_xclkchk()
{
    uint32_t val = CSL_REG32_RD(MCASP1_XCLKCHK);

    // clear
    val &= ((0x00 << 16) | (0x00 << 8));

    // Setting MAX/MIN
    val |= (XCKCHK_MAX << 16);
    val |= (XCKCHK_MIN << 8);
    // RPS (McASP system clock divided by 4)
    val |= (2 << 0);
    // write
    CSL_REG32_WR(MCASP1_XCLKCHK, val);
}

void chk_mcasp1_xcnt()
{
    uint32_t xcnt = (CSL_REG32_RD(MCASP1_XCLKCHK) >> 24) & 0xFF;
    uint32_t xmax = (CSL_REG32_RD(MCASP1_XCLKCHK) >> 16) & 0xFF;
    uint32_t xmin = (CSL_REG32_RD(MCASP1_XCLKCHK) >> 8) & 0xFF;
    DebugP_log("[MCASP1]XCNT: %3u | XMAX: %3u | XMIN: %3u\r\n", xcnt, xmax, xmin);
}

void clock_check_main(void *args)
{
    while(true) {
        chk_mcasp1_xcnt();
        DebugP_log("-----------------------------------------\r\n");
        vTaskDelay(pdMS_TO_TICKS(1*1000));
    }
}

Here’s a snippet of the output:

[MCASP1]XCNT:  82 | XMAX:  90 | XMIN:  70
-----------------------------------------
[MCASP1]XCNT:  81 | XMAX:  90 | XMIN:  70
-----------------------------------------
[MCASP1]XCNT:  82 | XMAX:  90 | XMIN:  70
-----------------------------------------
[MCASP1]XCNT:  82 | XMAX:  90 | XMIN:  70
-----------------------------------------

  • I read section 12.1.1.4.15.6.2 Transmit Clock Failure Check and Recovery, but I still don’t understand how the XCNT value is calculated.

  • Hi ,

    The Transmit Clock Failure Detection technique uses a combination of both external and the internal clock to determine external clock loss. From the snippet, I can see that the XCNT value is ranging between 81 and 82. The XMAX and XMIN parameters seem to be correctly configured. On stopping the external clock, you should see the value of the XCKFAIL bit of MCASP_XSTAT register change from 0 to 1. 
    In your testing, are you able to see the XCKFAIL bit getting changed on clock loss?
    How are you simulating external transmit clock failure?

    I am  trying to figure out the mathematics behind the XCNT value. Will get back to you. 

    Regards,
    Ritapravo

  • Hi Ritapravo,
    Thank you for your reply.

    In your testing, are you able to see the XCKFAIL bit getting changed on clock loss?

    Yes, we have confirmed in our test environment that the XCKFAIL bit changes upon clock loss.
    Additionally, when the clock is not being input, the XCNT register stops updating and consistently returns the same value.

    How are you simulating external transmit clock failure?

    We are using our custom-built equipment to input the A2B clock and simulate external transmit clock failure.

    I am  trying to figure out the mathematics behind the XCNT value. Will get back to you. 

    Thank you. I look forward to your update.
    I hope the mathematical analysis will confirm that XCNT values of 81 and 82 are valid outcomes.

  • Hi Satoshi,

    Thank you for the update.

    Additionally, when the clock is not being input, the XCNT register stops updating and consistently returns the same value.

    In absence of external clock, this value will not change. 

    Regards,
    Ritapravo

  • Hi Ritapravo,
    Thank you.
    I understand that the XCNT value is valid when the external clock is disconnected.

    I am  trying to figure out the mathematics behind the XCNT value. Will get back to you. 

    I would appreciate your continued investigation into this matter.

  • Hi Satoshi,

    XCNT is a measure of how many Fclk/XPS pulses per 32 AHCLK pulses.

    In your setup - 

    1. External AHCLKX: 24.5 MHz
    2. XPS (3:0 bits in XCLKCHK register) : 4
    3. McASP Functional clock (Fclk) - 250 MHz

    So, expected XCNT value - 
        ( 32 * (Fclk / XPS) / AHCLKX )
     = ( 32 * (250MHz/4) / 24.5MHz )
     = 81.63

    So, you are getting a value around 81 and 82.

    Regards,
    Ritapravo

  • Hi Ritapravo,

    Thank you, I now understand how the calculation works.
    I'm fine with closing this issue.

    Regards,
    Satoshi