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AM623: Disabling MCU (M4) to Use MCU_UART0 Port from Main Domain — Impact and Considerations

Jack
Mastermind 9315 points
Part Number: AM623
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello AM62x Champ !

We want to use the MCU_UART0 Port (pins B5 and B4) externally. Currently, these pins are connected to ttyS7. During boot-up, we see automatic messages printed via this port.

When we try to send data to this port using:

# stty -F /dev/ttyS7 115200 cs8 -cstopb -parenb -echo
# echo -n "FROM_AM62\r\n" > /dev/ttyS7

the data does not transmit correctly.

After investigation, we found that the UART is occupied by the MCU firmware running on the M4 core, so communication fails when MCU is active. When we stop the M4 MCU process via:

echo stop > /sys/class/remoteproc/remoteproc0/state

communication on ttyS7 works normally.

From this, it seems that only the M4 core (remoteproc0) is using the MCU resources.

Our questions are:

  1. If we stop the remoteproc0 (M4) to use this UART externally, will there be any side effects on other MCU peripherals such as GPIO, I2C, etc. that the MCU firmware manages?

  2. We have not modified the MCU firmware in the default base image. In this case, is it safe to disable MCU (M4 core) and use the UART externally without causing system issues?

  3. If using the UART in this way is acceptable, can we permanently disable the M4 process (remoteproc0) to free the UART for our use?

We would appreciate your guidance regarding the impact of disabling the MCU M4 core on peripheral functionality and best practices for safely using MCU_UART0 externally on the AM6232 series.

Regards, 

Jack

  • 0
    TI__Guru** 103500 points

    Hello Jack,

    Peripheral allocation

    Each peripheral on the AM62x was designed to have a single SW owner. So Linux can use a UART instance, or the M4F can use a UART instance, but both processors cannot use the same UART instance. For more information about peripheral allocation, refer to the AM62x academy:
    Multicore > peripherals > how to allocate peripherals
    https://dev.ti.com/tirex/explore/node?node=A__Ab9v-ikRLJrpmmd7B-xvUw__AM62-ACADEMY__uiYMDcq__LATEST

    Can a processor core in one power domain control a peripheral in another power domain? 

    It depends.

    1) Has the MCU domain been isolated for safety or another usecase?

    If there is a firewall between the MAIN and MCU domains, then a core cannot reach across the firewall to control a peripheral on the other side.

    2) Is there interrupt connectivity between the peripheral and the processor core?

    For a summary of interrupt connectivity, refer to the AM62x Technical Reference Manual (TRM) section 
    Interrupts > Interrupt Architecture > Interrupt Connections Summary

    You can see that there is interrupt connectivity between the GIC (That's for the A53 cores) and UART:MCU domain. So you should be good to go.

    Will the MCU domain M4F firmware run properly if the MCU_UART is disabled in the M4F's SysConfig settings? 

    The MCU_UART is not a requirement for the firmware to run. You would need to talk with your RTOS team to understand what code they are programming for the M4F (if you are programming the M4F in your design).

    Some questions that you might have to consider include "How will we debug the M4F firmware during development". For more resources on how to do stuff like that, please refer to the AM62x academy:
    Multicore > Application Development on Remote Cores
    https://dev.ti.com/tirex/explore/node?node=A__ATWfO3c7FkPk06K9x1nvpA__AM62-ACADEMY__uiYMDcq__LATEST

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    TI__Guru** 103500 points

    If you are NOT using the M4F core in your design

    I would suggest disabling the core in the Linux devicetree file. That will prevent Linux from loading firmware into the M4F, and then the M4F will not be using system resources. That would also allow you to free up the DDR allocations that are currently set aside for the MCU M4F core.

    For more information, please refer to the AM62x academy:
    Multicore > Booting & disabling processor cores > Methods to disable remote cores
    https://dev.ti.com/tirex/explore/node?node=A__AYOA.KT56sP6jW8Ke3ucPQ__AM62-ACADEMY__uiYMDcq__LATEST

    Regards,

    Nick