AM623: SPI clock settings

Hi Holger,

I'm not very familiar with ICSS and TIDA. Could you please point the document where you are seeing SPI implementation in ICSS?

Thanks,

Stan

Hi,
https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/EXAMPLES_PRU_ADC_ADS127.html 

The ADS127 is connected over SPI to the PRU.

Regards, Holger

Hello HS FAE Germany / Holger 

Can you please confirm this is for AM62L.

I ask this question since AM62L doe not support PRUSS.

Regards,

Sreenivasa

Hi Sreenivasa,
sorry for confusion. It is AM623.

Regards, Holger

Holger

We have not tried anything like this with AM62 PRU. I have reassigned to Nick Saulnier  to see if he can provide any additional guidance for customer to try this on their own. 
Regards

Mukul 

Hello Holger,

1) What SPI peripheral is this?

2) Does this SPI peripheral already have a Linux driver?

3) Are those the exact frequencies needed? (for example, exactly 1,600,000 Hz)

In general, the PRU cores are probably capable of implementing a SPI protocol at the speeds that you need. The question is whether the customer actually needs to go through the development effort of writing PRU firmware and a Linux side driver to interact with the PRU code, or if we could just do these SPI clocks with the SPI hardware peripheral.

I am sending your thread to a member of our hardware team to start by looking into exactly what SPI clock frequencies the SPI peripheral can support. They can send the thread back to me to discuss PRU development if it seems like that is the best option.

Regards,

Nick

Hi Nick,
first plan was to use the M4 using the SPI:
M4 – SPI – customer-ASIC
But I don't think the need clocks can be configured. Therefor the idea with the PRU.

> Does this SPI peripheral already have a Linux driver?
I don't think so.

> 3) Are those the exact frequencies needed? (for example, exactly 1,600,000 Hz)
no, +/- 10% are ok

>  whether the customer actually needs to go through the development effort of writing PRU firmware 
do we have a Linux example for SPI or other peripheral?

Regards, Holger

Hi all,

Regarding

Nick Saulnier said:

I am sending your thread to a member of our hardware team to start by looking into exactly what SPI clock frequencies the SPI peripheral can support.

With the default sysclk clock speed, MCSPIs can operate at 1.5625 MHz which is within 10% for 1.6 MHz and slightly beyond 10% for 1.4 MHz.

Programmable MCSPI clock
– Bit rate

If playing with the Sysclk divider, frequencies very close to 1.4 and 1.78 are possible, however Sysclk speed affects many other peripherals, cannot be changed on the fly, and also all MCSPIs share the same (Sysclk) clock. That is, one cannot clock MCSPIs with separate clocks, except for the MCSPIs located in the MCU domain (they have their own MCU Sysclk, also shared).

Holger,

Do they need 3 SPIs working in parallel, or one SPI switching across 3 frequencies?

Regards,

Stan

Hi all,

Please note above updates.

The speed table and TRM page reference is added for customer to quickly review.

Regards,

Sreenivasa

Hi Stan,

> Do they need 3 SPIs working in parallel, or one SPI switching across 3 frequencies?
on SPI switching across 3 frequencies

Regards, Holger

Hi Holger, 

Thanks, that was to figure out the whole picture. The possible clock frequencies of MCSPIs I found are described in my previews posts.

Regards,

Stan

Hi Stan,
they can't change the system clock by when changing SPI clock. This would have influence on other clock dependencies in the system. So the are looking into an PRU SPI solution.

Regards, Holger

Hi Holger,

What I posted is the internal MCSPI divider settings based on 50-MHz clock..

Ok, it does not look like the hardware SPI is a good fit for this design.

Stan,
Thank you for your inputs from the hardware side!

Holger,
Thank you for your patience with us as we worked through this process. I will grab the thread back to discuss next steps to evaluate a PRU-based solution.

Regards,

Nick