DRA829J: As a large vehicle manufacturer, we are considering using TI's chips for onboard devices. I would like to ask questions regarding the following matters.

hidenori inoue

Part Number: DRA829J

Tool/software:

1. Are there any factors other than exceeding the error counter that can cause a bus-off? For example, effects due to noise, etc.

2. What is the recommended maximum value for the error counter? Is it 255? We have set the maximum value of the error counter to 16 in a different system; is this acceptable?

26 days ago

0 Brijesh Jadav 26 days ago

TI__Guru**** 476595 points

Hi,

I am sorry, but what error counter do you mean here?

Regards,

Brijesh

0 hidenori inoue 26 days ago in reply to Brijesh Jadav

Prodigy 40 points

Transmission Error Counter Register (TEC) or Reception Error Counter Register (REC) counter

What other factors are there besides the above CounterMax?

0 kcastille 25 days ago in reply to hidenori inoue

TI__Guru 54382 points

Hi,

Can you give more context for your question? Is this related to the MCAN IP? Or something else?

Thanks,

Kyle

0 hidenori inoue 24 days ago in reply to kcastille

Prodigy 40 points

Hi.
sorry.
I'm thinking of using regular CAN, not MCAN IP.

+1 kcastille 24 days ago in reply to hidenori inoue

TI__Guru 54382 points

Hi,

1. There are no SoC specific issues (like SoC supply noise) that would directly force a bus off state. Any bus off considerations would be part of the CAN industry standard spec.

2. The REC is limited to 128 errors max (bits 14-8) and TEC is limited to 256 errors max (bits 7-0). System software can choose to react to these errors at a lower threshold if desired. TI has no recommendation on that detail.

Regards,

Kyle

Processors

Processors forum

DRA829J: As a large vehicle manufacturer, we are considering using TI's chips for onboard devices. I would like to ask questions regarding the following matters.