Tool/software:
Hello engineer
We use am64x as a PCIe EP device, and the RC side, maybe is Windows or Linux system, how can I deal with the driivers on the RC?
Thanks!
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Tool/software:
Hello engineer
We use am64x as a PCIe EP device, and the RC side, maybe is Windows or Linux system, how can I deal with the driivers on the RC?
Thanks!
Are you using the AM64x as an EP using Linux (i.e. Processor SDK Linux) or FreeRTOS/Bare-Metal (MCU+ SDK)?
If you're using MCU+ SDK on the EP and the pcie_enumerate_ep example you can find the matching RC driver examples in tools\hostdrivers\pcie.
ti-sample-vfio is the example driver for Linux (userspace using VFIO)
ti-sample-kmdf is the examle driver for Windows (kernel mode driver using KMDF)
Regards,
Dominic
Hi Bin,
We want to use am64x to send the collected data to RC.
Now we just used the commands to config the EP mode, according to the following document:
How to automatically configure EP when powered on and have power on timing requirements with RC? We are not sure how to achieve this yet?
If you have any relevant references, please let me know.
Thanks!
Hi Jacky,
How to automatically configure EP when powered on and have power on timing requirements with RC? We
I am not sure what power on timing you refer to. But to let the RC to enumerate the EP, the EP has to be ready before RC enumeration happens. But I believe otherwise the RC can manually rescan the PCIe bus to enumerate the EP.
Thanks Bin,
You gave me great tips!
I still need to ask:
1. How to configure EP? Is it commercially available to configure it according to our debugging method? Follow the document:
2.Does RC interrupt when EP plugin is running? Or a similar mechanism to trigger manually rescan of ondemand?
Thanks!
Hi Jacky,
you initially mentioned Windows or Linux, so I assume your RC is an x86?
Would this be "any PC", or one particular setup?
With "any PC" you'll probably run into issues due to the PC's BIOS. A PCIe card is expected to start link training within 20ms after PCIe reset is released, and you're only guaranteed 100ms of stable power before reset is released. Is that the
power on timing requirements with RC
you were thinking above?
If you have at least some control over the RC, you could ensure that the BIOS e.g. supports hot plugging. That way e.g. RC Linux could rescan PCIe at a later time, and enumerate your EP after your AM64x Linux had a chance to set everything up. Not sure if this is supported on Windows (i.e. I couldn't find such a feature).
PC BIOS might even *disable* a PCIe slot if there's no link detected within this startup requirements (I've actually seens this happen).
An alternative if you have tighter control over EP and RC is having the EP boot earlier, and release the RC from reset when the EP is ready to be enumerated.
For "ARM Linux", like an AM64x or other TI AM6* RC, this is less of a problem, because there are no BIOS assumptions that interfere, and you can (from my experience) always rescan and enumerate your EP at a later time.
Regards,
Dominic