linux hangs at "Uncompressing Linux... done, booting the kernel." with OMAPL138 custom board

Hi Durga,

Please find similar discussion in below forum query:

http://e2e.ti.com/support/embedded/linux/f/354/t/121207.aspx?PageIndex=1

Thanks,

Prakash

Hi,

You can also check linux booting problems explained here
http://processors.wiki.ti.com/index.php/Kernel_-_Common_Problems_Booting_Linux

Thanks!

Regards
Sathish

Hi Prakash and Sathish,

I have looked into the links given. I have done all of them already.
The patches given in WIKI are already part of my linux code.

Also please answer following.
Should we do PLL changes in linux as well if the clock is running at diff freq than the EVM? If so, where can we change the PLLDIV1, PLLDIV2.. values?
arch/arm/mach-davinci/da850.c has the PLLDIV register offsets. But where the actual values to be set?

thanks, Durga

Hi Durga,

Basically clocks should be stable before your u-boot or kernel comes up. So PLL settings will be part of your  ubl/x-loader. Please check your UBL code for changing PLL. RBL is the first code runs after your reset, which call UBL for basic board settings.

Thanks!!

Regards
Sathish

Hi Sathish,

I have checked the UBL code and PLL settings all look correct.

Also if PLL settings are not changed in uboot and linux, will it not affect UART baud rate as UART clk is configured differently?
(PLL is set to run at 24MHz in uboot and linux whereas I need 27MHz.)

thanks, Durga

Not clear from the posts if the UART1 has been pinmuxed in and associated controllers pinmuxed out in board-da850-evm.c. The last pinmux setting will win otherwise. A wild guess here. I think you should be able to change the "#define DA850_REF_FREQ  24000000" line in da850.c to 27000000 and all clock calculations downstream will be corrected.

Norman,

UART1 pinmux is done in board-da850-evm.c but not sure about the controller pinmux.

da8xx_pinmux_setup(da850_uart1_pins);

Also, check the following. I guess following enables all 3 uarts.

static struct davinci_uart_config da850_evm_uart_config __initdata = {
    .enabled_uarts = 0x7,
};

davinci_serial_init(&da850_evm_uart_config);

thanks, Durga

Okay. My experience is with the OMAP-L137. On that processor, "other controllers" like the McASP0 used the same pins as UART1. I had to remove McASP0 pinmuxing. Looking more deeply into the pinmux map of the OMAP-L138, it appears that UART1 pins are not shared with anything else significant. Unless you use RTS and CTS flow control (AFE kernel option). Quite a puzzle. Everything looks good.

If the PLL change is not accounted for, the baud rate is won't be 115200. Something should still come out the serial port but at the incorrect rate. I would expect the occasional garbage character to appear on the terminal emulator. Maybe hook up a scope and check for TX activity.

Another thought. There were slight changes from 3.20 to 3.21 of Linux. If it exists,  you might have to comment out the line

__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30)

I think the line turns off the power to the UART controller. Later versions of the kernel do not have this line.

Hello durga and Hello Guys

I have similar situation like yours where we will migrate from using 24Mhz input clock to 27Mhz clock on custom OMAPl138 board

I am using OMAPL138 flash and boot utility and I think to configure the UBL for the 27Mhz clock I have to make changes to the call to DEVICE_PLL0Init in OMAP-L138/Common/src/device.c under

by default it is status |= DEVICE_PLL0Init(0, 24, 0, 1, 0, 11, 5);

could you please tell me which values did you use for 27Mhz clock input and how are these values related to the default linux initilization output:

PLL1: input = 24 MHz [ * 25 / 2] --> 300 MHz output

Thanks for your help

Since your input clock is 27MHz, you can set following.

For PLL0:
        PLLM = 22
        POSTDIV = 1
        PLLDIV1 = 0
        PLLDIV2 = 1
        PLLDIV3 = 11
        PLLDIV7 = 5

For PLL1:
        PLLM = 22
        POSTDIV = 1
        PLLDIV1 = 0
        PLLDIV2 = 1
        PLLDIV3 = 2

With above settings, you will get SYSCLK1 = 297MHz (27*22/2).

Refer OMAPL138 data sheet (SPRS586D) Table 5-5 which tells the maximum clock frequencies. You need to configure PLLM, POSTDIV, PLLDIV1 etc., so that SYSCLK values are within the range.

thanks durga

Looks like the problem is with bootargs. I removed "earlyprintk=serial,ttyS1,115200n8" from bootargs and started getting some junk characters in the console.

thanks, Durga

Hi Durga

glad that you managed to solve your problem, Could I ask you a question

when using my custom UART boot mode board with 27Mhz crystal, I don't get the BOOTME message in the terminal but I get some rubbish characters and because of that i am not able to use the serial flasher even after the changes for 27Mhz crystal

were you able to see the BOOTME message when using your cusom board when the baud rate of the console is 115200?

Kind Regards