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AM6546: Question about ICSSG Device Tree Modifications

Tsai YunEn
Prodigy 90 points

Part Number: AM6546

Tool/software:

Hi , TI Team

I'm currently attempting to migrate the Device Tree Source (DTS) from Linux version 5.1 to 6.1, specifically focusing on the Ethernet section. I've encountered issues and am unable to boot into Userspace (which was possible before the modifications).

Log:

[    7.945692] remoteproc remoteproc0: b00a000.txpru is available
[    7.955557] remoteproc remoteproc1: b00c000.txpru is available
[    7.971101] remoteproc remoteproc2: b10a000.txpru is available
[    7.971735] remoteproc remoteproc3: b10c000.txpru is available
[    7.979169] remoteproc remoteproc4: b20a000.txpru is available
[    7.984965] remoteproc remoteproc5: b20c000.txpru is available
[   10.998005] remoteproc remoteproc6: b006000.rtu is available
[   11.000350] remoteproc remoteproc7: b234000.pru is available
[   11.002656] remoteproc remoteproc8: b204000.rtu is available
[   11.004690] remoteproc remoteproc9: b034000.pru is available
[   11.006529] remoteproc remoteproc10: b004000.rtu is available
[   11.008237] remoteproc remoteproc11: b134000.pru is available
[   11.009919] remoteproc remoteproc12: b104000.rtu is available
[   11.010608] remoteproc remoteproc13: b138000.pru is available
[   11.012986] remoteproc remoteproc14: b106000.rtu is available
[   11.013622] remoteproc remoteproc15: b038000.pru is available
[   11.015955] icssg-prueth: probe of icssg1-eth failed with error -2
[   11.016346] icssg-prueth: probe of icssg2-eth failed with error -2
[   11.017239] remoteproc remoteproc16: b238000.pru is available
[   11.018917] remoteproc remoteproc17: b206000.rtu is available
[   14.076450] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[   14.091321] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[   14.092685] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
[   14.094843] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[   14.094872] cfg80211: failed to load regulatory.db

Linux 5.1 Dts:

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible =  "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	aliases {
		ethernet1 = &pruss1_emac0; //Ethernet port 0
		//ethernet2 = &pruss1_emac1; //EtherCAT port 1
		ethernet2 = &pruss2_emac0; //Ethernet port 1
	};

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";
#if 0
			/* 4G RAM */
			reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
				<0x00000008 0x80000000 0x00000000 0x80000000>;
#endif
			/* 1G RAM */
			reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
        };

	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure_ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00200000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	eeprom_gpio: eeprom_gpio {
		compatible = "eeprom-gpio";
		eeprom-gpio = <&wkup_gpio0 7 GPIO_ACTIVE_HIGH>;
	};

	clk_ov5640_fixed: fixed-clock-ov5640 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&ledgpio0_pins_default &ledgpio1_pins_default &ledgpio2_pins_default>;

		compatible = "gpio-leds";

		led1 {
			label = "LED-RUN";
			gpios = <&main_gpio0 27 GPIO_ACTIVE_LOW>;
		};

		led2 {
			label = "LED-ERR";
			gpios = <&main_gpio1 70 GPIO_ACTIVE_HIGH>;
		};

		led3 {
			label = "LED-BUS";
			gpios = <&main_gpio1 48 GPIO_ACTIVE_HIGH>;
		};

		led4 {
			label = "LED-232TX";
			gpios = <&main_gpio1 21 GPIO_ACTIVE_HIGH>;
		};

		led5 {
			label = "LED-232RX";
			gpios = <&main_gpio0 26 GPIO_ACTIVE_HIGH>;
		};

		led6 {
			label = "LED-485TX";
			gpios = <&main_gpio1 87 GPIO_ACTIVE_HIGH>;
		};

		led7 {
			label = "LED-485RX";
			gpios = <&main_gpio1 46 GPIO_ACTIVE_HIGH>;
		};

		led8 {
			label = "LED-SD";
			gpios = <&main_gpio0 23 GPIO_ACTIVE_HIGH>;
		};
	};

	//Eric+{
		/* Dual Ethernet application node on PRU-ICSSG1 */
	pruss1_eth: pruss1_eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
				<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
						<2>,
						<2>,
						<2>,      /* MII mode */
						<2>,
						<2>;
		mii-g-rt = <&icssg1_mii_g_rt>;
		mii-rt = <&icssg1_mii_rt>;
		dma-coherent;
		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			   <&main_udmap 0xc201>, /* egress slice 0 */
			   <&main_udmap 0xc202>, /* egress slice 0 */
			   <&main_udmap 0xc203>, /* egress slice 0 */
			   <&main_udmap 0xc204>, /* egress slice 1 */
			   <&main_udmap 0xc205>, /* egress slice 1 */
			   <&main_udmap 0xc206>, /* egress slice 1 */
			   <&main_udmap 0xc207>, /* egress slice 1 */

			   <&main_udmap 0x4200>, /* ingress slice 0 */
			   <&main_udmap 0x4201>, /* ingress slice 1 */
			   <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			   <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
					"tx1-0", "tx1-1", "tx1-2", "tx1-3",
					"rx0", "rx1",
					"rxmgm0", "rxmgm1";

        pruss1_emac0: ethernet-mii0 {
                phy-handle = <&pruss1_eth0_phy>;
                phy-mode = "rgmii-rxid";
                ti,half-duplex-capable;
                interrupts-extended = <&icssg1_intc 24>;
                syscon-rgmii-delay = <&scm_conf 0x4110>;
                iep = <&icssg1_iep0>;
                /* Filled in by bootloader */
                local-mac-address = [00 00 00 00 00 00];
        };
#if 0
        pruss1_emac1: ethernet-mii1 {
                phy-handle = <&pruss1_eth1_phy>;
                phy-mode = "rgmii-rxid";
                interrupts-extended = <&icssg1_intc 25>;
                syscon-rgmii-delay = <&scm_conf 0x4114>;
                /* Filled in by bootloader */
                local-mac-address = [00 00 00 00 00 00];
        };
#endif
	};
	//Eric+}

	/* Single Ethernet application node on PRU-ICSSG2 */ 
	pruss2_eth: pruss2_eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;
		mii-g-rt = <&icssg2_mii_g_rt>;
		mii-rt = <&icssg2_mii_rt>;
		dma-coherent;
		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
			    "rxmgm0", "rxmgm1";

		pruss2_emac0: ethernet-mii0 {
			phy-handle = <&pruss2_eth0_phy>;
			phy-mode = "rgmii-rxid";
			ti,half-duplex-capable;
			interrupts-extended = <&icssg2_intc 24>;
			syscon-rgmii-delay = <&scm_conf 0x4120>;
			iep = <&icssg2_iep0>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};
	};
};

&wkup_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&eepromdone_pins_default &iovolctrl_pins_default &vbusctrl_pins_default &mcuboot_pins_default>;

	phy2ax58100_pins_default: phy2ax58100_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_INPUT, 1) /* (N4) MCU_RGMII1_TX_CTL.MCU_RMII1_CRS_DV */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 1) /* (N5) MCU_RGMII1_RX_CTL.MCU_RMII1_RX_ER */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 1) /* (M4) MCU_RGMII1_TD1.MCU_RMII1_TXD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 1) /* (M5) MCU_RGMII1_TD0.MCU_RMII1_TXD0 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 1) /* (M6) MCU_RGMII1_RD1.MCU_RMII1_RXD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 1) /* (L6) MCU_RGMII1_RD0.MCU_RMII1_RXD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 1) /* (N1) MCU_RGMII1_TXC.MCU_RMII1_TX_EN */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 1) /* (M1) MCU_RGMII1_RXC.MCU_RMII1_REF_CLK */
		>;
	};

	mcan0_pins_default: mcan0_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00ac, PIN_INPUT, 0) /* (W2) MCU_MCAN0_RX */
			AM65X_WKUP_IOPAD(0x00a8, PIN_OUTPUT, 0) /* (W1) MCU_MCAN0_TX */
		>;
	};

	phy2ax58100_mdio2_pins_default: phy2ax58100_mdio2_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};

	usb5vsignal_pins_default: usb5vsignal_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00c4, PIN_INPUT, 7) /* (AD3) WKUP_GPIO0_5 */
		>;
	};

	iovolctrl_pins_default: iovolctrl_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6 */ /*IO_VOLCTRL*/
		>;
	};

	eepromdone_pins_default: eepromdone_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00cc, PIN_INPUT, 7) /* (AC1) WKUP_GPIO0_7 */ /*EEP_DONE*/
		>;
	};

	vbusctrl_pins_default: vbusctrl_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00D8, PIN_OUTPUT, 7) /* (AB3) WKUP_GPIO0_10 */ /*USBVBUSCTRL*/
		>;
	};

    mcuboot_pins_default: mcuboot_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00B0, PIN_INPUT, 7) /* (AF4) WKUP_GPIO0_0 */ /*MCU-BOOT0*/
            AM65X_WKUP_IOPAD(0x00B4, PIN_INPUT, 7) /* (AF3) WKUP_GPIO0_1 */ /*MCU-BOOT1*/
            AM65X_WKUP_IOPAD(0x00B8, PIN_INPUT_PULLDOWN, 7) /* (AE3) WKUP_GPIO0_2 */ /*MCU-BOOT2*/
            AM65X_WKUP_IOPAD(0x00BC, PIN_INPUT_PULLDOWN, 7) /* (AD1) WKUP_GPIO0_3 */ /*MCU-BOOT3*/
            AM65X_WKUP_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7) /* (AC3) WKUP_GPIO0_4 */ /*MCU-BOOT4*/
            AM65X_WKUP_IOPAD(0x00D0, PIN_INPUT_PULLDOWN, 7) /* (AC5) WKUP_GPIO0_8 */ /*MCU-BOOT8*/
            AM65X_WKUP_IOPAD(0x00D4, PIN_INPUT, 7) /* (AB4) WKUP_GPIO0_9 */ /*MCU-BOOT9*/
            AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) /* (Y2) */ /*MCU-BOOT5*/
            AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7) /* (Y1) */ /*MCU-BOOT6*/
            AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7) /* (Y3) */ /*MCU-BOOT7*/
		>;
	};
};

&main_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default>;

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7)  /* (AG11) GPIO1_27 */ /*Latch*/
			AM65X_IOPAD(0x01f0, PIN_INPUT, 7)   /* (AD11) GPIO1_28 */ /*/DO-FAULT*/
			AM65X_IOPAD(0x01f4, PIN_INPUT, 1)   /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 1)   /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 1)   /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 1)   /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
			AM65X_IOPAD(0x0204, PIN_INPUT, 1)   /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
			AM65X_IOPAD(0x0208, PIN_INPUT, 1)   /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
			AM65X_IOPAD(0x020c, PIN_INPUT, 1)   /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
			AM65X_IOPAD(0x0210, PIN_INPUT, 1)   /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
			AM65X_IOPAD(0x0214, PIN_INPUT, 7)   /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
			AM65X_IOPAD(0x0218, PIN_INPUT, 7)   /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
			AM65X_IOPAD(0x021c, PIN_INPUT, 7)   /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
			AM65X_IOPAD(0x0220, PIN_INPUT, 7)   /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
			AM65X_IOPAD(0x0224, PIN_INPUT, 7)   /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
			AM65X_IOPAD(0x0228, PIN_INPUT, 7)   /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
			AM65X_IOPAD(0x022c, PIN_INPUT, 7)   /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
			AM65X_IOPAD(0x0230, PIN_INPUT, 7)   /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
			AM65X_IOPAD(0x0234, PIN_INPUT, 1)   /* (AD28) GPIO1_45 */ /*HS_PRU0_LV*/
			AM65X_IOPAD(0x023C, PIN_OUTPUT, 7)   /* (V25) GPIO1_47 */ /*HS_PRU0_IRQ*/
			AM65X_IOPAD(0x0244, PIN_OUTPUT_PULLDOWN, 7) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */ /*****************************************************************************/
			AM65X_IOPAD(0x0248, PIN_OUTPUT_PULLDOWN, 7) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */ /*We set the mode as 7 due to PRU cannot control default status of output pin*/
			AM65X_IOPAD(0x024c, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */ /*And we set the mode back to 0 using memdev2 after PRU init*/
			AM65X_IOPAD(0x0250, PIN_OUTPUT_PULLDOWN, 7) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */ /*****************************************************************************/
			AM65X_IOPAD(0x0284, PIN_INPUT, 7)   /* (AC24) GPIO1_65 */
			AM65X_IOPAD(0x0290, PIN_INPUT, 7)   /* (W26) GPIO1_68 */
			AM65X_IOPAD(0x0294, PIN_INPUT, 7)   /* (AE26) GPIO1_69 */
			AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) GPIO1_20 */ /*SEL-OUT*/
		>;
	};

	ledgpio1_pins_default: ledgpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7)  /* (AG12) GPIO1_21 */ /* RS232-TX-LED */
			AM65X_IOPAD(0x0238, PIN_OUTPUT, 7)  /* (U26) GPIO1_46 */ /* RS485-RX-LED */
			AM65X_IOPAD(0x0240, PIN_OUTPUT, 7)  /* (U24) GPIO1_48 */ /* BUSFAULT-LED */
			AM65X_IOPAD(0x0298, PIN_OUTPUT, 7)  /* (AE28) GPIO1_70 */ /* ERROR-LED */
		>;
	};

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0040, PIN_OUTPUT, 7)  /* (R28) GPIO0_16 */ /*ETH1-PHY-RESET*/
			AM65X_IOPAD(0x0058, PIN_INPUT, 7)   /* (R26) GPIO0_22 */ /*RUN/STOP SW*/
			AM65X_IOPAD(0x005c, PIN_OUTPUT, 7)  /* (R23) GPIO0_23 */ /* SD-CARD-READY-LED */
			AM65X_IOPAD(0x0060, PIN_OUTPUT, 7)  /* (T25) GPIO0_24 */ /*/AX58100-RST*/
			AM65X_IOPAD(0x0064, PIN_OUTPUT, 7)  /* (T24) GPIO0_25 */ /*/AX58100-PYH-RST*/
			AM65X_IOPAD(0x0068, PIN_OUTPUT, 7)  /* (R24) GPIO0_26 */ /* RS232-RX-LED */
			AM65X_IOPAD(0x0070, PIN_OUTPUT, 7)  /* (R25) GPIO0_28 */ /*GPIO-eMMC-RST*/
			AM65X_IOPAD(0x0074, PIN_INPUT, 7)   /* (T27) GPIO0_29 */ /*/24V-LV*/
			AM65X_IOPAD(0x00ac, PIN_INPUT, 1)   /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 1)   /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 1)   /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 1)   /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 7)  /* (AC15) GPIO0_53 */ /*CAN-TERM*/
			AM65X_IOPAD(0x00d8, PIN_INPUT, 1)   /* (AD14) GPIO0_54 */ /*HS_PRU2_LV*/
			AM65X_IOPAD(0x00dc, PIN_OUTPUT, 7)   /* (AE14) GPIO0_55 */ /*HS_PRU2_IRQ*/
			AM65X_IOPAD(0x00f4, PIN_INPUT | PIN_OUTPUT, 7)   /* (AF27) GPIO0_61 */ /*PRU0-IRQ*/
			AM65X_IOPAD(0x00fc, PIN_INPUT | PIN_OUTPUT, 7)   /* (AG27) GPIO0_63 */ /*PRU2-IRQ*/
			AM65X_IOPAD(0x0108, PIN_OUTPUT, 7)  /* (AH25) GPIO0_66 */ /*ETH0-PHY-RESET*/
			AM65X_IOPAD(0x0124, PIN_OUTPUT, 7)  /* (AH26) GPIO0_73 */ /*ECAT2-PHY-RST*/

            AM65X_IOPAD(0x0000, PIN_INPUT_PULLDOWN, 7)  /* (M27) GPIO0_0 */
            AM65X_IOPAD(0x0004, PIN_INPUT, 7)  /* (M23) GPIO0_1 */
            AM65X_IOPAD(0x0008, PIN_INPUT, 7)  /* (M28) GPIO0_2 */
            AM65X_IOPAD(0x000C, PIN_INPUT_PULLDOWN, 7)  /* (M24) GPIO0_3 */
            AM65X_IOPAD(0x0010, PIN_INPUT_PULLDOWN, 7)  /* (N24) GPIO0_4 */
            AM65X_IOPAD(0x0014, PIN_INPUT_PULLDOWN, 7)  /* (N27) GPIO0_5 */
            AM65X_IOPAD(0x0018, PIN_INPUT, 7)  /* (N28) GPIO0_6 */
            AM65X_IOPAD(0x001C, PIN_INPUT_PULLDOWN, 7)  /* (M25) GPIO0_7 */
            AM65X_IOPAD(0x0020, PIN_INPUT_PULLDOWN, 7)  /* (N23) GPIO0_8 */
            AM65X_IOPAD(0x0024, PIN_INPUT_PULLDOWN, 7)  /* (M26) GPIO0_9 */
            AM65X_IOPAD(0x0028, PIN_INPUT_PULLDOWN, 7)  /* (P28) GPIO0_10 */
            AM65X_IOPAD(0x002C, PIN_INPUT_PULLDOWN, 7)  /* (P27) GPIO0_11 */
            AM65X_IOPAD(0x0030, PIN_INPUT_PULLDOWN, 7)  /* (N26) GPIO0_12 */
            AM65X_IOPAD(0x0034, PIN_INPUT, 7)  /* (N25) GPIO0_13 */
            AM65X_IOPAD(0x0038, PIN_INPUT_PULLDOWN, 7)  /* (P24) GPIO0_14 */
            AM65X_IOPAD(0x003C, PIN_INPUT_PULLDOWN, 7)  /* (R27) GPIO0_15 */
            AM65X_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7)  /* (P25) GPIO0_17 */
            AM65X_IOPAD(0x0048, PIN_INPUT, 7)  /* (P26) GPIO0_18 */
            AM65X_IOPAD(0x004C, PIN_INPUT, 7)  /* (U28) GPIO0_19 */
		>;
	};

	ledgpio0_pins_default: ledgpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPIO0_27 */ /* RUN-LED */
		>;
	};

	main_mmc0_pins_default: main-mmc0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
		>;
	};

	icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};

	ethernet0_pins_default: ethernet0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
			AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
			AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
			AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
			AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
			AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

			//ethercat1_pins_default
			AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
			AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
			AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
			AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
			AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
			AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
		>;
	};

	icssg2_mdio_pins_default: icssg2_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	ethernet1_pins_default: ethernet1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 0)  /* (AH13) GPIO1_17 */ /*SPI0-CLK*/
			AM65X_IOPAD(0x01c8, PIN_OUTPUT, 0)  /* (AE13) GPIO1_18 */ /*SPI0_D0*/
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0)   /* (AD13) GPIO1_19 */ /*SPI0_D1*/
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0)  /* (AG13) GPIO1_15 */ /*SPI0_CS0*/
			AM65X_IOPAD(0x01c0, PIN_OUTPUT, 0)  /* (AF13) GPIO1_16 */ /*SPI0_CS1*/
		>;
	};

	myspi2_pins_default: myspi2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d8, PIN_OUTPUT, 0)  /* (AH12) GPIO1_22 */ /*SPI1_CLK*/
			AM65X_IOPAD(0x01dc, PIN_OUTPUT, 0)  /* (AE12) GPIO1_23 */ /*SPI1_D0*/
			AM65X_IOPAD(0x01e0, PIN_INPUT, 0)   /* (AF12) GPIO1_24 */ /*SPI1_D1*/
		>;
	};

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)   /* (AF11) GPIO1_25 */ /*UART0_RXD*/
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)  /* (AE11) GPIO1_26 */ /*UART0_TXD*/
		>;
	};

	rs232_pins_default: rs232_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0288, PIN_INPUT, 6)   /* (Y27) GPIO1_66 */ /*RS232-RXD*/
			AM65X_IOPAD(0x0260, PIN_OUTPUT, 6)  /* (W28) GPIO1_56 */ /*RS232-TXD*/
		>;
	};

	rs485_pins_default: rs485_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0174, PIN_INPUT, 6)   /* (AE23) GPIO0_93 */ /*RS485-RXD*/
			AM65X_IOPAD(0x014c, PIN_OUTPUT, 6)  /* (AD23) GPIO0_83 */ /*RS485-TXD*/
			AM65X_IOPAD(0x017c, PIN_OUTPUT_PULLDOWN, 7) /* (AC21) GPIO0_95 */ /*RS485-DIR*/
		>;
	};

	usb0_pins_default: usb0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) GPIO1_71 */ /*USB0_DRVVBUS*/
		>;
	};

	usb20_host_pins_default: usb20_host_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) GPIO1_72 */ /*USB1_DRVVBUS*/
		>;
	};
};

&main_pmx1 {
	pinctrl-names = "default";
        pinctrl-0 = <&gpio2_pins_default>;

	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT_PULLUP, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT_PULLUP, 0) /* (E21) I2C1_SDA */
		>;
	};

	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_OUTPUT, 7)  /* (D21) GPIO1_86 */ /* SER-COMM-EN */
			AM65X_IOPAD(0x0018, PIN_INPUT, 7)   /* (B22) GPIO1_88 */ /* DDR-TP0 */
			AM65X_IOPAD(0x001c, PIN_INPUT, 7)   /* (C23) GPIO1_89 */ /* DDR-TP1 */
		>;
	};

	ledgpio2_pins_default: ledgpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) GPIO1_87 */	/* RS485-TX-LED */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "disabled";
};

&main_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

//Eric+{
&main_uart2 {
	pinctrl-names = "default";
	power-domains = <&k3_pds 148 TI_SCI_PD_SHARED>;
	pinctrl-0 = <&rs232_pins_default>;
	status = "okay";
};

&main_uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&rs485_pins_default>;
	power-domains = <&k3_pds 147 TI_SCI_PD_SHARED>;
	rts-gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <0 0>;
	linux,rs485-enabled-at-boot-time;
	status = "okay";
};
//Eric+}

&main_i2c0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <100000>;

#if 0
	rx8130:rtc@32{
		compatible = "epson,rx8130-legacy";
		reg = <0x32>;
	};
#endif

	eeprom: eeprom@50 {
		compatible = "atmel,24c16";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&main_i2c1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <100000>;

	s35390a:rtc@30{
		compatible = "sii,s35390a";
		reg = <0x30>;
	};
};

&main_spi0 {
    status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

    spidev@0 {
        status = "okay";
        //compatible = "fairchild,74hc595";
        compatible = "linux,spidev";
        reg = <0>;
        spi-max-frequency = <1000000>;
    };
};

&main_spi1 {
    status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myspi2_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

    spidev@0 {
        status = "okay";
        //compatible = "fairchild,74hc595";
        compatible = "linux,spidev";
        gpio-controller;
        #gpio-cells = <2>;
        reg = <0>;
        registers-number = <2>;
        registers-default = /bits/ 8 <0xb7>;
        spi-max-frequency = <100000>;
    };
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	bus-width = <8>;
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&sdhci1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&dwc3_1 {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb20_host_pins_default>;
	dr_mode = "host";
};

&dwc3_0 {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

//Eric+{

&m_can0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcan0_pins_default>;
	//stb-gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&usb0 {
	pinctrl-names = "default";
	//pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "peripheral";
};
//Eric+}

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes0 {
	status = "disabled";
};

&serdes1 {
	status = "disabled";
};

&pcie0_rc {
	status = "disabled";
};

&pcie0_ep {
	status = "disabled";
};

&pcie1_rc {
	status = "disabled";
};

&pcie1_ep {
	status = "disabled";
};

&mailbox0_cluster0 {
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster1 {
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "disabled";
};

&mailbox0_cluster3 {
	status = "disabled";
};

&mailbox0_cluster4 {
	status = "disabled";
};

&mailbox0_cluster5 {
	status = "disabled";
};

&mailbox0_cluster6 {
	status = "disabled";
};

&mailbox0_cluster7 {
	status = "disabled";
};

&mailbox0_cluster8 {
	status = "disabled";
};

&mailbox0_cluster9 {
	status = "disabled";
};

&mailbox0_cluster10 {
	status = "disabled";
};

&mailbox0_cluster11 {
	status = "disabled";
};

&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};

&mcu_cpsw {
	pinctrl-names = "default";
	//Eric- pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
	pinctrl-0 = <&phy2ax58100_pins_default &phy2ax58100_mdio2_pins_default>;
};

&davinci_mdio {
	reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;   /* PHY datasheet states 1us min */

	phy0: ethernet-phy@3 {
		reg = <3>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	phy-handle = <&phy0>;
};

//Eric+{
&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	//reset = <&main_gpio0 73 GPIO_ACTIVE_LOW>; /*83822*/
	reset-delay-us = <2>;

	/*83867*/
	pruss1_eth0_phy: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
#if 0
	/*83822*/
	pruss1_eth1_phy: ethernet-phy@7 {
		reg = <7>;
	};
#endif
};
//Eric+}

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;

	reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;

	/*83867*/
	pruss2_eth0_phy: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

Linux 6.1 Dts :

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible = "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	aliases {
		ethernet1 = &icssg1_emac0;
		ethernet2 = &icssg2_emac0;
	};

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";

		/*1G Ram*/
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure-ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		/*mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};*/

		/*mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};*/

		/*mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};*/

		/*mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};*/

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00100000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	

	/* Dual Ethernet application node on PRU-ICSSG1 */
	icssg1_eth: icssg1-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
			<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg1_mii_g_rt>;
		ti,mii-rt = <&icssg1_mii_rt>;
		ti,pa-stats = <&icssg1_pa_stats>;
		//iep = <&icssg1_iep0>;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			   <&main_udmap 0xc201>, /* egress slice 0 */
			   <&main_udmap 0xc202>, /* egress slice 0 */
			   <&main_udmap 0xc203>, /* egress slice 0 */
			   <&main_udmap 0xc204>, /* egress slice 1 */
			   <&main_udmap 0xc205>, /* egress slice 1 */
			   <&main_udmap 0xc206>, /* egress slice 1 */
			   <&main_udmap 0xc207>, /* egress slice 1 */

			   <&main_udmap 0x4200>, /* ingress slice 0 */
			   <&main_udmap 0x4201>, /* ingress slice 1 */
			   <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			   <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
				"rxmgm0", "rxmgm1";

		//ethernet-ports {
		//	#address-cells = <1>;
		//	#size-cells = <0>;
		//	icssg1_emac0: port@1 {
		//		reg = <1>;
		//		phy-handle = <&icssg1_phy0>;
		//		phy-mode = "rgmii-id";
		//		ti,half-duplex-capable;
		//		ti,syscon-rgmii-delay = <&scm_conf 0x4110>;
		//		/* Filled in by bootloader */
		//		local-mac-address = [00 00 00 00 00 00];
		//	};
		//};

		icssg1_emac0: ethernet-mii0 {
                phy-handle = <&icssg1_phy0>;
                phy-mode = "rgmii-id";
                ti,half-duplex-capable;
                syscon-rgmii-delay = <&scm_conf 0x4110>;
                iep = <&icssg1_iep0>;
                /* Filled in by bootloader */
                local-mac-address = [00 00 00 00 00 00];
        };

	};

	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,pa-stats = <&icssg2_pa_stats>;
		//iep = <&icssg2_iep0>;
		dma-coherent;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
				"rxmgm0", "rxmgm1";

		//ethernet-ports {
		//	#address-cells = <1>;
		//	#size-cells = <0>;
		//	icssg2_emac0: port@2 {
		//		reg = <2>;
		//		phy-handle = <&icssg2_phy0>;
		//		phy-mode = "rgmii-id";
		//		ti,half-duplex-capable;
		//		ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
		//		/* Filled in by bootloader */
		//		local-mac-address = [00 00 00 00 00 00];
		//	};
		//};

		icssg2_emac0: ethernet-mii0 {
			phy-handle = <&icssg2_phy0>;
			phy-mode = "rgmii-id";
			ti,half-duplex-capable;
			syscon-rgmii-delay = <&scm_conf 0x4120>;
			iep = <&icssg2_iep0>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};

	};

};

&wkup_pmx0 {
	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
		>;
	};

	push_button_pins_default: push-button-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
		>;
	};

	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
		>;
	};

	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
			AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
			AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
			AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
			AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
		>;
	};

	mcu_mdio_pins_default: mcu-mdio1-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};
};

&main_pmx0 {

	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default>;

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0040, PIN_OUTPUT, 7)  /* (R28) GPIO0_16 */ /*ETH1-PHY-RESET*/
			AM65X_IOPAD(0x0058, PIN_INPUT, 7)   /* (R26) GPIO0_22 */ /*RUN/STOP SW*/
			AM65X_IOPAD(0x005c, PIN_OUTPUT, 7)  /* (R23) GPIO0_23 */ /* SD-CARD-READY-LED */
			AM65X_IOPAD(0x0060, PIN_OUTPUT, 7)  /* (T25) GPIO0_24 */ /*/AX58100-RST*/
			AM65X_IOPAD(0x0064, PIN_OUTPUT, 7)  /* (T24) GPIO0_25 */ /*/AX58100-PYH-RST*/
			AM65X_IOPAD(0x0068, PIN_OUTPUT, 7)  /* (R24) GPIO0_26 */ /* RS232-RX-LED */
			AM65X_IOPAD(0x0070, PIN_OUTPUT, 7)  /* (R25) GPIO0_28 */ /*GPIO-eMMC-RST*/
			AM65X_IOPAD(0x0074, PIN_INPUT, 7)   /* (T27) GPIO0_29 */ /*/24V-LV*/
			AM65X_IOPAD(0x00ac, PIN_INPUT, 1)   /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 1)   /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 1)   /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 1)   /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 7)  /* (AC15) GPIO0_53 */ /*CAN-TERM*/
			AM65X_IOPAD(0x00d8, PIN_INPUT, 1)   /* (AD14) GPIO0_54 */ /*HS_PRU2_LV*/
			AM65X_IOPAD(0x00dc, PIN_OUTPUT, 7)   /* (AE14) GPIO0_55 */ /*HS_PRU2_IRQ*/
			AM65X_IOPAD(0x00f4, PIN_INPUT | PIN_OUTPUT, 7)   /* (AF27) GPIO0_61 */ /*PRU0-IRQ*/
			AM65X_IOPAD(0x00fc, PIN_INPUT | PIN_OUTPUT, 7)   /* (AG27) GPIO0_63 */ /*PRU2-IRQ*/
			AM65X_IOPAD(0x0108, PIN_OUTPUT, 7)  /* (AH25) GPIO0_66 */ /*ETH0-PHY-RESET*/
			AM65X_IOPAD(0x0124, PIN_OUTPUT, 7)  /* (AH26) GPIO0_73 */ /*ECAT2-PHY-RST*/

            AM65X_IOPAD(0x0000, PIN_INPUT_PULLDOWN, 7)  /* (M27) GPIO0_0 */
            AM65X_IOPAD(0x0004, PIN_INPUT, 7)  /* (M23) GPIO0_1 */
            AM65X_IOPAD(0x0008, PIN_INPUT, 7)  /* (M28) GPIO0_2 */
            AM65X_IOPAD(0x000C, PIN_INPUT_PULLDOWN, 7)  /* (M24) GPIO0_3 */
            AM65X_IOPAD(0x0010, PIN_INPUT_PULLDOWN, 7)  /* (N24) GPIO0_4 */
            AM65X_IOPAD(0x0014, PIN_INPUT_PULLDOWN, 7)  /* (N27) GPIO0_5 */
            AM65X_IOPAD(0x0018, PIN_INPUT, 7)  /* (N28) GPIO0_6 */
            AM65X_IOPAD(0x001C, PIN_INPUT_PULLDOWN, 7)  /* (M25) GPIO0_7 */
            AM65X_IOPAD(0x0020, PIN_INPUT_PULLDOWN, 7)  /* (N23) GPIO0_8 */
            AM65X_IOPAD(0x0024, PIN_INPUT_PULLDOWN, 7)  /* (M26) GPIO0_9 */
            AM65X_IOPAD(0x0028, PIN_INPUT_PULLDOWN, 7)  /* (P28) GPIO0_10 */
            AM65X_IOPAD(0x002C, PIN_INPUT_PULLDOWN, 7)  /* (P27) GPIO0_11 */
            AM65X_IOPAD(0x0030, PIN_INPUT_PULLDOWN, 7)  /* (N26) GPIO0_12 */
            AM65X_IOPAD(0x0034, PIN_INPUT, 7)  /* (N25) GPIO0_13 */
            AM65X_IOPAD(0x0038, PIN_INPUT_PULLDOWN, 7)  /* (P24) GPIO0_14 */
            AM65X_IOPAD(0x003C, PIN_INPUT_PULLDOWN, 7)  /* (R27) GPIO0_15 */
            AM65X_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7)  /* (P25) GPIO0_17 */
            AM65X_IOPAD(0x0048, PIN_INPUT, 7)  /* (P26) GPIO0_18 */
            AM65X_IOPAD(0x004C, PIN_INPUT, 7)  /* (U28) GPIO0_19 */
		>;
	};

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7)  /* (AG11) GPIO1_27 */ /*Latch*/
			AM65X_IOPAD(0x01f0, PIN_INPUT, 7)   /* (AD11) GPIO1_28 */ /*/DO-FAULT*/
			AM65X_IOPAD(0x01f4, PIN_INPUT, 1)   /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 1)   /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 1)   /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 1)   /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
			AM65X_IOPAD(0x0204, PIN_INPUT, 1)   /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
			AM65X_IOPAD(0x0208, PIN_INPUT, 1)   /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
			AM65X_IOPAD(0x020c, PIN_INPUT, 1)   /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
			AM65X_IOPAD(0x0210, PIN_INPUT, 1)   /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
			AM65X_IOPAD(0x0214, PIN_INPUT, 7)   /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
			AM65X_IOPAD(0x0218, PIN_INPUT, 7)   /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
			AM65X_IOPAD(0x021c, PIN_INPUT, 7)   /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
			AM65X_IOPAD(0x0220, PIN_INPUT, 7)   /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
			AM65X_IOPAD(0x0224, PIN_INPUT, 7)   /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
			AM65X_IOPAD(0x0228, PIN_INPUT, 7)   /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
			AM65X_IOPAD(0x022c, PIN_INPUT, 7)   /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
			AM65X_IOPAD(0x0230, PIN_INPUT, 7)   /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
			AM65X_IOPAD(0x0234, PIN_INPUT, 1)   /* (AD28) GPIO1_45 */ /*HS_PRU0_LV*/
			AM65X_IOPAD(0x023C, PIN_OUTPUT, 7)   /* (V25) GPIO1_47 */ /*HS_PRU0_IRQ*/
			AM65X_IOPAD(0x0244, PIN_OUTPUT_PULLDOWN, 7) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */ /*****************************************************************************/
			AM65X_IOPAD(0x0248, PIN_OUTPUT_PULLDOWN, 7) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */ /*We set the mode as 7 due to PRU cannot control default status of output pin*/
			AM65X_IOPAD(0x024c, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */ /*And we set the mode back to 0 using memdev2 after PRU init*/
			AM65X_IOPAD(0x0250, PIN_OUTPUT_PULLDOWN, 7) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */ /*****************************************************************************/
			AM65X_IOPAD(0x0284, PIN_INPUT, 7)   /* (AC24) GPIO1_65 */
			AM65X_IOPAD(0x0290, PIN_INPUT, 7)   /* (W26) GPIO1_68 */
			AM65X_IOPAD(0x0294, PIN_INPUT, 7)   /* (AE26) GPIO1_69 */
			AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) GPIO1_20 */ /*SEL-OUT*/
		>;
	};

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
		>;
	};

	main_i2c2_pins_default: main-i2c2-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
		>;
	};

	main_mmc0_pins_default: main-mmc0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
		>;
	};

	usb1_pins_default: usb1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
		>;
	};

	icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};

	icssg2_mdio_pins_default: icssg2-mdio-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	icssg2_rgmii_pins_default: icssg2-rgmii-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */
			AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */
			AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */
			AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */
			AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */
			AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */
			AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */
			AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */

			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};

	ethernet0_pins_default: ethernet0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
			AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
			AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
			AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
			AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
			AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

			//ethercat1_pins_default
			AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
			AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
			AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
			AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
			AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
			AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
		>;
	};

	ethernet1_pins_default: ethernet1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};
};

&main_pmx1 {
	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
		>;
	};

	ecap0_pins_default: ecap0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
		>;
	};

	/* Select GPIO1_87 for ICSSG2 PHY interrupt */
	icssg2_phy_irq_pins_default: icssg2-phy-irq-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0014, PIN_INPUT, 7) /* (A22) EXT_REFCLK1.GPIO1_87 */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "reserved";
};

&mcu_uart0 {
	status = "okay";
	/* Default pinmux */
};

&main_uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

&wkup_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_i2c0_pins_default>;
	clock-frequency = <400000>;

};

&mcu_i2c0 {
	status = "okay";
	/* Default pinmux */
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

};

&main_i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;
};

&main_i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ecap0_pins_default>;
};

&main_spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells = <0>;
	ti,pindir-d0-out-d1-in;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <1>;
		spi-max-frequency = <48000000>;
	};
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	bus-width = <8>;
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

/*
 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
 * SD card interface might fail. Boards with sr1.0 are recommended to
 * disable sdhci1
 */
&sdhci1 {
	//vmmc-supply = <&vdd_mmc1_sd>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb1_pins_default>;
	dr_mode = "otg";
};

&dwc3_0 {
	status = "disabled";
};

&usb0_phy {
	status = "disabled";
};

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes0 {
	status = "disabled";
};

&serdes1 {
	status = "disabled";
};

/*
&mailbox0_cluster0 {
	status = "okay";
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};
*/

/*
&mailbox0_cluster1 {
	status = "okay";
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};
*/

/*
&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};
*/

/*
&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};
*/

&ospi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <8>;
		spi-rx-bus-width = <8>;
		spi-max-frequency = <25000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <0>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "ospi.tiboot3";
				reg = <0x0 0x80000>;
			};

			partition@80000 {
				label = "ospi.tispl";
				reg = <0x80000 0x200000>;
			};

			partition@280000 {
				label = "ospi.u-boot";
				reg = <0x280000 0x400000>;
			};

			partition@680000 {
				label = "ospi.env";
				reg = <0x680000 0x20000>;
			};

			partition@6a0000 {
				label = "ospi.env.backup";
				reg = <0x6a0000 0x20000>;
			};

			partition@6c0000 {
				label = "ospi.sysfw";
				reg = <0x6c0000 0x100000>;
			};

			partition@800000 {
				label = "ospi.rootfs";
				reg = <0x800000 0x37c0000>;
			};

			partition@3fe0000 {
				label = "ospi.phypattern";
				reg = <0x3fe0000 0x20000>;
			};
		};
	};
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default>;
};

&davinci_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mdio_pins_default>;

	phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

&dss {
	status = "disabled";
};

&icssg0_mdio {
	status = "disabled";
};

&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;
	reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*DP83867 PHY Reset Pin*/
	reset-delay-us = <2>;

	/*  DP83867 RGMII Ethernet */
	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;

	reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;

	/* DP83867 RGMII Ethernet */
	icssg2_phy0: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

Attached are the previous DTS file from version 5.1 and my current modified 6.1 version. Could you please advise on how to resolve the Ethernet issues and successfully boot the system with a working Ethernet connection?

Thank you for your assistance.

Fullscreen Linux5.1.txt Download 
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible =  "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	aliases {
		ethernet1 = &pruss1_emac0; //Ethernet port 0
		//ethernet2 = &pruss1_emac1; //EtherCAT port 1
		ethernet2 = &pruss2_emac0; //Ethernet port 1
	};

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";
#if 0
			/* 4G RAM */
			reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
				<0x00000008 0x80000000 0x00000000 0x80000000>;
#endif
			/* 1G RAM */
			reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
        };

	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure_ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00200000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	eeprom_gpio: eeprom_gpio {
		compatible = "eeprom-gpio";
		eeprom-gpio = <&wkup_gpio0 7 GPIO_ACTIVE_HIGH>;
	};

	clk_ov5640_fixed: fixed-clock-ov5640 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&ledgpio0_pins_default &ledgpio1_pins_default &ledgpio2_pins_default>;

		compatible = "gpio-leds";

		led1 {
			label = "LED-RUN";
			gpios = <&main_gpio0 27 GPIO_ACTIVE_LOW>;
		};

		led2 {
			label = "LED-ERR";
			gpios = <&main_gpio1 70 GPIO_ACTIVE_HIGH>;
		};

		led3 {
			label = "LED-BUS";
			gpios = <&main_gpio1 48 GPIO_ACTIVE_HIGH>;
		};

		led4 {
			label = "LED-232TX";
			gpios = <&main_gpio1 21 GPIO_ACTIVE_HIGH>;
		};

		led5 {
			label = "LED-232RX";
			gpios = <&main_gpio0 26 GPIO_ACTIVE_HIGH>;
		};

		led6 {
			label = "LED-485TX";
			gpios = <&main_gpio1 87 GPIO_ACTIVE_HIGH>;
		};

		led7 {
			label = "LED-485RX";
			gpios = <&main_gpio1 46 GPIO_ACTIVE_HIGH>;
		};

		led8 {
			label = "LED-SD";
			gpios = <&main_gpio0 23 GPIO_ACTIVE_HIGH>;
		};
	};

	//Eric+{
		/* Dual Ethernet application node on PRU-ICSSG1 */
	pruss1_eth: pruss1_eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
				<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
						<2>,
						<2>,
						<2>,      /* MII mode */
						<2>,
						<2>;
		mii-g-rt = <&icssg1_mii_g_rt>;
		mii-rt = <&icssg1_mii_rt>;
		dma-coherent;
		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			   <&main_udmap 0xc201>, /* egress slice 0 */
			   <&main_udmap 0xc202>, /* egress slice 0 */
			   <&main_udmap 0xc203>, /* egress slice 0 */
			   <&main_udmap 0xc204>, /* egress slice 1 */
			   <&main_udmap 0xc205>, /* egress slice 1 */
			   <&main_udmap 0xc206>, /* egress slice 1 */
			   <&main_udmap 0xc207>, /* egress slice 1 */

			   <&main_udmap 0x4200>, /* ingress slice 0 */
			   <&main_udmap 0x4201>, /* ingress slice 1 */
			   <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			   <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
					"tx1-0", "tx1-1", "tx1-2", "tx1-3",
					"rx0", "rx1",
					"rxmgm0", "rxmgm1";

        pruss1_emac0: ethernet-mii0 {
                phy-handle = <&pruss1_eth0_phy>;
                phy-mode = "rgmii-rxid";
                ti,half-duplex-capable;
                interrupts-extended = <&icssg1_intc 24>;
                syscon-rgmii-delay = <&scm_conf 0x4110>;
                iep = <&icssg1_iep0>;
                /* Filled in by bootloader */
                local-mac-address = [00 00 00 00 00 00];
        };
#if 0
        pruss1_emac1: ethernet-mii1 {
                phy-handle = <&pruss1_eth1_phy>;
                phy-mode = "rgmii-rxid";
                interrupts-extended = <&icssg1_intc 25>;
                syscon-rgmii-delay = <&scm_conf 0x4114>;
                /* Filled in by bootloader */
                local-mac-address = [00 00 00 00 00 00];
        };
#endif
	};
	//Eric+}

	/* Single Ethernet application node on PRU-ICSSG2 */ 
	pruss2_eth: pruss2_eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;
		mii-g-rt = <&icssg2_mii_g_rt>;
		mii-rt = <&icssg2_mii_rt>;
		dma-coherent;
		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
			    "rxmgm0", "rxmgm1";

		pruss2_emac0: ethernet-mii0 {
			phy-handle = <&pruss2_eth0_phy>;
			phy-mode = "rgmii-rxid";
			ti,half-duplex-capable;
			interrupts-extended = <&icssg2_intc 24>;
			syscon-rgmii-delay = <&scm_conf 0x4120>;
			iep = <&icssg2_iep0>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};
	};
};

&wkup_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&eepromdone_pins_default &iovolctrl_pins_default &vbusctrl_pins_default &mcuboot_pins_default>;

	phy2ax58100_pins_default: phy2ax58100_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_INPUT, 1) /* (N4) MCU_RGMII1_TX_CTL.MCU_RMII1_CRS_DV */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 1) /* (N5) MCU_RGMII1_RX_CTL.MCU_RMII1_RX_ER */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 1) /* (M4) MCU_RGMII1_TD1.MCU_RMII1_TXD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 1) /* (M5) MCU_RGMII1_TD0.MCU_RMII1_TXD0 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 1) /* (M6) MCU_RGMII1_RD1.MCU_RMII1_RXD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 1) /* (L6) MCU_RGMII1_RD0.MCU_RMII1_RXD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 1) /* (N1) MCU_RGMII1_TXC.MCU_RMII1_TX_EN */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 1) /* (M1) MCU_RGMII1_RXC.MCU_RMII1_REF_CLK */
		>;
	};

	mcan0_pins_default: mcan0_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00ac, PIN_INPUT, 0) /* (W2) MCU_MCAN0_RX */
			AM65X_WKUP_IOPAD(0x00a8, PIN_OUTPUT, 0) /* (W1) MCU_MCAN0_TX */
		>;
	};

	phy2ax58100_mdio2_pins_default: phy2ax58100_mdio2_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};

	usb5vsignal_pins_default: usb5vsignal_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00c4, PIN_INPUT, 7) /* (AD3) WKUP_GPIO0_5 */
		>;
	};

	iovolctrl_pins_default: iovolctrl_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6 */ /*IO_VOLCTRL*/
		>;
	};

	eepromdone_pins_default: eepromdone_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00cc, PIN_INPUT, 7) /* (AC1) WKUP_GPIO0_7 */ /*EEP_DONE*/
		>;
	};

	vbusctrl_pins_default: vbusctrl_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00D8, PIN_OUTPUT, 7) /* (AB3) WKUP_GPIO0_10 */ /*USBVBUSCTRL*/
		>;
	};

    mcuboot_pins_default: mcuboot_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00B0, PIN_INPUT, 7) /* (AF4) WKUP_GPIO0_0 */ /*MCU-BOOT0*/
            AM65X_WKUP_IOPAD(0x00B4, PIN_INPUT, 7) /* (AF3) WKUP_GPIO0_1 */ /*MCU-BOOT1*/
            AM65X_WKUP_IOPAD(0x00B8, PIN_INPUT_PULLDOWN, 7) /* (AE3) WKUP_GPIO0_2 */ /*MCU-BOOT2*/
            AM65X_WKUP_IOPAD(0x00BC, PIN_INPUT_PULLDOWN, 7) /* (AD1) WKUP_GPIO0_3 */ /*MCU-BOOT3*/
            AM65X_WKUP_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7) /* (AC3) WKUP_GPIO0_4 */ /*MCU-BOOT4*/
            AM65X_WKUP_IOPAD(0x00D0, PIN_INPUT_PULLDOWN, 7) /* (AC5) WKUP_GPIO0_8 */ /*MCU-BOOT8*/
            AM65X_WKUP_IOPAD(0x00D4, PIN_INPUT, 7) /* (AB4) WKUP_GPIO0_9 */ /*MCU-BOOT9*/
            AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) /* (Y2) */ /*MCU-BOOT5*/
            AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7) /* (Y1) */ /*MCU-BOOT6*/
            AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7) /* (Y3) */ /*MCU-BOOT7*/
		>;
	};
};

&main_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default>;

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7)  /* (AG11) GPIO1_27 */ /*Latch*/
			AM65X_IOPAD(0x01f0, PIN_INPUT, 7)   /* (AD11) GPIO1_28 */ /*/DO-FAULT*/
			AM65X_IOPAD(0x01f4, PIN_INPUT, 1)   /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 1)   /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 1)   /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 1)   /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
			AM65X_IOPAD(0x0204, PIN_INPUT, 1)   /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
			AM65X_IOPAD(0x0208, PIN_INPUT, 1)   /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
			AM65X_IOPAD(0x020c, PIN_INPUT, 1)   /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
			AM65X_IOPAD(0x0210, PIN_INPUT, 1)   /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
			AM65X_IOPAD(0x0214, PIN_INPUT, 7)   /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
			AM65X_IOPAD(0x0218, PIN_INPUT, 7)   /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
			AM65X_IOPAD(0x021c, PIN_INPUT, 7)   /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
			AM65X_IOPAD(0x0220, PIN_INPUT, 7)   /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
			AM65X_IOPAD(0x0224, PIN_INPUT, 7)   /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
			AM65X_IOPAD(0x0228, PIN_INPUT, 7)   /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
			AM65X_IOPAD(0x022c, PIN_INPUT, 7)   /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
			AM65X_IOPAD(0x0230, PIN_INPUT, 7)   /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
			AM65X_IOPAD(0x0234, PIN_INPUT, 1)   /* (AD28) GPIO1_45 */ /*HS_PRU0_LV*/
			AM65X_IOPAD(0x023C, PIN_OUTPUT, 7)   /* (V25) GPIO1_47 */ /*HS_PRU0_IRQ*/
			AM65X_IOPAD(0x0244, PIN_OUTPUT_PULLDOWN, 7) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */ /*****************************************************************************/
			AM65X_IOPAD(0x0248, PIN_OUTPUT_PULLDOWN, 7) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */ /*We set the mode as 7 due to PRU cannot control default status of output pin*/
			AM65X_IOPAD(0x024c, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */ /*And we set the mode back to 0 using memdev2 after PRU init*/
			AM65X_IOPAD(0x0250, PIN_OUTPUT_PULLDOWN, 7) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */ /*****************************************************************************/
			AM65X_IOPAD(0x0284, PIN_INPUT, 7)   /* (AC24) GPIO1_65 */
			AM65X_IOPAD(0x0290, PIN_INPUT, 7)   /* (W26) GPIO1_68 */
			AM65X_IOPAD(0x0294, PIN_INPUT, 7)   /* (AE26) GPIO1_69 */
			AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) GPIO1_20 */ /*SEL-OUT*/
		>;
	};

	ledgpio1_pins_default: ledgpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7)  /* (AG12) GPIO1_21 */ /* RS232-TX-LED */
			AM65X_IOPAD(0x0238, PIN_OUTPUT, 7)  /* (U26) GPIO1_46 */ /* RS485-RX-LED */
			AM65X_IOPAD(0x0240, PIN_OUTPUT, 7)  /* (U24) GPIO1_48 */ /* BUSFAULT-LED */
			AM65X_IOPAD(0x0298, PIN_OUTPUT, 7)  /* (AE28) GPIO1_70 */ /* ERROR-LED */
		>;
	};

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0040, PIN_OUTPUT, 7)  /* (R28) GPIO0_16 */ /*ETH1-PHY-RESET*/
			AM65X_IOPAD(0x0058, PIN_INPUT, 7)   /* (R26) GPIO0_22 */ /*RUN/STOP SW*/
			AM65X_IOPAD(0x005c, PIN_OUTPUT, 7)  /* (R23) GPIO0_23 */ /* SD-CARD-READY-LED */
			AM65X_IOPAD(0x0060, PIN_OUTPUT, 7)  /* (T25) GPIO0_24 */ /*/AX58100-RST*/
			AM65X_IOPAD(0x0064, PIN_OUTPUT, 7)  /* (T24) GPIO0_25 */ /*/AX58100-PYH-RST*/
			AM65X_IOPAD(0x0068, PIN_OUTPUT, 7)  /* (R24) GPIO0_26 */ /* RS232-RX-LED */
			AM65X_IOPAD(0x0070, PIN_OUTPUT, 7)  /* (R25) GPIO0_28 */ /*GPIO-eMMC-RST*/
			AM65X_IOPAD(0x0074, PIN_INPUT, 7)   /* (T27) GPIO0_29 */ /*/24V-LV*/
			AM65X_IOPAD(0x00ac, PIN_INPUT, 1)   /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 1)   /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 1)   /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 1)   /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 7)  /* (AC15) GPIO0_53 */ /*CAN-TERM*/
			AM65X_IOPAD(0x00d8, PIN_INPUT, 1)   /* (AD14) GPIO0_54 */ /*HS_PRU2_LV*/
			AM65X_IOPAD(0x00dc, PIN_OUTPUT, 7)   /* (AE14) GPIO0_55 */ /*HS_PRU2_IRQ*/
			AM65X_IOPAD(0x00f4, PIN_INPUT | PIN_OUTPUT, 7)   /* (AF27) GPIO0_61 */ /*PRU0-IRQ*/
			AM65X_IOPAD(0x00fc, PIN_INPUT | PIN_OUTPUT, 7)   /* (AG27) GPIO0_63 */ /*PRU2-IRQ*/
			AM65X_IOPAD(0x0108, PIN_OUTPUT, 7)  /* (AH25) GPIO0_66 */ /*ETH0-PHY-RESET*/
			AM65X_IOPAD(0x0124, PIN_OUTPUT, 7)  /* (AH26) GPIO0_73 */ /*ECAT2-PHY-RST*/

            AM65X_IOPAD(0x0000, PIN_INPUT_PULLDOWN, 7)  /* (M27) GPIO0_0 */
            AM65X_IOPAD(0x0004, PIN_INPUT, 7)  /* (M23) GPIO0_1 */
            AM65X_IOPAD(0x0008, PIN_INPUT, 7)  /* (M28) GPIO0_2 */
            AM65X_IOPAD(0x000C, PIN_INPUT_PULLDOWN, 7)  /* (M24) GPIO0_3 */
            AM65X_IOPAD(0x0010, PIN_INPUT_PULLDOWN, 7)  /* (N24) GPIO0_4 */
            AM65X_IOPAD(0x0014, PIN_INPUT_PULLDOWN, 7)  /* (N27) GPIO0_5 */
            AM65X_IOPAD(0x0018, PIN_INPUT, 7)  /* (N28) GPIO0_6 */
            AM65X_IOPAD(0x001C, PIN_INPUT_PULLDOWN, 7)  /* (M25) GPIO0_7 */
            AM65X_IOPAD(0x0020, PIN_INPUT_PULLDOWN, 7)  /* (N23) GPIO0_8 */
            AM65X_IOPAD(0x0024, PIN_INPUT_PULLDOWN, 7)  /* (M26) GPIO0_9 */
            AM65X_IOPAD(0x0028, PIN_INPUT_PULLDOWN, 7)  /* (P28) GPIO0_10 */
            AM65X_IOPAD(0x002C, PIN_INPUT_PULLDOWN, 7)  /* (P27) GPIO0_11 */
            AM65X_IOPAD(0x0030, PIN_INPUT_PULLDOWN, 7)  /* (N26) GPIO0_12 */
            AM65X_IOPAD(0x0034, PIN_INPUT, 7)  /* (N25) GPIO0_13 */
            AM65X_IOPAD(0x0038, PIN_INPUT_PULLDOWN, 7)  /* (P24) GPIO0_14 */
            AM65X_IOPAD(0x003C, PIN_INPUT_PULLDOWN, 7)  /* (R27) GPIO0_15 */
            AM65X_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7)  /* (P25) GPIO0_17 */
            AM65X_IOPAD(0x0048, PIN_INPUT, 7)  /* (P26) GPIO0_18 */
            AM65X_IOPAD(0x004C, PIN_INPUT, 7)  /* (U28) GPIO0_19 */
		>;
	};

	ledgpio0_pins_default: ledgpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPIO0_27 */ /* RUN-LED */
		>;
	};

	main_mmc0_pins_default: main-mmc0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
		>;
	};

	icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};

	ethernet0_pins_default: ethernet0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
			AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
			AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
			AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
			AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
			AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

			//ethercat1_pins_default
			AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
			AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
			AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
			AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
			AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
			AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
		>;
	};

	icssg2_mdio_pins_default: icssg2_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	ethernet1_pins_default: ethernet1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 0)  /* (AH13) GPIO1_17 */ /*SPI0-CLK*/
			AM65X_IOPAD(0x01c8, PIN_OUTPUT, 0)  /* (AE13) GPIO1_18 */ /*SPI0_D0*/
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0)   /* (AD13) GPIO1_19 */ /*SPI0_D1*/
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0)  /* (AG13) GPIO1_15 */ /*SPI0_CS0*/
			AM65X_IOPAD(0x01c0, PIN_OUTPUT, 0)  /* (AF13) GPIO1_16 */ /*SPI0_CS1*/
		>;
	};

	myspi2_pins_default: myspi2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d8, PIN_OUTPUT, 0)  /* (AH12) GPIO1_22 */ /*SPI1_CLK*/
			AM65X_IOPAD(0x01dc, PIN_OUTPUT, 0)  /* (AE12) GPIO1_23 */ /*SPI1_D0*/
			AM65X_IOPAD(0x01e0, PIN_INPUT, 0)   /* (AF12) GPIO1_24 */ /*SPI1_D1*/
		>;
	};

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)   /* (AF11) GPIO1_25 */ /*UART0_RXD*/
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)  /* (AE11) GPIO1_26 */ /*UART0_TXD*/
		>;
	};

	rs232_pins_default: rs232_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0288, PIN_INPUT, 6)   /* (Y27) GPIO1_66 */ /*RS232-RXD*/
			AM65X_IOPAD(0x0260, PIN_OUTPUT, 6)  /* (W28) GPIO1_56 */ /*RS232-TXD*/
		>;
	};

	rs485_pins_default: rs485_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0174, PIN_INPUT, 6)   /* (AE23) GPIO0_93 */ /*RS485-RXD*/
			AM65X_IOPAD(0x014c, PIN_OUTPUT, 6)  /* (AD23) GPIO0_83 */ /*RS485-TXD*/
			AM65X_IOPAD(0x017c, PIN_OUTPUT_PULLDOWN, 7) /* (AC21) GPIO0_95 */ /*RS485-DIR*/
		>;
	};

	usb0_pins_default: usb0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) GPIO1_71 */ /*USB0_DRVVBUS*/
		>;
	};

	usb20_host_pins_default: usb20_host_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) GPIO1_72 */ /*USB1_DRVVBUS*/
		>;
	};
};

&main_pmx1 {
	pinctrl-names = "default";
        pinctrl-0 = <&gpio2_pins_default>;

	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT_PULLUP, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT_PULLUP, 0) /* (E21) I2C1_SDA */
		>;
	};

	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_OUTPUT, 7)  /* (D21) GPIO1_86 */ /* SER-COMM-EN */
			AM65X_IOPAD(0x0018, PIN_INPUT, 7)   /* (B22) GPIO1_88 */ /* DDR-TP0 */
			AM65X_IOPAD(0x001c, PIN_INPUT, 7)   /* (C23) GPIO1_89 */ /* DDR-TP1 */
		>;
	};

	ledgpio2_pins_default: ledgpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) GPIO1_87 */	/* RS485-TX-LED */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "disabled";
};

&main_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

//Eric+{
&main_uart2 {
	pinctrl-names = "default";
	power-domains = <&k3_pds 148 TI_SCI_PD_SHARED>;
	pinctrl-0 = <&rs232_pins_default>;
	status = "okay";
};

&main_uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&rs485_pins_default>;
	power-domains = <&k3_pds 147 TI_SCI_PD_SHARED>;
	rts-gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <0 0>;
	linux,rs485-enabled-at-boot-time;
	status = "okay";
};
//Eric+}

&main_i2c0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <100000>;

#if 0
	rx8130:rtc@32{
		compatible = "epson,rx8130-legacy";
		reg = <0x32>;
	};
#endif

	eeprom: eeprom@50 {
		compatible = "atmel,24c16";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&main_i2c1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <100000>;

	s35390a:rtc@30{
		compatible = "sii,s35390a";
		reg = <0x30>;
	};
};

&main_spi0 {
    status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

    spidev@0 {
        status = "okay";
        //compatible = "fairchild,74hc595";
        compatible = "linux,spidev";
        reg = <0>;
        spi-max-frequency = <1000000>;
    };
};

&main_spi1 {
    status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myspi2_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

    spidev@0 {
        status = "okay";
        //compatible = "fairchild,74hc595";
        compatible = "linux,spidev";
        gpio-controller;
        #gpio-cells = <2>;
        reg = <0>;
        registers-number = <2>;
        registers-default = /bits/ 8 <0xb7>;
        spi-max-frequency = <100000>;
    };
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	bus-width = <8>;
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&sdhci1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&dwc3_1 {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb20_host_pins_default>;
	dr_mode = "host";
};

&dwc3_0 {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

//Eric+{

&m_can0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcan0_pins_default>;
	//stb-gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&usb0 {
	pinctrl-names = "default";
	//pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "peripheral";
};
//Eric+}

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes0 {
	status = "disabled";
};

&serdes1 {
	status = "disabled";
};

&pcie0_rc {
	status = "disabled";
};

&pcie0_ep {
	status = "disabled";
};

&pcie1_rc {
	status = "disabled";
};

&pcie1_ep {
	status = "disabled";
};

&mailbox0_cluster0 {
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster1 {
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "disabled";
};

&mailbox0_cluster3 {
	status = "disabled";
};

&mailbox0_cluster4 {
	status = "disabled";
};

&mailbox0_cluster5 {
	status = "disabled";
};

&mailbox0_cluster6 {
	status = "disabled";
};

&mailbox0_cluster7 {
	status = "disabled";
};

&mailbox0_cluster8 {
	status = "disabled";
};

&mailbox0_cluster9 {
	status = "disabled";
};

&mailbox0_cluster10 {
	status = "disabled";
};

&mailbox0_cluster11 {
	status = "disabled";
};

&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};

&mcu_cpsw {
	pinctrl-names = "default";
	//Eric- pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
	pinctrl-0 = <&phy2ax58100_pins_default &phy2ax58100_mdio2_pins_default>;
};

&davinci_mdio {
	reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;   /* PHY datasheet states 1us min */

	phy0: ethernet-phy@3 {
		reg = <3>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	phy-handle = <&phy0>;
};

//Eric+{
&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	//reset = <&main_gpio0 73 GPIO_ACTIVE_LOW>; /*83822*/
	reset-delay-us = <2>;

	/*83867*/
	pruss1_eth0_phy: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
#if 0
	/*83822*/
	pruss1_eth1_phy: ethernet-phy@7 {
		reg = <7>;
	};
#endif
};
//Eric+}

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;

	reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;

	/*83867*/
	pruss2_eth0_phy: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};
Fullscreen Linux6.1_Modify.txt Download 
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible = "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	aliases {
		ethernet1 = &icssg1_emac0;
		ethernet2 = &icssg2_emac0;
	};

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";

		/*1G Ram*/
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure-ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		/*mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};*/

		/*mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};*/

		/*mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};*/

		/*mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};*/

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00100000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	

	/* Dual Ethernet application node on PRU-ICSSG1 */
	icssg1_eth: icssg1-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
			<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg1_mii_g_rt>;
		ti,mii-rt = <&icssg1_mii_rt>;
		ti,pa-stats = <&icssg1_pa_stats>;
		//iep = <&icssg1_iep0>;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			   <&main_udmap 0xc201>, /* egress slice 0 */
			   <&main_udmap 0xc202>, /* egress slice 0 */
			   <&main_udmap 0xc203>, /* egress slice 0 */
			   <&main_udmap 0xc204>, /* egress slice 1 */
			   <&main_udmap 0xc205>, /* egress slice 1 */
			   <&main_udmap 0xc206>, /* egress slice 1 */
			   <&main_udmap 0xc207>, /* egress slice 1 */

			   <&main_udmap 0x4200>, /* ingress slice 0 */
			   <&main_udmap 0x4201>, /* ingress slice 1 */
			   <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			   <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
				"rxmgm0", "rxmgm1";

		//ethernet-ports {
		//	#address-cells = <1>;
		//	#size-cells = <0>;
		//	icssg1_emac0: port@1 {
		//		reg = <1>;
		//		phy-handle = <&icssg1_phy0>;
		//		phy-mode = "rgmii-id";
		//		ti,half-duplex-capable;
		//		ti,syscon-rgmii-delay = <&scm_conf 0x4110>;
		//		/* Filled in by bootloader */
		//		local-mac-address = [00 00 00 00 00 00];
		//	};
		//};

		icssg1_emac0: ethernet-mii0 {
                phy-handle = <&icssg1_phy0>;
                phy-mode = "rgmii-id";
                ti,half-duplex-capable;
                syscon-rgmii-delay = <&scm_conf 0x4110>;
                iep = <&icssg1_iep0>;
                /* Filled in by bootloader */
                local-mac-address = [00 00 00 00 00 00];
        };

	};

	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,pa-stats = <&icssg2_pa_stats>;
		//iep = <&icssg2_iep0>;
		dma-coherent;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
				"rxmgm0", "rxmgm1";

		//ethernet-ports {
		//	#address-cells = <1>;
		//	#size-cells = <0>;
		//	icssg2_emac0: port@2 {
		//		reg = <2>;
		//		phy-handle = <&icssg2_phy0>;
		//		phy-mode = "rgmii-id";
		//		ti,half-duplex-capable;
		//		ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
		//		/* Filled in by bootloader */
		//		local-mac-address = [00 00 00 00 00 00];
		//	};
		//};

		icssg2_emac0: ethernet-mii0 {
			phy-handle = <&icssg2_phy0>;
			phy-mode = "rgmii-id";
			ti,half-duplex-capable;
			syscon-rgmii-delay = <&scm_conf 0x4120>;
			iep = <&icssg2_iep0>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};

	};

};

&wkup_pmx0 {
	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
		>;
	};

	push_button_pins_default: push-button-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
		>;
	};

	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */
			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
		>;
	};

	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
			AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
			AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
			AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
			AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
		>;
	};

	mcu_mdio_pins_default: mcu-mdio1-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};
};

&main_pmx0 {

	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default>;

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0040, PIN_OUTPUT, 7)  /* (R28) GPIO0_16 */ /*ETH1-PHY-RESET*/
			AM65X_IOPAD(0x0058, PIN_INPUT, 7)   /* (R26) GPIO0_22 */ /*RUN/STOP SW*/
			AM65X_IOPAD(0x005c, PIN_OUTPUT, 7)  /* (R23) GPIO0_23 */ /* SD-CARD-READY-LED */
			AM65X_IOPAD(0x0060, PIN_OUTPUT, 7)  /* (T25) GPIO0_24 */ /*/AX58100-RST*/
			AM65X_IOPAD(0x0064, PIN_OUTPUT, 7)  /* (T24) GPIO0_25 */ /*/AX58100-PYH-RST*/
			AM65X_IOPAD(0x0068, PIN_OUTPUT, 7)  /* (R24) GPIO0_26 */ /* RS232-RX-LED */
			AM65X_IOPAD(0x0070, PIN_OUTPUT, 7)  /* (R25) GPIO0_28 */ /*GPIO-eMMC-RST*/
			AM65X_IOPAD(0x0074, PIN_INPUT, 7)   /* (T27) GPIO0_29 */ /*/24V-LV*/
			AM65X_IOPAD(0x00ac, PIN_INPUT, 1)   /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 1)   /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 1)   /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 1)   /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 7)  /* (AC15) GPIO0_53 */ /*CAN-TERM*/
			AM65X_IOPAD(0x00d8, PIN_INPUT, 1)   /* (AD14) GPIO0_54 */ /*HS_PRU2_LV*/
			AM65X_IOPAD(0x00dc, PIN_OUTPUT, 7)   /* (AE14) GPIO0_55 */ /*HS_PRU2_IRQ*/
			AM65X_IOPAD(0x00f4, PIN_INPUT | PIN_OUTPUT, 7)   /* (AF27) GPIO0_61 */ /*PRU0-IRQ*/
			AM65X_IOPAD(0x00fc, PIN_INPUT | PIN_OUTPUT, 7)   /* (AG27) GPIO0_63 */ /*PRU2-IRQ*/
			AM65X_IOPAD(0x0108, PIN_OUTPUT, 7)  /* (AH25) GPIO0_66 */ /*ETH0-PHY-RESET*/
			AM65X_IOPAD(0x0124, PIN_OUTPUT, 7)  /* (AH26) GPIO0_73 */ /*ECAT2-PHY-RST*/

            AM65X_IOPAD(0x0000, PIN_INPUT_PULLDOWN, 7)  /* (M27) GPIO0_0 */
            AM65X_IOPAD(0x0004, PIN_INPUT, 7)  /* (M23) GPIO0_1 */
            AM65X_IOPAD(0x0008, PIN_INPUT, 7)  /* (M28) GPIO0_2 */
            AM65X_IOPAD(0x000C, PIN_INPUT_PULLDOWN, 7)  /* (M24) GPIO0_3 */
            AM65X_IOPAD(0x0010, PIN_INPUT_PULLDOWN, 7)  /* (N24) GPIO0_4 */
            AM65X_IOPAD(0x0014, PIN_INPUT_PULLDOWN, 7)  /* (N27) GPIO0_5 */
            AM65X_IOPAD(0x0018, PIN_INPUT, 7)  /* (N28) GPIO0_6 */
            AM65X_IOPAD(0x001C, PIN_INPUT_PULLDOWN, 7)  /* (M25) GPIO0_7 */
            AM65X_IOPAD(0x0020, PIN_INPUT_PULLDOWN, 7)  /* (N23) GPIO0_8 */
            AM65X_IOPAD(0x0024, PIN_INPUT_PULLDOWN, 7)  /* (M26) GPIO0_9 */
            AM65X_IOPAD(0x0028, PIN_INPUT_PULLDOWN, 7)  /* (P28) GPIO0_10 */
            AM65X_IOPAD(0x002C, PIN_INPUT_PULLDOWN, 7)  /* (P27) GPIO0_11 */
            AM65X_IOPAD(0x0030, PIN_INPUT_PULLDOWN, 7)  /* (N26) GPIO0_12 */
            AM65X_IOPAD(0x0034, PIN_INPUT, 7)  /* (N25) GPIO0_13 */
            AM65X_IOPAD(0x0038, PIN_INPUT_PULLDOWN, 7)  /* (P24) GPIO0_14 */
            AM65X_IOPAD(0x003C, PIN_INPUT_PULLDOWN, 7)  /* (R27) GPIO0_15 */
            AM65X_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7)  /* (P25) GPIO0_17 */
            AM65X_IOPAD(0x0048, PIN_INPUT, 7)  /* (P26) GPIO0_18 */
            AM65X_IOPAD(0x004C, PIN_INPUT, 7)  /* (U28) GPIO0_19 */
		>;
	};

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7)  /* (AG11) GPIO1_27 */ /*Latch*/
			AM65X_IOPAD(0x01f0, PIN_INPUT, 7)   /* (AD11) GPIO1_28 */ /*/DO-FAULT*/
			AM65X_IOPAD(0x01f4, PIN_INPUT, 1)   /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 1)   /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 1)   /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 1)   /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
			AM65X_IOPAD(0x0204, PIN_INPUT, 1)   /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
			AM65X_IOPAD(0x0208, PIN_INPUT, 1)   /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
			AM65X_IOPAD(0x020c, PIN_INPUT, 1)   /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
			AM65X_IOPAD(0x0210, PIN_INPUT, 1)   /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
			AM65X_IOPAD(0x0214, PIN_INPUT, 7)   /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
			AM65X_IOPAD(0x0218, PIN_INPUT, 7)   /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
			AM65X_IOPAD(0x021c, PIN_INPUT, 7)   /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
			AM65X_IOPAD(0x0220, PIN_INPUT, 7)   /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
			AM65X_IOPAD(0x0224, PIN_INPUT, 7)   /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
			AM65X_IOPAD(0x0228, PIN_INPUT, 7)   /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
			AM65X_IOPAD(0x022c, PIN_INPUT, 7)   /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
			AM65X_IOPAD(0x0230, PIN_INPUT, 7)   /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
			AM65X_IOPAD(0x0234, PIN_INPUT, 1)   /* (AD28) GPIO1_45 */ /*HS_PRU0_LV*/
			AM65X_IOPAD(0x023C, PIN_OUTPUT, 7)   /* (V25) GPIO1_47 */ /*HS_PRU0_IRQ*/
			AM65X_IOPAD(0x0244, PIN_OUTPUT_PULLDOWN, 7) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */ /*****************************************************************************/
			AM65X_IOPAD(0x0248, PIN_OUTPUT_PULLDOWN, 7) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */ /*We set the mode as 7 due to PRU cannot control default status of output pin*/
			AM65X_IOPAD(0x024c, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */ /*And we set the mode back to 0 using memdev2 after PRU init*/
			AM65X_IOPAD(0x0250, PIN_OUTPUT_PULLDOWN, 7) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */ /*****************************************************************************/
			AM65X_IOPAD(0x0284, PIN_INPUT, 7)   /* (AC24) GPIO1_65 */
			AM65X_IOPAD(0x0290, PIN_INPUT, 7)   /* (W26) GPIO1_68 */
			AM65X_IOPAD(0x0294, PIN_INPUT, 7)   /* (AE26) GPIO1_69 */
			AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) GPIO1_20 */ /*SEL-OUT*/
		>;
	};

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
		>;
	};

	main_i2c2_pins_default: main-i2c2-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
		>;
	};

	main_mmc0_pins_default: main-mmc0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
		>;
	};

	usb1_pins_default: usb1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
		>;
	};

	icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};

	icssg2_mdio_pins_default: icssg2-mdio-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	icssg2_rgmii_pins_default: icssg2-rgmii-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */
			AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */
			AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */
			AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */
			AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */
			AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */
			AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */
			AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */

			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};

	ethernet0_pins_default: ethernet0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
			AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
			AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
			AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
			AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
			AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

			//ethercat1_pins_default
			AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
			AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
			AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
			AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
			AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
			AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
		>;
	};

	ethernet1_pins_default: ethernet1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};
};

&main_pmx1 {
	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
		>;
	};

	ecap0_pins_default: ecap0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
		>;
	};

	/* Select GPIO1_87 for ICSSG2 PHY interrupt */
	icssg2_phy_irq_pins_default: icssg2-phy-irq-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0014, PIN_INPUT, 7) /* (A22) EXT_REFCLK1.GPIO1_87 */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "reserved";
};

&mcu_uart0 {
	status = "okay";
	/* Default pinmux */
};

&main_uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

&wkup_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_i2c0_pins_default>;
	clock-frequency = <400000>;

};

&mcu_i2c0 {
	status = "okay";
	/* Default pinmux */
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

};

&main_i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;
};

&main_i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ecap0_pins_default>;
};

&main_spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells = <0>;
	ti,pindir-d0-out-d1-in;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <1>;
		spi-max-frequency = <48000000>;
	};
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	bus-width = <8>;
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

/*
 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
 * SD card interface might fail. Boards with sr1.0 are recommended to
 * disable sdhci1
 */
&sdhci1 {
	//vmmc-supply = <&vdd_mmc1_sd>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb1_pins_default>;
	dr_mode = "otg";
};

&dwc3_0 {
	status = "disabled";
};

&usb0_phy {
	status = "disabled";
};

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes0 {
	status = "disabled";
};

&serdes1 {
	status = "disabled";
};

/*
&mailbox0_cluster0 {
	status = "okay";
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};
*/

/*
&mailbox0_cluster1 {
	status = "okay";
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};
*/

/*
&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};
*/

/*
&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};
*/

&ospi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <8>;
		spi-rx-bus-width = <8>;
		spi-max-frequency = <25000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <0>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "ospi.tiboot3";
				reg = <0x0 0x80000>;
			};

			partition@80000 {
				label = "ospi.tispl";
				reg = <0x80000 0x200000>;
			};

			partition@280000 {
				label = "ospi.u-boot";
				reg = <0x280000 0x400000>;
			};

			partition@680000 {
				label = "ospi.env";
				reg = <0x680000 0x20000>;
			};

			partition@6a0000 {
				label = "ospi.env.backup";
				reg = <0x6a0000 0x20000>;
			};

			partition@6c0000 {
				label = "ospi.sysfw";
				reg = <0x6c0000 0x100000>;
			};

			partition@800000 {
				label = "ospi.rootfs";
				reg = <0x800000 0x37c0000>;
			};

			partition@3fe0000 {
				label = "ospi.phypattern";
				reg = <0x3fe0000 0x20000>;
			};
		};
	};
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default>;
};

&davinci_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mdio_pins_default>;

	phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

&dss {
	status = "disabled";
};

&icssg0_mdio {
	status = "disabled";
};

&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;
	reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*DP83867 PHY Reset Pin*/
	reset-delay-us = <2>;

	/*  DP83867 RGMII Ethernet */
	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;

	reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;

	/* DP83867 RGMII Ethernet */
	icssg2_phy0: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

  • 0
    TI__Guru** 110030 points

    Hello,

    Confirm silicon revision 

    Are you using AM65x SR2.1? If not, what silicon revision are you using?

    Have you already referred to AM65x SDK 9.1? 

    This has our example Linux devicetree files for using PRU Ethernet on kernel 6.1.

    What kind of Ethernet are you using? 

    I assume you just want to use "generic" Ethernet, right?

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 90 points

    Hi Nick , 

    I'm currently working with the AM65xx processor and I have a few questions.

    First, I need to confirm the silicon revision of the chip. Could you please advise on the most reliable method to check this?

    Additionally, I would like to use ICSSG1 and ICSSG2 to each have their own independent Ethernet functionality.

    I am currently using the ti-processor-sdk-linux-rt-am65xx-evm-09.03.05.02-Linux-x86 version.

    Any guidance you can provide would be greatly appreciated.

    Thank you again for your assistance.

  • 0 in reply to Tsai YunEn
    TI__Guru** 110030 points

    Hello Tsai,

    Please check the part number that is printed on the AM65x. Look at the "Device revision" parameter.

    Please refer to the AM65x datasheet, section "Device and Documentation Support" > Device naming convention.

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 90 points

    Hi Nick , 

    I tried to imitate ICSSG2 to create a new ICSSG1 and modified its content accordingly. However, I encountered a kernel panic issue. How should I solve this problem?

    icssg1_eth: icssg1-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg1_mii_g_rt>;
		ti,mii-rt = <&icssg1_mii_rt>;
		ti,pa-stats = <&icssg1_pa_stats>;
		iep = <&icssg1_iep0> , <&icssg1_iep1>;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			   <&main_udmap 0xc201>, /* egress slice 0 */
			   <&main_udmap 0xc202>, /* egress slice 0 */
			   <&main_udmap 0xc203>, /* egress slice 0 */
			   <&main_udmap 0xc204>, /* egress slice 1 */
			   <&main_udmap 0xc205>, /* egress slice 1 */
			   <&main_udmap 0xc206>, /* egress slice 1 */
			   <&main_udmap 0xc207>, /* egress slice 1 */

			   <&main_udmap 0x4200>, /* ingress slice 0 */
			   <&main_udmap 0x4201>, /* ingress slice 1 */
			   <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			   <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg2_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg1_phy0>;
				phy-mode = "rgmii-id";
				ti,half-duplex-capable;
                interrupts-extended = <&icssg1_intc 24>;
				ti,syscon-rgmii-delay = <&scm_conf 0x4110>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};
};

    &icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <2>;

	icssg1_phy0: ethernet-phy@2 {
		reg = <1>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

    LOG:

    [  OK  ] Reached target Basic System.
         Starting Print notice about GPLv3 packages...
         Starting IPv6 Packet Filtering Framework...
         Starting IPv4 Packet Filtering Framework...
         Starting Expand the rootfs…ll size of the boot device....
         Starting User Login Management...
[  OK  ] Started TEE Supplicant.
         Starting Telnet Server...
[  OK  ] Finished IPv6 Packet Filtering Framework.
[  OK  ] Finished IPv4 Packet Filtering Framework.
[  OK  ] Reached target Preparation for Network.
         Starting Network Configuration...
[  OK  ] Finished Telnet Server.
[   16.615737] remoteproc remoteproc6: b038000.pru is available
[   16.616518] remoteproc remoteproc7: b006000.rtu is available
[   16.626773] remoteproc remoteproc8: b034000.pru is available
[   16.628945] remoteproc remoteproc9: b004000.rtu is available
[   16.631187] remoteproc remoteproc10: b138000.pru is available
[   16.633187] remoteproc remoteproc11: b106000.rtu is available
[   16.643737] remoteproc remoteproc12: b134000.pru is available
[   16.650152] remoteproc remoteproc13: b238000.pru is available
[   16.653755] remoteproc remoteproc14: b206000.rtu is available
[   16.654587] remoteproc remoteproc15: b234000.pru is available
[   16.662426] remoteproc remoteproc16: b204000.rtu is available
[   16.669934] icssg-prueth icssg1-eth: port 1: using random MAC addr: 1e:95:fe:78:d4:3c
[   16.670012] Unable to handle kernel paging request at virtual address ffff000803494058
[   16.670022] Mem abort info:
[   16.670025]   ESR = 0x0000000096000045
[   16.670029]   EC = 0x25: DABT (current EL), IL = 32 bits
[   16.670035]   SET = 0, FnV = 0
[   16.670039]   EA = 0, S1PTW = 0
[   16.670044]   FSC = 0x05: level 1 translation fault
[   16.670049] Data abort info:
[   16.670052]   ISV = 0, ISS = 0x00000045
[   16.670055]   CM = 0, WnR = 1
[   16.670060] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000082bf5000
[   16.670070] [ffff000803494058] pgd=18000000bfff9003, p4d=18000000bfff9003, pud=0000000000000000
[   16.670089] Internal error: Oops: 0000000096000045 [#1] PREEMPT_RT SMP
[   16.670097] Modules linked in: irq_pruss_intc crct10dif_ce icssg_prueth pru_rproc hsr icss_iep ti_k3_r5_remoteproc virtio_rpmsg_bus k3_bandgap rpmsg_ns rti_wdt omap_hwspinlock ti_am335x_tscadc pruss spi_omap2_mcspi sa2ul dwc3_keystone phy_omap_usb2 cryptodev(O) fuse drm drm_panel_orientation_quirks ipv6
[   16.670177] CPU: 1 PID: 9 Comm: kworker/u8:0 Tainted: G           O       6.1.119-rt45-ti-rt-gb0f9de804a16 #1
[   16.670187] Hardware name: Texas Instruments AM654 Base Board (DT)
[   16.670194] Workqueue: events_unbound 0xffff800008547190
[   16.670202] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[   16.670211] pc : 0xffff800000b031b0
[   16.670214] lr : 0xffff800000b03198
[   16.670217] sp : ffff0000000eba80
[   16.670221] x29: ffff0000000eba80 x28: ffff00003ffecb30 x27: ffff0000034940c0
[   16.670233] x26: 0000000000000000 x25: 0000000000040000 x24: ffff000003494080
[   16.670246] x23: ffff800000b10198 x22: 00000000ffffffea x21: ffff000803493fd0
[   16.670258] x20: ffff000001654980 x19: ffff000001654000 x18: 0000000000000000
[   16.670270] x17: 00000000957a7293 x16: 000000007c253dea x15: 0000000000000000
[   16.670281] x14: 0000000000000001 x13: 0000000000000000 x12: 0000000000000000
[   16.670293] x11: 0000000000000400 x10: 0000000000000181 x9 : 0000000000000000
[   16.670304] x8 : ffff000004fd1c00 x7 : 0000000000000000 x6 : 000000000000003f
[   16.670316] x5 : ffff000004fd1800 x4 : 0000000000000000 x3 : ffff800000b0cd78
[   16.670327] x2 : 0000000000000006 x1 : ffff800008b85320 x0 : ffff000001654000
[   16.670340] Call trace:
[   16.670344]  0xffff800000b031b0
[   16.670347]  0xffff800000b064cc
[   16.670351]  0xffff80000854a514
[   16.670354]  0xffff800008547bf8
[   16.670357]  0xffff800008547e94
[   16.670361]  0xffff800008547f6c
[   16.670364]  0xffff80000854866c
[   16.670368]  0xffff8000085459f4
[   16.670371]  0xffff800008548254
[   16.670375]  0xffff8000085488a0
[   16.670378]  0xffff800008546d50
[   16.670382]  0xffff800008547218
[   16.670386]  0xffff80000805139c
[   16.670389]  0xffff800008051624
[   16.670392]  0xffff800008059140
[   16.670396]  0xffff800008014cd0
[   16.670405] Code: 8b344f15 91260014 b0000043 9135e063 (f90046b4)
[   16.670412] ---[ end trace 0000000000000000 ]---
[   20.916154] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller
[   20.921824] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1
[   20.929695] xhci-hcd xhci-hcd.2.auto: hcc params 0x0298fe6d hci version 0x110 quirks 0x0000008000010010
[   20.939437] xhci-hcd xhci-hcd.2.auto: irq 601, io mem 0x04030000
[   20.949188] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller
[   20.949227] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2
[   20.949255] xhci-hcd xhci-hcd.2.auto: Host supports USB 3.0 SuperSpeed
[   20.955691] hub 1-0:1.0: USB hub found
[   20.955751] hub 1-0:1.0: 1 port detected
[   20.956958] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[   20.959062] hub 2-0:1.0: USB hub found
[   20.959127] hub 2-0:1.0: 1 port detected
[   20.994303] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[   21.007193] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[   21.008506] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
[  OK  ] Finished Expand the rootfs…full size of the boot device..
[  OK  ] Listening on Load/Save RF …itch Status /dev/rfkill Watch.
[  OK  ] Started User Login Management.
[   21.076893] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[   21.085546] cfg80211: failed to load regulatory.db
[  OK  ] Started Network Configuration.
         Starting Network Name Resolution...
[  OK  ] Started Network Name Resolution.
[  OK  ] Reached target Network.
[  OK  ] Reached target Host and Network Name Lookups.
         Starting Avahi mDNS/DNS-SD Stack...
         Starting containerd container runtime...
[  OK  ] Started Netperf Benchmark Server.

  • 0 in reply to Tsai YunEn
    Prodigy 90 points

    The cause of the core crash should be the following problem, but I modified it and encountered the problem of not being able to obtain iep correctly.

    iep = <&icssg1_iep0> , <&icssg1_iep1>;

# Modify
iep = <&icssg1_iep0>;

    Log:

    [  OK  ] Reached target Preparation for Network.
         Starting Network Configuration...
[   18.155283] remoteproc remoteproc6: b006000.rtu is available
[   18.158097] remoteproc remoteproc7: b034000.pru is available
[   18.161463] remoteproc remoteproc8: b134000.pru is available
[   18.164396] remoteproc remoteproc9: b104000.rtu is available
[   18.167717] remoteproc remoteproc10: b238000.pru is available
[   18.169329] remoteproc remoteproc11: b206000.rtu is available
[   18.176864] remoteproc remoteproc12: b004000.rtu is available
[   18.178713] remoteproc remoteproc13: b038000.pru is available
[   18.181269] remoteproc remoteproc14: b138000.pru is available
[   18.181920] remoteproc remoteproc15: b106000.rtu is available
[   18.190153] remoteproc remoteproc16: b234000.pru is available
[   18.192708] remoteproc remoteproc17: b204000.rtu is available
[   18.194664] icssg-prueth icssg1-eth: error -ENODEV: iep1 get failed

  • 0 in reply to Nick Saulnier
    Prodigy 90 points

    According to the previous DTS, it should be SR1, with a clear file name k3-am654-base-board-sr1.dts

  • 0 in reply to Tsai YunEn
    Prodigy 90 points

    AM6546BACDXA

  • 0 in reply to Tsai YunEn
    TI__Guru** 110030 points

    Hello,

    Silicon revision & SDK version

    Yes, you are using the latest silicon revision SR2.1 based on the "Device Revision" of B:
    AM6546BACDXA

    That is good, because SDK 9.3 was created with SR2.1 in mind. I am not sure, but I suspect that SR1.0 would not work with SDK 9.3 because of the differences in the PRU subsystem between SR1.0 and SR2.1.

    Do you have a TI EVM that is SR2.1 for testing? 

    Usually with these things, I like to start from a "known good" place.

    So take the TI EVM, and take the TI SDK, and make sure that the unmodified code actually runs on the unmodified EVM.

    Once that "known good" starting point is established, start making one change at a time to work towards your software running on your hardware.

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 90 points

    Hi Nick , 

    I don’t have an EVM version on hand. From the U-Boot messages, the current silicon revision is shown as SR2.0, and the firmware under /lib/firmware/ti-pruss/ also indicates SR2.0.

    When comparing the Linux DTS between version 5.1 and 6.1, the main differences are in the icssg node.

    May I kindly ask for your help to review my implementation and point out where I might have gone wrong? Thank you very much!

  • 0 in reply to Tsai YunEn
    TI__Genius 16130 points

    Hi Nick:

      #1. The original poster to this issue is my cust.

      #2. I have checked his DTS, should be no issue. (See below of his DTS of kernel.)

            But this poster has those 2 Phy ID conflicted log:

    [   15.833984] mdio_bus b132400.mdio: MDIO device at address 1 is missing.

    [   15.900247] mdio_bus b232400.mdio: MDIO device at address 2 is missing.

       #. So, how to resolve this?

    BR Rio

    &icssg1_mdio {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&icssg1_mdio_pins_default>;

    reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
    reset-delay-us = <2>;

    icssg1_phy0: ethernet-phy@1 {
    reg = <1>;
    //interrupt-parent = <&main_gpio1>;
    //interrupts = <87 0x2>;
    ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    };
    };

    &icssg2_mdio {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&icssg2_mdio_pins_default>;

    reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
    reset-delay-us = <2>;

    icssg2_phy0: ethernet-phy@2 {
    reg = <2>;
    //interrupt-parent = <&main_gpio1>;
    //interrupts = <87 0x2>;
    ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
    ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
    };
    };

  • 0 in reply to Rio Chan
    Prodigy 90 points

    Hi , Ti Team 

    I'm not sure why these changes allowed me to correctly identify ADDR 1, 2, and 3. I set the Pin mux from the original 2 to 0, and I also tried changing reset to reset-gpios. However, as the log shows, the PHY at ADDR 1 was correctly found with the DP83867 driver, but the PHY at ADDR 2 is unknown (it should also be a DP83867), and the PHY at ADDR 3 should be an 83822.

    LOG:

    root@am65xx-evm:~# dmesg | grep mdio
[    0.950304] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
[    0.984673] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    0.985943] davinci_mdio 46000f00.mdio: phy[3]: device 46000f00.mdio:03, driver unknown
[    1.037159] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
[    1.071674] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.072885] davinci_mdio 46000f00.mdio: phy[3]: device 46000f00.mdio:03, driver unknown
[    6.810609] davinci_mdio b132400.mdio: Configuring MDIO in manual mode
[    6.860695] davinci_mdio b132400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    6.874861] davinci_mdio b132400.mdio: phy[1]: device b132400.mdio:01, driver TI DP83867
[    6.918946] davinci_mdio b232400.mdio: Configuring MDIO in manual mode
[    6.953742] davinci_mdio b232400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    6.965006] davinci_mdio b232400.mdio: phy[2]: device b232400.mdio:02, driver unknown
[    8.541301] am65-cpsw-nuss 46000000.ethernet eth0: PHY [46000f00.mdio:03] driver [Generic PHY] (irq=POLL)
root@am65xx-evm:~# dmesg | grep icssg
[    7.917379] icssg-prueth icssg2-eth: error -ENODEV: iep1 get failed
root@am65xx-evm:~#

    1. Chamge Pin mux

    icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};


# AM65X_IOPAD(0x0094, PIN_INPUT,  2) -----> AM65X_IOPAD(0x0094, PIN_INPUT,  0)
# AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) -----> AM65X_IOPAD(0x00c8, PIN_OUTPUT, 0)
icssg2_mdio_pins_default: icssg2_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 0) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

    2. reset ---> reset-gpios

    &icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset-gpios = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <2>;

	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;
	
	reset-gpios = <&main_gpio0 16 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <2>;

	icssg2_phy0: ethernet-phy@2 {
		reg = <2>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

    3. IEP get Failed Issue

    /* Dual Ethernet application node on PRU-ICSSG2 */
	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,pa-stats = <&icssg2_pa_stats>;
		iep = <&icssg2_iep0>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg2_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg2_phy0>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};
	
};

  • 0 in reply to Tsai YunEn
    TI__Guru** 110030 points

    Hello Rio,
    Thank you for jumping in.

    Hello Tsai,

    I do not fully understand. Did you resolve some or all of your issues?
    "these changes allowed me to correctly identify ADDR 1, 2, and 3"

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 90 points

    Hi Nick ,

    I've made two modifications which resolved the "addr missing" issue. Although the PHY addresses are now found, the driver for them shows up as "unknown," with only the PHY at ADDR 1 being correctly identified as a DP83867. The correct configuration should have ADDR 1 and 2 as DP83867, and ADDR 3 as DP83822.

    1.  I changed reset to reset-gpios.

    &icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset-gpios = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <2>;

	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;
	
	reset-gpios = <&main_gpio0 16 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <2>;

	icssg2_phy0: ethernet-phy@2 {
		reg = <2>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

    2. I changed the pin-mux from AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) to AM65X_IOPAD(0x00c8, PIN_OUTPUT, 0).

    icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};


# AM65X_IOPAD(0x0094, PIN_INPUT,  2) -----> AM65X_IOPAD(0x0094, PIN_INPUT,  0)
# AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) -----> AM65X_IOPAD(0x00c8, PIN_OUTPUT, 0)
icssg2_mdio_pins_default: icssg2_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 0) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

    Log : 

    root@am65xx-evm:~# dmesg | grep mdio
[    0.950304] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
[    0.984673] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    0.985943] davinci_mdio 46000f00.mdio: phy[3]: device 46000f00.mdio:03, driver unknown
[    1.037159] davinci_mdio 46000f00.mdio: Configuring MDIO in manual mode
[    1.071674] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.072885] davinci_mdio 46000f00.mdio: phy[3]: device 46000f00.mdio:03, driver unknown
[    6.810609] davinci_mdio b132400.mdio: Configuring MDIO in manual mode
[    6.860695] davinci_mdio b132400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    6.874861] davinci_mdio b132400.mdio: phy[1]: device b132400.mdio:01, driver TI DP83867
[    6.918946] davinci_mdio b232400.mdio: Configuring MDIO in manual mode
[    6.953742] davinci_mdio b232400.mdio: davinci mdio revision 1.7, bus freq 1000000
[    6.965006] davinci_mdio b232400.mdio: phy[2]: device b232400.mdio:02, driver unknown
[    8.541301] am65-cpsw-nuss 46000000.ethernet eth0: PHY [46000f00.mdio:03] driver [Generic PHY] (irq=POLL)

    Additionally, the "iep get Failed" issue still persists. I'm not sure how to resolve this.

    root@am65xx-evm:~# dmesg | grep icssg
[    7.917379] icssg-prueth icssg2-eth: error -ENODEV: iep1 get failed

    /* Dual Ethernet application node on PRU-ICSSG2 */
	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,pa-stats = <&icssg2_pa_stats>;
		iep = <&icssg2_iep0>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg2_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg2_phy0>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};
	
};

    Thank you for your help!

  • 0 in reply to Tsai YunEn
    TI__Expert 4470 points

    Nick, 

    By the schematic share from customer, I summarize the hardware connection they use.

    All of them are using different MDIO interfaces. 

    MCU_MDIO

    MCU CPSW   -->  DP83822    PHY address  0x3

    (this port use as EtherCAT Master to connect EtherCAT slave module, this is default CPSW driver)

    PRG1_MDIO    

    PRG1_PRU0  (RGMII1)  -->  DP83867   PHY address 0x1

    (This port is extension board one of Ethernet port from PRG1, this requires PRU-ICSS firmware as EMAC, Linux driver for EMAC)

    PRG2_MDIO 

    PRG2_PRU0  (RGMII1)  --> DP83867    PHY address 0x2 

    (This port is EVM native on board dual Ethernet port from PRG2, this requires PRU-ICSS firmware as EMAC, Linux driver for EMAC) 

    YunEN, 

    There are four Ethernet show in your block diagram but I found only three of them from the schematic you share. 

    Could you confirm this? 

    I cannot tell which one is which except the CPSW one. 

    BR, Rich

  • 0 in reply to Rich Chen
    Prodigy 90 points

    I've confirmed that there are indeed only three. My findings align with your summary.

    1. MCU_MDIO

      &mcu_cpsw {
	pinctrl-names = "default";
	//pinctrl-0 = <&mcu_cpsw_pins_default>;
	pinctrl-0 = <&phy2ax58100_pins_default>, <&phy2ax58100_mdio2_pins_default>;
};

&davinci_mdio {
	status = "okay";
	reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;   /* PHY datasheet states 1us min */

	phy0: ethernet-phy@3 {
		reg = <3>;
		//ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		//ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

    2. PRG1_MDIO

      &icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset-gpios = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <2>;

	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

    3. PRG2_MDIO

      &icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;
	
	reset-gpios = <&main_gpio0 16 GPIO_ACTIVE_LOW>; /*83867*/
	reset-delay-us = <5>;

	icssg2_phy0: ethernet-phy@2 {
		reg = <2>;
		//interrupt-parent = <&main_gpio1>;
		//interrupts = <87 0x2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};
    4. icssg1-eth

    icssg1_eth: icssg1-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
				<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg1_mii_g_rt>;
		ti,mii-rt = <&icssg1_mii_rt>;
		ti,pa-stats = <&icssg1_pa_stats>;
		iep = <&icssg1_iep0>;

		//interrupt-parent = <&icssg1_intc>;
		//interrupts = <24 0 2>, <25 1 3>;
		//interrupt-names = "tx_ts0", "tx_ts1";

		dma-coherent;
		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			   <&main_udmap 0xc201>, /* egress slice 0 */
			   <&main_udmap 0xc202>, /* egress slice 0 */
			   <&main_udmap 0xc203>, /* egress slice 0 */
			   <&main_udmap 0xc204>, /* egress slice 1 */
			   <&main_udmap 0xc205>, /* egress slice 1 */
			   <&main_udmap 0xc206>, /* egress slice 1 */
			   <&main_udmap 0xc207>, /* egress slice 1 */

			   <&main_udmap 0x4200>, /* ingress slice 0 */
			   <&main_udmap 0x4201>, /* ingress slice 1 */
			   <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			   <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg1_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg1_phy0>;
				phy-mode = "rgmii-rxid";
				interrupts-extended = <&icssg1_intc 24>;
				ti,syscon-rgmii-delay = <&scm_conf 0x4110>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};

    5. icssg2-eth

    icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,pa-stats = <&icssg2_pa_stats>;
		iep = <&icssg2_iep0>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg2_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg2_phy0>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};

  • 0 in reply to Rich Chen
    Prodigy 90 points

    I was hoping for a quick update on this. Have there been any developments?

  • 0 in reply to Tsai YunEn
    TI__Genius 16130 points

    Hi YunEn:

    #1.Can you issue this cmd and let us check if all the ETH instance are showing?

    ==> ifconfig

    #2. May you share entire the Dmesg log?

    Thanks.

    BR Rio

  • 0 in reply to Rio Chan
    Prodigy 90 points

    I have already resolved this issue, thank you for your help.